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diff for duplicates of <20150526155042.GD7856@lunn.ch>

diff --git a/a/1.txt b/N1/1.txt
index 244d877..f49f648 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -17,10 +17,10 @@ On Tue, May 26, 2015 at 06:51:11PM +0300, Andrew Andrianov wrote:
 >        and power button handling interfaced via UART1
 >        (Handled via userspace dns320l-daemon)
 > 
-> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
-> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+> Signed-off-by: Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>
+> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
 
-Acked-by: Andrew Lunn <andrew@lunn.ch>
+Acked-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
 
 	  Andrew
 
@@ -51,7 +51,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +/*
 > + * Device Tree file for D-Link DNS-327L
 > + *
-> + * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
+> + * Copyright (C) 2015, Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>
 > + *
 > + * This file is dual-licensed: you can use it either under the terms
 > + * of the GPL or the X11 license, at your option. Note that this dual
@@ -124,28 +124,28 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +		pcie-controller {
 > +			status = "okay";
 > +
-> +			pcie at 1,0 {
+> +			pcie@1,0 {
 > +				/* Port 0, Lane 0 */
 > +				status = "okay";
 > +			};
 > +
-> +			pcie at 2,0 {
+> +			pcie@2,0 {
 > +				/* Port 1, Lane 0 */
 > +				status = "okay";
 > +			};
 > +		};
 > +
 > +		internal-regs {
-> +			sata at a0000 {
+> +			sata@a0000 {
 > +				nr-ports = <2>;
 > +				status = "okay";
 > +			};
 > +
-> +			usb at 50000 {
+> +			usb@50000 {
 > +				status = "okay";
 > +			};
 > +
-> +			nand at d0000 {
+> +			nand@d0000 {
 > +				status = "okay";
 > +				num-cs = <1>;
 > +				marvell,nand-keep-config;
@@ -154,46 +154,46 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +				nand-ecc-strength = <4>;
 > +				nand-ecc-step-size = <512>;
 > +
-> +				partition at 0 {
+> +				partition@0 {
 > +					label = "u-boot";
 > +					/* 1.0 MiB */
 > +					reg = <0x0000000 0x100000>;
 > +					read-only;
 > +				};
 > +
-> +				partition at 100000 {
+> +				partition@100000 {
 > +					label = "u-boot-env";
 > +					/* 128 KiB */
 > +					reg = <0x100000 0x20000>;
 > +					read-only;
 > +				};
 > +
-> +				partition at 120000 {
+> +				partition@120000 {
 > +					label = "uImage";
 > +					/* 7 MiB */
 > +					reg = <0x120000 0x700000>;
 > +				};
 > +
-> +				partition at 820000 {
+> +				partition@820000 {
 > +					label = "ubifs";
 > +					/* ~ 84 MiB */
 > +					reg = <0x820000 0x54e0000>;
 > +				};
 > +
 > +				/* Hardcoded into stock bootloader */
-> +				partition at 5d00000 {
+> +				partition@5d00000 {
 > +					label = "failsafe-uImage";
 > +					/* 5 MiB */
 > +					reg = <0x5d00000 0x500000>;
 > +				};
 > +
-> +				partition at 6200000 {
+> +				partition@6200000 {
 > +					label = "failsafe-fs";
 > +					/* 29 MiB */
 > +					reg = <0x6200000 0x1d00000>;
 > +				};
 > +
-> +				partition at 7f00000 {
+> +				partition@7f00000 {
 > +					label = "bbt";
 > +					/* 1 MiB for BBT */
 > +					reg = <0x7f00000 0x100000>;
@@ -265,7 +265,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 > +
-> +		usb_power: regulator at 1 {
+> +		usb_power: regulator@1 {
 > +			compatible = "regulator-fixed";
 > +			reg = <1>;
 > +			pinctrl-0 = <&xhci_pwr_pin>;
@@ -279,7 +279,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 > +		};
 > +
-> +		sata_r_power: regulator at 2 {
+> +		sata_r_power: regulator@2 {
 > +			compatible = "regulator-fixed";
 > +			reg = <2>;
 > +			pinctrl-0 = <&sata_r_pwr_pin>;
@@ -294,7 +294,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
 > +		};
 > +
-> +		sata_l_power: regulator at 3 {
+> +		sata_l_power: regulator@3 {
 > +			compatible = "regulator-fixed";
 > +			reg = <3>;
 > +			pinctrl-0 = <&sata_l_pwr_pin>;
@@ -386,7 +386,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +};
 > +
 > +&mdio {
-> +	phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+> +	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
 > +		reg = <0>;
 > +		marvell,reg-init = <0x0 0x16 0x0 0x0002>,
 > +				<0x0 0x19 0x0 0x0077>,
@@ -407,4 +407,8 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +};
 > -- 
 > 2.1.4
->
+> 
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 612450d..50b867c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,16 @@
  "ref\01432655471-16212-1-git-send-email-andrew@ncrmnt.org\0"
  "ref\01432655471-16212-2-git-send-email-andrew@ncrmnt.org\0"
- "From\0andrew@lunn.ch (Andrew Lunn)\0"
- "Subject\0[PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L\0"
+ "ref\01432655471-16212-2-git-send-email-andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org\0"
+ "From\0Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>\0"
+ "Subject\0Re: [PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L\0"
  "Date\0Tue, 26 May 2015 17:50:42 +0200\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>\0"
+ "Cc\0Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>"
+  Gregory Clement <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
+  Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+ " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "On Tue, May 26, 2015 at 06:51:11PM +0300, Andrew Andrianov wrote:\n"
@@ -25,10 +32,10 @@
  ">        and power button handling interfaced via UART1\n"
  ">        (Handled via userspace dns320l-daemon)\n"
  "> \n"
- "> Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>\n"
- "> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n"
+ "> Signed-off-by: Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>\n"
+ "> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
  "\n"
- "Acked-by: Andrew Lunn <andrew@lunn.ch>\n"
+ "Acked-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>\n"
  "\n"
  "\t  Andrew\n"
  "\n"
@@ -59,7 +66,7 @@
  "> +/*\n"
  "> + * Device Tree file for D-Link DNS-327L\n"
  "> + *\n"
- "> + * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>\n"
+ "> + * Copyright (C) 2015, Andrew Andrianov <andrew-g16cbSVCqPUdnm+yROfE0A@public.gmane.org>\n"
  "> + *\n"
  "> + * This file is dual-licensed: you can use it either under the terms\n"
  "> + * of the GPL or the X11 license, at your option. Note that this dual\n"
@@ -132,28 +139,28 @@
  "> +\t\tpcie-controller {\n"
  "> +\t\t\tstatus = \"okay\";\n"
  "> +\n"
- "> +\t\t\tpcie at 1,0 {\n"
+ "> +\t\t\tpcie@1,0 {\n"
  "> +\t\t\t\t/* Port 0, Lane 0 */\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tpcie at 2,0 {\n"
+ "> +\t\t\tpcie@2,0 {\n"
  "> +\t\t\t\t/* Port 1, Lane 0 */\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
  "> +\t\tinternal-regs {\n"
- "> +\t\t\tsata at a0000 {\n"
+ "> +\t\t\tsata@a0000 {\n"
  "> +\t\t\t\tnr-ports = <2>;\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tusb at 50000 {\n"
+ "> +\t\t\tusb@50000 {\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tnand at d0000 {\n"
+ "> +\t\t\tnand@d0000 {\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t\tnum-cs = <1>;\n"
  "> +\t\t\t\tmarvell,nand-keep-config;\n"
@@ -162,46 +169,46 @@
  "> +\t\t\t\tnand-ecc-strength = <4>;\n"
  "> +\t\t\t\tnand-ecc-step-size = <512>;\n"
  "> +\n"
- "> +\t\t\t\tpartition at 0 {\n"
+ "> +\t\t\t\tpartition@0 {\n"
  "> +\t\t\t\t\tlabel = \"u-boot\";\n"
  "> +\t\t\t\t\t/* 1.0 MiB */\n"
  "> +\t\t\t\t\treg = <0x0000000 0x100000>;\n"
  "> +\t\t\t\t\tread-only;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 100000 {\n"
+ "> +\t\t\t\tpartition@100000 {\n"
  "> +\t\t\t\t\tlabel = \"u-boot-env\";\n"
  "> +\t\t\t\t\t/* 128 KiB */\n"
  "> +\t\t\t\t\treg = <0x100000 0x20000>;\n"
  "> +\t\t\t\t\tread-only;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 120000 {\n"
+ "> +\t\t\t\tpartition@120000 {\n"
  "> +\t\t\t\t\tlabel = \"uImage\";\n"
  "> +\t\t\t\t\t/* 7 MiB */\n"
  "> +\t\t\t\t\treg = <0x120000 0x700000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 820000 {\n"
+ "> +\t\t\t\tpartition@820000 {\n"
  "> +\t\t\t\t\tlabel = \"ubifs\";\n"
  "> +\t\t\t\t\t/* ~ 84 MiB */\n"
  "> +\t\t\t\t\treg = <0x820000 0x54e0000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
  "> +\t\t\t\t/* Hardcoded into stock bootloader */\n"
- "> +\t\t\t\tpartition at 5d00000 {\n"
+ "> +\t\t\t\tpartition@5d00000 {\n"
  "> +\t\t\t\t\tlabel = \"failsafe-uImage\";\n"
  "> +\t\t\t\t\t/* 5 MiB */\n"
  "> +\t\t\t\t\treg = <0x5d00000 0x500000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 6200000 {\n"
+ "> +\t\t\t\tpartition@6200000 {\n"
  "> +\t\t\t\t\tlabel = \"failsafe-fs\";\n"
  "> +\t\t\t\t\t/* 29 MiB */\n"
  "> +\t\t\t\t\treg = <0x6200000 0x1d00000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 7f00000 {\n"
+ "> +\t\t\t\tpartition@7f00000 {\n"
  "> +\t\t\t\t\tlabel = \"bbt\";\n"
  "> +\t\t\t\t\t/* 1 MiB for BBT */\n"
  "> +\t\t\t\t\treg = <0x7f00000 0x100000>;\n"
@@ -273,7 +280,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tusb_power: regulator at 1 {\n"
+ "> +\t\tusb_power: regulator@1 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <1>;\n"
  "> +\t\t\tpinctrl-0 = <&xhci_pwr_pin>;\n"
@@ -287,7 +294,7 @@
  "> +\t\t\tgpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsata_r_power: regulator at 2 {\n"
+ "> +\t\tsata_r_power: regulator@2 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <2>;\n"
  "> +\t\t\tpinctrl-0 = <&sata_r_pwr_pin>;\n"
@@ -302,7 +309,7 @@
  "> +\t\t\tgpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsata_l_power: regulator at 3 {\n"
+ "> +\t\tsata_l_power: regulator@3 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <3>;\n"
  "> +\t\t\tpinctrl-0 = <&sata_l_pwr_pin>;\n"
@@ -394,7 +401,7 @@
  "> +};\n"
  "> +\n"
  "> +&mdio {\n"
- "> +\tphy0: ethernet-phy at 0 { /* Marvell 88E1318 */\n"
+ "> +\tphy0: ethernet-phy@0 { /* Marvell 88E1318 */\n"
  "> +\t\treg = <0>;\n"
  "> +\t\tmarvell,reg-init = <0x0 0x16 0x0 0x0002>,\n"
  "> +\t\t\t\t<0x0 0x19 0x0 0x0077>,\n"
@@ -415,6 +422,10 @@
  "> +};\n"
  "> -- \n"
  "> 2.1.4\n"
- >
+ "> \n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-48426fc46ceeaba830bd55ffc6eb453f3c10784b70da3f312f7e0338a410fb95
+9b520ce92f7909ed6dea664b1735a2a230d5a9743f5af2328bbe64948ace8cd5

diff --git a/a/1.txt b/N2/1.txt
index 244d877..a63884f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -124,28 +124,28 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +		pcie-controller {
 > +			status = "okay";
 > +
-> +			pcie at 1,0 {
+> +			pcie@1,0 {
 > +				/* Port 0, Lane 0 */
 > +				status = "okay";
 > +			};
 > +
-> +			pcie at 2,0 {
+> +			pcie@2,0 {
 > +				/* Port 1, Lane 0 */
 > +				status = "okay";
 > +			};
 > +		};
 > +
 > +		internal-regs {
-> +			sata at a0000 {
+> +			sata@a0000 {
 > +				nr-ports = <2>;
 > +				status = "okay";
 > +			};
 > +
-> +			usb at 50000 {
+> +			usb@50000 {
 > +				status = "okay";
 > +			};
 > +
-> +			nand at d0000 {
+> +			nand@d0000 {
 > +				status = "okay";
 > +				num-cs = <1>;
 > +				marvell,nand-keep-config;
@@ -154,46 +154,46 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +				nand-ecc-strength = <4>;
 > +				nand-ecc-step-size = <512>;
 > +
-> +				partition at 0 {
+> +				partition@0 {
 > +					label = "u-boot";
 > +					/* 1.0 MiB */
 > +					reg = <0x0000000 0x100000>;
 > +					read-only;
 > +				};
 > +
-> +				partition at 100000 {
+> +				partition@100000 {
 > +					label = "u-boot-env";
 > +					/* 128 KiB */
 > +					reg = <0x100000 0x20000>;
 > +					read-only;
 > +				};
 > +
-> +				partition at 120000 {
+> +				partition@120000 {
 > +					label = "uImage";
 > +					/* 7 MiB */
 > +					reg = <0x120000 0x700000>;
 > +				};
 > +
-> +				partition at 820000 {
+> +				partition@820000 {
 > +					label = "ubifs";
 > +					/* ~ 84 MiB */
 > +					reg = <0x820000 0x54e0000>;
 > +				};
 > +
 > +				/* Hardcoded into stock bootloader */
-> +				partition at 5d00000 {
+> +				partition@5d00000 {
 > +					label = "failsafe-uImage";
 > +					/* 5 MiB */
 > +					reg = <0x5d00000 0x500000>;
 > +				};
 > +
-> +				partition at 6200000 {
+> +				partition@6200000 {
 > +					label = "failsafe-fs";
 > +					/* 29 MiB */
 > +					reg = <0x6200000 0x1d00000>;
 > +				};
 > +
-> +				partition at 7f00000 {
+> +				partition@7f00000 {
 > +					label = "bbt";
 > +					/* 1 MiB for BBT */
 > +					reg = <0x7f00000 0x100000>;
@@ -265,7 +265,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 > +
-> +		usb_power: regulator at 1 {
+> +		usb_power: regulator@1 {
 > +			compatible = "regulator-fixed";
 > +			reg = <1>;
 > +			pinctrl-0 = <&xhci_pwr_pin>;
@@ -279,7 +279,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
 > +		};
 > +
-> +		sata_r_power: regulator at 2 {
+> +		sata_r_power: regulator@2 {
 > +			compatible = "regulator-fixed";
 > +			reg = <2>;
 > +			pinctrl-0 = <&sata_r_pwr_pin>;
@@ -294,7 +294,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
 > +		};
 > +
-> +		sata_l_power: regulator at 3 {
+> +		sata_l_power: regulator@3 {
 > +			compatible = "regulator-fixed";
 > +			reg = <3>;
 > +			pinctrl-0 = <&sata_l_pwr_pin>;
@@ -386,7 +386,7 @@ Acked-by: Andrew Lunn <andrew@lunn.ch>
 > +};
 > +
 > +&mdio {
-> +	phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+> +	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
 > +		reg = <0>;
 > +		marvell,reg-init = <0x0 0x16 0x0 0x0002>,
 > +				<0x0 0x19 0x0 0x0077>,
diff --git a/a/content_digest b/N2/content_digest
index 612450d..3607e7b 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,15 @@
  "ref\01432655471-16212-1-git-send-email-andrew@ncrmnt.org\0"
  "ref\01432655471-16212-2-git-send-email-andrew@ncrmnt.org\0"
- "From\0andrew@lunn.ch (Andrew Lunn)\0"
- "Subject\0[PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L\0"
+ "From\0Andrew Lunn <andrew@lunn.ch>\0"
+ "Subject\0Re: [PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L\0"
  "Date\0Tue, 26 May 2015 17:50:42 +0200\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Andrew Andrianov <andrew@ncrmnt.org>\0"
+ "Cc\0Jason Cooper <jason@lakedaemon.net>"
+  Gregory Clement <gregory.clement@free-electrons.com>
+  Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+  linux-arm-kernel@lists.infradead.org
+  linux-kernel@vger.kernel.org
+ " devicetree@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "On Tue, May 26, 2015 at 06:51:11PM +0300, Andrew Andrianov wrote:\n"
@@ -132,28 +138,28 @@
  "> +\t\tpcie-controller {\n"
  "> +\t\t\tstatus = \"okay\";\n"
  "> +\n"
- "> +\t\t\tpcie at 1,0 {\n"
+ "> +\t\t\tpcie@1,0 {\n"
  "> +\t\t\t\t/* Port 0, Lane 0 */\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tpcie at 2,0 {\n"
+ "> +\t\t\tpcie@2,0 {\n"
  "> +\t\t\t\t/* Port 1, Lane 0 */\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
  "> +\t\tinternal-regs {\n"
- "> +\t\t\tsata at a0000 {\n"
+ "> +\t\t\tsata@a0000 {\n"
  "> +\t\t\t\tnr-ports = <2>;\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tusb at 50000 {\n"
+ "> +\t\t\tusb@50000 {\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tnand at d0000 {\n"
+ "> +\t\t\tnand@d0000 {\n"
  "> +\t\t\t\tstatus = \"okay\";\n"
  "> +\t\t\t\tnum-cs = <1>;\n"
  "> +\t\t\t\tmarvell,nand-keep-config;\n"
@@ -162,46 +168,46 @@
  "> +\t\t\t\tnand-ecc-strength = <4>;\n"
  "> +\t\t\t\tnand-ecc-step-size = <512>;\n"
  "> +\n"
- "> +\t\t\t\tpartition at 0 {\n"
+ "> +\t\t\t\tpartition@0 {\n"
  "> +\t\t\t\t\tlabel = \"u-boot\";\n"
  "> +\t\t\t\t\t/* 1.0 MiB */\n"
  "> +\t\t\t\t\treg = <0x0000000 0x100000>;\n"
  "> +\t\t\t\t\tread-only;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 100000 {\n"
+ "> +\t\t\t\tpartition@100000 {\n"
  "> +\t\t\t\t\tlabel = \"u-boot-env\";\n"
  "> +\t\t\t\t\t/* 128 KiB */\n"
  "> +\t\t\t\t\treg = <0x100000 0x20000>;\n"
  "> +\t\t\t\t\tread-only;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 120000 {\n"
+ "> +\t\t\t\tpartition@120000 {\n"
  "> +\t\t\t\t\tlabel = \"uImage\";\n"
  "> +\t\t\t\t\t/* 7 MiB */\n"
  "> +\t\t\t\t\treg = <0x120000 0x700000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 820000 {\n"
+ "> +\t\t\t\tpartition@820000 {\n"
  "> +\t\t\t\t\tlabel = \"ubifs\";\n"
  "> +\t\t\t\t\t/* ~ 84 MiB */\n"
  "> +\t\t\t\t\treg = <0x820000 0x54e0000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
  "> +\t\t\t\t/* Hardcoded into stock bootloader */\n"
- "> +\t\t\t\tpartition at 5d00000 {\n"
+ "> +\t\t\t\tpartition@5d00000 {\n"
  "> +\t\t\t\t\tlabel = \"failsafe-uImage\";\n"
  "> +\t\t\t\t\t/* 5 MiB */\n"
  "> +\t\t\t\t\treg = <0x5d00000 0x500000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 6200000 {\n"
+ "> +\t\t\t\tpartition@6200000 {\n"
  "> +\t\t\t\t\tlabel = \"failsafe-fs\";\n"
  "> +\t\t\t\t\t/* 29 MiB */\n"
  "> +\t\t\t\t\treg = <0x6200000 0x1d00000>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\tpartition at 7f00000 {\n"
+ "> +\t\t\t\tpartition@7f00000 {\n"
  "> +\t\t\t\t\tlabel = \"bbt\";\n"
  "> +\t\t\t\t\t/* 1 MiB for BBT */\n"
  "> +\t\t\t\t\treg = <0x7f00000 0x100000>;\n"
@@ -273,7 +279,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tusb_power: regulator at 1 {\n"
+ "> +\t\tusb_power: regulator@1 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <1>;\n"
  "> +\t\t\tpinctrl-0 = <&xhci_pwr_pin>;\n"
@@ -287,7 +293,7 @@
  "> +\t\t\tgpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsata_r_power: regulator at 2 {\n"
+ "> +\t\tsata_r_power: regulator@2 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <2>;\n"
  "> +\t\t\tpinctrl-0 = <&sata_r_pwr_pin>;\n"
@@ -302,7 +308,7 @@
  "> +\t\t\tgpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsata_l_power: regulator at 3 {\n"
+ "> +\t\tsata_l_power: regulator@3 {\n"
  "> +\t\t\tcompatible = \"regulator-fixed\";\n"
  "> +\t\t\treg = <3>;\n"
  "> +\t\t\tpinctrl-0 = <&sata_l_pwr_pin>;\n"
@@ -394,7 +400,7 @@
  "> +};\n"
  "> +\n"
  "> +&mdio {\n"
- "> +\tphy0: ethernet-phy at 0 { /* Marvell 88E1318 */\n"
+ "> +\tphy0: ethernet-phy@0 { /* Marvell 88E1318 */\n"
  "> +\t\treg = <0>;\n"
  "> +\t\tmarvell,reg-init = <0x0 0x16 0x0 0x0002>,\n"
  "> +\t\t\t\t<0x0 0x19 0x0 0x0077>,\n"
@@ -417,4 +423,4 @@
  "> 2.1.4\n"
  >
 
-48426fc46ceeaba830bd55ffc6eb453f3c10784b70da3f312f7e0338a410fb95
+5ecc38fa19ff0786ba996402115616b14634736083ac225413cd5d94c3b25b28

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