From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: Ingo Molnar <mingo@kernel.org>,
Vince Weaver <vincent.weaver@maine.edu>,
Jiri Olsa <jolsa@redhat.com>, "Liang, Kan" <kan.liang@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 02/11] perf/x86: Improve HT workaround GP counter constraint
Date: Wed, 27 May 2015 12:11:36 +0200 [thread overview]
Message-ID: <20150527101136.GX3644@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CABPqkBRUGi_7Fz6i529iKHSFG2RWTHyymi+AVsssPPbUm208+w@mail.gmail.com>
On Wed, May 27, 2015 at 02:01:04AM -0700, Stephane Eranian wrote:
> But are you removing the incremental calls from the upper layer via
> x86_pmu.add()?
> If not, then you are saying the dynamic constraint you got for
> offcore_response, LBR
> or the HT workaround is still the best avail now.
sigh, see I knew I was missing something :/
So then for c->flag & DYNAMIC we should put and get again, right?
next prev parent reply other threads:[~2015-05-27 10:11 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 13:29 [PATCH v2 00/11] Various x86 pmu scheduling patches Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 01/11] perf,x86: Fix event/group validation Peter Zijlstra
2015-05-22 13:40 ` Peter Zijlstra
2015-05-26 9:24 ` Stephane Eranian
2015-05-26 10:12 ` Peter Zijlstra
2015-05-26 11:46 ` Stephane Eranian
2015-05-26 12:16 ` Peter Zijlstra
2015-05-26 12:25 ` Stephane Eranian
2015-05-26 13:22 ` Peter Zijlstra
2015-05-26 13:44 ` Stephane Eranian
2015-05-22 13:29 ` [PATCH v2 02/11] perf/x86: Improve HT workaround GP counter constraint Peter Zijlstra
2015-05-22 13:42 ` Peter Zijlstra
2015-05-26 9:37 ` Stephane Eranian
2015-05-26 10:15 ` Peter Zijlstra
2015-05-26 11:47 ` Stephane Eranian
2015-05-26 13:19 ` Peter Zijlstra
2015-05-26 16:07 ` Peter Zijlstra
2015-05-27 9:01 ` Stephane Eranian
2015-05-27 10:11 ` Peter Zijlstra [this message]
2015-05-27 11:39 ` Stephane Eranian
2015-05-27 10:13 ` Peter Zijlstra
2015-05-27 11:44 ` Stephane Eranian
2015-05-26 23:33 ` Andi Kleen
2015-05-27 7:48 ` Peter Zijlstra
2015-05-27 14:00 ` Andi Kleen
2015-05-22 13:29 ` [PATCH v2 03/11] perf/x86: Correct local vs remote sibling state Peter Zijlstra
2015-05-26 11:48 ` Stephane Eranian
2015-05-22 13:29 ` [PATCH v2 04/11] perf/x86: Use lockdep Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 05/11] perf/x86: Simplify dynamic constraint code somewhat Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 06/11] perf/x86: Make WARNs consistent Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 07/11] perf/x86: Move intel_commit_scheduling() Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 08/11] perf/x86: Remove pointless tests Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 09/11] perf/x86: Remove intel_excl_states::init_state Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 10/11] perf,x86: Simplify logic Peter Zijlstra
2015-05-22 13:29 ` [PATCH v2 11/11] perf/x86: Simplify put_exclusive_constraints Peter Zijlstra
2015-05-22 13:38 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150527101136.GX3644@twins.programming.kicks-ass.net \
--to=peterz@infradead.org \
--cc=eranian@google.com \
--cc=jolsa@redhat.com \
--cc=kan.liang@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=vincent.weaver@maine.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.