From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCH 1/7] net: dsa: add new driver for ar8xxx family Date: Fri, 29 May 2015 04:08:54 +0200 Message-ID: <20150529020854.GG11260@lunn.ch> References: <1432863742-18427-1-git-send-email-mathieu@codeaurora.org> <1432863742-18427-2-git-send-email-mathieu@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1432863742-18427-2-git-send-email-mathieu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Mathieu Olivari Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org, f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org, gang.chen.5i5j-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, jiri-rHqAuBHg3fBzbRFIqnYvSA@public.gmane.org, leitec-z4FmpzNVuK5Wk0Htik3J/w@public.gmane.org, fabf-AgBVmzD5pcezQB+pC5nmwQ@public.gmane.org, alexander.h.duyck-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, pavel.nakonechny-Fmhy8gsqeTEvJsYlp49lxw@public.gmane.org, joe-6d6DIl74uiNBDgjK7y7TUQ@public.gmane.org, sfeldma-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, nbd-p3rKhJxN3npAfugRpC6u6w@public.gmane.org, juhosg-p3rKhJxN3npAfugRpC6u6w@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org > +static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode) > +{ > + int reg; > + > + switch (port) { > + case 0: > + reg = AR8327_REG_PORT0_PAD_CTRL; > + break; > + case 6: > + reg = AR8327_REG_PORT6_PAD_CTRL; > + break; > + default: > + pr_err("Can't set PAD_CTRL on port %d\n", port); > + return -EINVAL; > + } > + > + /* DSA only supports 1 CPU port for now, so we'll take the assumption > + * that P0 is connected to the CPU master_dev. > + */ I don't like this assumption. Hardware i have with Marvell switches has the CPU connected to ports 5, or 6, or 0. Calling dsa_upstream_port() will tell you which is the CPU port. Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755296AbbE2COa (ORCPT ); Thu, 28 May 2015 22:14:30 -0400 Received: from vps0.lunn.ch ([178.209.37.122]:43498 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754068AbbE2COU (ORCPT ); Thu, 28 May 2015 22:14:20 -0400 Date: Fri, 29 May 2015 04:08:54 +0200 From: Andrew Lunn To: Mathieu Olivari Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, davem@davemloft.net, f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com, jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be, alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru, joe@perches.com, sfeldma@gmail.com, nbd@openwrt.org, juhosg@openwrt.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH 1/7] net: dsa: add new driver for ar8xxx family Message-ID: <20150529020854.GG11260@lunn.ch> References: <1432863742-18427-1-git-send-email-mathieu@codeaurora.org> <1432863742-18427-2-git-send-email-mathieu@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1432863742-18427-2-git-send-email-mathieu@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode) > +{ > + int reg; > + > + switch (port) { > + case 0: > + reg = AR8327_REG_PORT0_PAD_CTRL; > + break; > + case 6: > + reg = AR8327_REG_PORT6_PAD_CTRL; > + break; > + default: > + pr_err("Can't set PAD_CTRL on port %d\n", port); > + return -EINVAL; > + } > + > + /* DSA only supports 1 CPU port for now, so we'll take the assumption > + * that P0 is connected to the CPU master_dev. > + */ I don't like this assumption. Hardware i have with Marvell switches has the CPU connected to ports 5, or 6, or 0. Calling dsa_upstream_port() will tell you which is the CPU port. Andrew