From: Damien Lespiau <damien.lespiau@intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 11/12] drm/i915: Add IS_BDW_ULX
Date: Fri, 29 May 2015 12:33:18 +0100 [thread overview]
Message-ID: <20150529113317.GC28280@strange.ger.corp.intel.com> (raw)
In-Reply-To: <1432282962-3530-12-git-send-email-mika.kahola@intel.com>
On Fri, May 22, 2015 at 11:22:41AM +0300, Mika Kahola wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We need to tell BDW ULT and ULX apart.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> v2: Rebased to the latest
> v3: Rebased to the latest
>
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
>
> Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 37e8e9d..c85d802 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2362,6 +2362,9 @@ struct drm_i915_cmd_table {
> ((INTEL_DEVID(dev) & 0xf) == 0x6 || \
> (INTEL_DEVID(dev) & 0xf) == 0xb || \
> (INTEL_DEVID(dev) & 0xf) == 0xe))
> +/* ULX machines are also considered ULT. */
> +#define IS_BDW_ULX(dev) (IS_BROADWELL(dev) && \
> + (INTEL_DEVID(dev) & 0xf) == 0xe)
> #define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \
> (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
> #define IS_HSW_ULT(dev) (IS_HASWELL(dev) && \
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2015-05-29 11:33 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 8:22 [PATCH v4 00/12] All sort of cdclk stuff Mika Kahola
2015-05-22 8:22 ` [PATCH v4 01/12] drm/i915: Fix i855 get_display_clock_speed Mika Kahola
2015-05-28 18:12 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 02/12] drm/i915: Fix 852GM/GMV cdclk Mika Kahola
2015-05-28 18:16 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 03/12] drm/i915: Add cdclk extraction for g33, g965gm and g4x Mika Kahola
2015-05-28 18:17 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 04/12] drm/i915: Warn when cdclk for the platforms is not known Mika Kahola
2015-05-28 18:19 ` Damien Lespiau
2015-05-29 7:57 ` Daniel Vetter
2015-05-22 8:22 ` [PATCH v4 05/12] drm/i915: Cache current cdclk frequency in dev_priv Mika Kahola
2015-05-28 18:24 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 06/12] drm/i915: Use cached cdclk value Mika Kahola
2015-05-28 18:27 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 07/12] drm/i915: Unify ilk and hsw .get_aux_clock_divider Mika Kahola
2015-05-28 18:31 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 8/8] drm/i915: Store max cdclk value in dev_priv Mika Kahola
2015-05-28 18:32 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 09/12] drm/i915: Don't enable IPS when pixel rate exceeds 95% Mika Kahola
2015-05-28 18:35 ` Damien Lespiau
2015-05-22 8:22 ` [PATCH v4 10/12] drm/i915: HSW cdclk support Mika Kahola
2015-05-29 11:30 ` Damien Lespiau
2015-05-29 12:06 ` Kahola, Mika
2015-05-29 12:56 ` Damien Lespiau
2015-05-29 13:51 ` Ville Syrjälä
2015-05-22 8:22 ` [PATCH v4 11/12] drm/i915: Add IS_BDW_ULX Mika Kahola
2015-05-29 11:33 ` Damien Lespiau [this message]
2015-05-22 8:22 ` [PATCH v4 12/12] drm/i915: BDW clock change support Mika Kahola
2015-05-29 11:45 ` Damien Lespiau
2015-05-22 8:41 ` [PATCH v4 00/12] All sort of cdclk stuff Jani Nikula
2015-05-22 8:46 ` Jani Nikula
2015-05-27 21:49 ` Joe Konno
2015-05-28 15:29 ` Damien Lespiau
2015-05-28 16:01 ` Daniel Vetter
2015-05-28 17:11 ` Joe Konno
2015-05-28 17:20 ` Damien Lespiau
2015-05-28 17:17 ` Jani Nikula
2015-05-28 17:28 ` Damien Lespiau
2015-05-28 17:40 ` Jani Nikula
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