From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54887) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yz7im-0001Q0-Qa for qemu-devel@nongnu.org; Sun, 31 May 2015 14:12:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yz7ij-0004Yo-K2 for qemu-devel@nongnu.org; Sun, 31 May 2015 14:12:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45715) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yz7ij-0004Yi-Ds for qemu-devel@nongnu.org; Sun, 31 May 2015 14:12:25 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 298DD72 for ; Sun, 31 May 2015 18:12:25 +0000 (UTC) Date: Sun, 31 May 2015 20:12:21 +0200 From: "Michael S. Tsirkin" Message-ID: <20150531181221.GJ5268@redhat.com> References: <1432568042-19553-1-git-send-email-marcel@redhat.com> <1432568042-19553-24-git-send-email-marcel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1432568042-19553-24-git-send-email-marcel@redhat.com> Subject: Re: [Qemu-devel] [PATCH V7 23/24] apci: fix PXB behaviour if used with unsupported BIOS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum Cc: pbonzini@redhat.com, qemu-devel@nongnu.org On Mon, May 25, 2015 at 06:34:01PM +0300, Marcel Apfelbaum wrote: > PXB does not work with unsupported bioses, but should > not interfere with normal OS operation. > We don't ship them anymore, but it's reasonable > to keep the work-around until we update the bios in qemu. We already did, did we not? > Fix this by not adding PXB mem/IO chunks to _CRS > if they weren't configured by BIOS. > > Signed-off-by: Marcel Apfelbaum > --- > hw/i386/acpi-build.c | 87 ++++++++++++++++++++++++++++++++++------------------ > 1 file changed, 58 insertions(+), 29 deletions(-) > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index f7d2c80..895d64c 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -784,6 +784,14 @@ static Aml *build_crs(PCIHostState *host, > range_base = r->addr; > range_limit = r->addr + r->size - 1; > > + /* > + * Work-around for old bioses > + * that do not support multiple root buses > + */ > + if (!range_base || range_base > range_limit) { > + continue; > + } > + > if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { > aml_append(crs, > aml_word_io(aml_min_fixed, aml_max_fixed, > @@ -817,45 +825,66 @@ static Aml *build_crs(PCIHostState *host, > > range_base = pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO); > range_limit = pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO); > - aml_append(crs, > - aml_word_io(aml_min_fixed, aml_max_fixed, > - aml_pos_decode, aml_entire_range, > - 0, > - range_base, > - range_limit, > - 0, > - range_limit - range_base + 1)); > - crs_range_insert(io_ranges, range_base, range_limit); > + > + /* > + * Work-around for old bioses > + * that do not support multiple root buses > + */ > + if (range_base || range_base > range_limit) { > + aml_append(crs, > + aml_word_io(aml_min_fixed, aml_max_fixed, > + aml_pos_decode, aml_entire_range, > + 0, > + range_base, > + range_limit, > + 0, > + range_limit - range_base + 1)); > + crs_range_insert(io_ranges, range_base, range_limit); > + } > > range_base = > pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY); > range_limit = > pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY); > - aml_append(crs, > - aml_dword_memory(aml_pos_decode, aml_min_fixed, > - aml_max_fixed, aml_non_cacheable, > - aml_ReadWrite, > - 0, > - range_base, > - range_limit, > - 0, > - range_limit - range_base + 1)); > - crs_range_insert(mem_ranges, range_base, range_limit); > + > + /* > + * Work-around for old bioses > + * that do not support multiple root buses > + */ > + if (range_base || range_base > range_limit) { > + aml_append(crs, > + aml_dword_memory(aml_pos_decode, aml_min_fixed, > + aml_max_fixed, aml_non_cacheable, > + aml_ReadWrite, > + 0, > + range_base, > + range_limit, > + 0, > + range_limit - range_base + 1)); > + crs_range_insert(mem_ranges, range_base, range_limit); > + } > > range_base = > pci_bridge_get_base(dev, PCI_BASE_ADDRESS_MEM_PREFETCH); > range_limit = > pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_MEM_PREFETCH); > - aml_append(crs, > - aml_dword_memory(aml_pos_decode, aml_min_fixed, > - aml_max_fixed, aml_non_cacheable, > - aml_ReadWrite, > - 0, > - range_base, > - range_limit, > - 0, > - range_limit - range_base + 1)); > - crs_range_insert(mem_ranges, range_base, range_limit); > + > + /* > + * Work-around for old bioses > + * that do not support multiple root buses > + */ > + if (range_base || range_base > range_limit) { > + aml_append(crs, > + aml_dword_memory(aml_pos_decode, aml_min_fixed, > + aml_max_fixed, aml_non_cacheable, > + aml_ReadWrite, > + 0, > + range_base, > + range_limit, > + 0, > + range_limit - range_base + 1)); > + crs_range_insert(mem_ranges, range_base, range_limit); > + } > } > } > > -- > 2.1.0 >