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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [RFC 01/14] drm/i915: allocate gem memory for mipi dbi cmd buffer
Date: Mon, 1 Jun 2015 14:03:15 +0300	[thread overview]
Message-ID: <20150601110315.GN5176@intel.com> (raw)
In-Reply-To: <20150529171053.GQ8341@phenom.ffwll.local>

On Fri, May 29, 2015 at 07:10:53PM +0200, Daniel Vetter wrote:
> On Fri, May 29, 2015 at 01:59:01PM +0300, Ville Syrjälä wrote:
> > On Fri, May 29, 2015 at 04:06:53PM +0530, Gaurav K Singh wrote:
> > > Allocate gem memory for MIPI DBI command buffer. This memory
> > > will be used when sending command via DBI interface.
> > 
> > Why would you allocate this via gem? AFAICS you only feed the bus
> > address to the hardware. Using the dma-api would seem like the right
> > choice here, but I'm not sure how to deal with the dma mask.
> 
> Yeah dma_alloc_coherent is what you want here. The mask can be ignored,
> it should be suitable already.

Umm, this thing seems to limited to 32bit addresses. And we set the mask
to 39 or 40 bits depending on the gen.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-06-01 11:03 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-29 10:36 [RFC 00/14] DSI Command mode(DBI mode) enabling on CHT Gaurav K Singh
2015-05-29 10:36 ` [RFC 01/14] drm/i915: allocate gem memory for mipi dbi cmd buffer Gaurav K Singh
2015-05-29 10:59   ` Ville Syrjälä
2015-05-29 17:10     ` Daniel Vetter
2015-06-01 11:03       ` Ville Syrjälä [this message]
2015-06-15 10:30         ` Daniel Vetter
2015-06-16 17:08           ` Singh, Gaurav K
2015-06-18 22:02             ` {Intel-gfx] " Gaurav K Singh
2015-06-18 22:06               ` Singh, Gaurav K
2015-05-29 10:36 ` [RFC 02/14] drm/i915: Add support for TEAR ON Sequence Gaurav K Singh
2015-05-29 10:36 ` [RFC 03/14] drm/i915: Add functions for dcs memory write cmd Gaurav K Singh
2015-05-29 10:36 ` [RFC 04/14] drm/i915: Calculate bw timer for mipi DBI interface Gaurav K Singh
2015-05-29 10:36 ` [RFC 05/14] drm/i915: Use the bpp value wrt the pixel format Gaurav K Singh
2015-05-29 10:36 ` [RFC 06/14] drm/i915: Disable vlank interrupt for disabling MIPI cmd mode Gaurav K Singh
2015-05-29 17:14   ` Daniel Vetter
2015-05-29 17:23     ` Daniel Vetter
2015-06-16 16:54       ` Singh, Gaurav K
2015-06-17 11:36         ` Daniel Vetter
2015-06-18 21:49         ` Gaurav K Singh
2015-06-22 11:58           ` Daniel Vetter
2015-05-29 10:36 ` [RFC 07/14] drm/i915: Disable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:16   ` Daniel Vetter
2015-05-29 17:20     ` Daniel Vetter
2015-06-16 16:59       ` Singh, Gaurav K
2015-06-18 21:53         ` Gaurav K Singh
2015-06-22 12:04           ` Daniel Vetter
2015-05-29 10:37 ` [RFC 08/14] drm/i915: Disable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 09/14] drm/i915: Changes for command mode preparation Gaurav K Singh
2015-05-29 10:37 ` [RFC 10/14] drm/i915: Enable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 11/14] drm/i915: Enable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:21   ` Daniel Vetter
2015-06-13  6:54     ` Mohan Marimuthu, Yogesh
2015-06-15 10:33       ` Daniel Vetter
2015-06-16 17:03         ` Singh, Gaurav K
2015-06-17 11:39           ` Daniel Vetter
2015-06-18 21:56           ` Gaurav K Singh
2015-06-22 12:05             ` Daniel Vetter
2015-06-22 12:08               ` Daniel Vetter
2015-05-29 10:37 ` [RFC 12/14] drm/i915: Generalize DSI enable function Gaurav K Singh
2015-05-29 10:37 ` [RFC 13/14] drm/i915: Reset the display hw if vid mode to cmd mode Gaurav K Singh
2015-05-29 10:37 ` [RFC 14/14] drm/i915: send one frame after enabling mipi " Gaurav K Singh

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