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Date:   Mon, 1 Jun 2015 22:16:54 +0200
From:   Ralf Baechle <ralf@linux-mips.org>
To:     "Maciej W. Rozycki" <macro@linux-mips.org>
Cc:     Joshua Kinard <kumba@gentoo.org>,
        Linux MIPS List <linux-mips@linux-mips.org>
Subject: Re: IP27: R14000: Unexpected General Exception in
 cpu_set_fpu_fcsr_mask()
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On Mon, Jun 01, 2015 at 12:27:52PM +0100, Maciej W. Rozycki wrote:

> > >  Can you please try this diagnostic patch and report the value of FCSR 
> > > printed ("FCSR is:"), and also tell me if the exception has now gone too?  
> > > 
> > >  I'll submit the final fix, properly annotated, if your testing confirms 
> > > my diagnosis.
> > 
> > That got it to boot again.  I added CPU ID to the printk as well, and got some
> > odd output from one of the CPUs:
> > 
> > # dmesg | grep FCSR
> > [    0.000000] CPU0: FCSR is: 00000000
> > [    0.319158] CPU1: FCSR is: 00000000
> > [    0.364971] CPU2: FCSR is: ffffffffa8000000
> > [    0.404854] CPU3: FCSR is: 00000000
> 
>  The value reported for CPU2 merely shows FCC[7,5,3] bits set, nothing 
> really odd about that, the CPU may well have come out of reset like this.  
> Neither of the values reported though actually corresponds to the symptom 
> you saw, can you double-check you didn't make a typo in your modification 
> to `printk'?

Maciej, I don't see why the code is so careful about not trampeling
over any bits that may be set on bootup.  I think we should rather fully
initialize all the exception bits to zero to have the FPU in a known good
state.

  Ralf