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diff for duplicates of <20150602144126.GZ23777@lukather>

diff --git a/a/1.txt b/N1/1.txt
index 0925cc5..3398f28 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -45,7 +45,7 @@ On Tue, May 26, 2015 at 09:31:03AM -0700, Dan Williams wrote:
 > on that one and leave the other scenarios for other dmaengine
 > maintainers to jump in an implement?
 
-From my limited understanding of RAID and PQ computations, it would be
+>From my limited understanding of RAID and PQ computations, it would be
 3 with a twist.
 
 Our hardware controller supports xor and PQ, but the checks and
@@ -58,3 +58,10 @@ Maxime
 Maxime Ripard, Free Electrons
 Embedded Linux, Kernel and Android engineering
 http://free-electrons.com
+-------------- next part --------------
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diff --git a/a/2.bin b/a/2.bin
deleted file mode 100644
index 59382b5..0000000
--- a/a/2.bin
+++ /dev/null
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diff --git a/a/2.hdr b/a/2.hdr
deleted file mode 100644
index 3237378..0000000
--- a/a/2.hdr
+++ /dev/null
@@ -1,2 +0,0 @@
-Content-Type: application/pgp-signature; name="signature.asc"
-Content-Description: Digital signature
diff --git a/a/content_digest b/N1/content_digest
index 6bb7e0c..29b5ffc 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -6,26 +6,11 @@
  "ref\0CAPcyv4jbW=B_mYfx5HfKckLYeWctfC-9jYeDf0Z1APvQZfHj6Q@mail.gmail.com\0"
  "ref\020150526094511.GP8557@lukather\0"
  "ref\0CAPcyv4i06Mwis_CSrKV1Yo6crD1vrjb9it6RtYdtwbgOOY9a4g@mail.gmail.com\0"
- "From\0Maxime Ripard <maxime.ripard@free-electrons.com>\0"
- "Subject\0Re: [PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading\0"
+ "From\0maxime.ripard@free-electrons.com (Maxime Ripard)\0"
+ "Subject\0[PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading\0"
  "Date\0Tue, 2 Jun 2015 16:41:26 +0200\0"
- "To\0Dan Williams <dan.j.williams@intel.com>\0"
- "Cc\0Vinod Koul <vinod.koul@intel.com>"
-  Gregory Clement <gregory.clement@free-electrons.com>
-  Jason Cooper <jason@lakedaemon.net>
-  Andrew Lunn <andrew@lunn.ch>
-  Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-  dmaengine@vger.kernel.org <dmaengine@vger.kernel.org>
-  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  linux-crypto@vger.kernel.org
-  Lior Amsalem <alior@marvell.com>
-  Thomas Petazzoni <thomas@free-electrons.com>
-  Herbert Xu <herbert@gondor.apana.org.au>
-  David S. Miller <davem@davemloft.net>
-  Dave Jiang <dave.jiang@intel.com>
- " Boaz Harrosh <boaz@plexistor.com>\0"
- "\01:1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "On Tue, May 26, 2015 at 09:31:03AM -0700, Dan Williams wrote:\n"
  "> > If you mean, \"give me a hand, you can start there\", then yeah, I can\n"
@@ -74,7 +59,7 @@
  "> on that one and leave the other scenarios for other dmaengine\n"
  "> maintainers to jump in an implement?\n"
  "\n"
- "From my limited understanding of RAID and PQ computations, it would be\n"
+ ">From my limited understanding of RAID and PQ computations, it would be\n"
  "3 with a twist.\n"
  "\n"
  "Our hardware controller supports xor and PQ, but the checks and\n"
@@ -86,27 +71,13 @@
  "-- \n"
  "Maxime Ripard, Free Electrons\n"
  "Embedded Linux, Kernel and Android engineering\n"
- http://free-electrons.com
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+ "http://free-electrons.com\n"
+ "-------------- next part --------------\n"
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+ "Name: signature.asc\n"
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+ "Size: 819 bytes\n"
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