From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47699) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z02oF-00064u-MA for qemu-devel@nongnu.org; Wed, 03 Jun 2015 03:09:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z02oE-0004zD-BQ for qemu-devel@nongnu.org; Wed, 03 Jun 2015 03:09:55 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:36527) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z02oE-0004xd-5B for qemu-devel@nongnu.org; Wed, 03 Jun 2015 03:09:54 -0400 Date: Wed, 3 Jun 2015 09:09:43 +0200 From: Aurelien Jarno Message-ID: <20150603070943.GQ26298@aurel32.net> References: <1433194188-24514-1-git-send-email-aurelien@aurel32.net> <1433194188-24514-2-git-send-email-aurelien@aurel32.net> <556E35CB.3070703@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <556E35CB.3070703@codeaurora.org> Sender: Aurelien Jarno Subject: Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Christopher Covington Cc: qemu-devel@nongnu.org On 2015-06-02 19:01, Christopher Covington wrote: > Hi Aurelien, > > On 06/01/2015 05:29 PM, Aurelien Jarno wrote: > > Use the bit number for SR constants instead of using a bit mask. This > > make possible to also use the constants for shifts. > > > > Reviewed-by: Richard Henderson > > Signed-off-by: Aurelien Jarno > > --- > > target-sh4/cpu.c | 3 +- > > target-sh4/cpu.h | 30 ++++++++++---------- > > target-sh4/gdbstub.c | 4 +-- > > target-sh4/helper.c | 27 +++++++++--------- > > target-sh4/op_helper.c | 26 ++++++++--------- > > target-sh4/translate.c | 75 ++++++++++++++++++++++++++------------------------ > > 6 files changed, 85 insertions(+), 80 deletions(-) > > > > diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c > > index d187a2b..cccb14f 100644 > > --- a/target-sh4/cpu.c > > +++ b/target-sh4/cpu.c > > @@ -61,7 +61,8 @@ static void superh_cpu_reset(CPUState *s) > > env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */ > > #else > > - env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; > > + env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | > > + (1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0); > > I like using the BIT() macro for this kind of thing. Thanks for the hint, I'll come with an additional patch to fix that in the code. -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net