Re: [Qemu-devel] [edk2] [PATCH] OvmfPkg/PlatformPei: Initialise RCBA (B0:D31:F0 0xf0) register

[Paulo Alcantara <pcacjr@zytor.com>]

On Sat, 06 Jun 2015 22:13:21 -0700
Jordan Justen <jordan.l.justen@intel.com> wrote:

> On 2015-06-06 12:10:03, Paulo Alcantara wrote:
> > This patch initialises root complex register block BAR in order to
> > support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT
> > bit not set) on QEMU.
> > 
> > Contributed-under: TianoCore Contribution Agreement 1.0
> > Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
> > ---
> >  OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 6 ++++++
> >  OvmfPkg/OvmfPkg.dec                           | 4 ++++
> >  OvmfPkg/PlatformPei/Platform.c                | 7 +++++++
> >  OvmfPkg/PlatformPei/PlatformPei.inf           | 1 +
> >  4 files changed, 18 insertions(+)
> > 
> > diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
> > b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h index
> > 4f59a7c..4d42dfa 100644 ---
> > a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h +++
> > b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h @@ -90,4 +90,10 @@
> >  #define ICH9_SMI_EN_APMC_EN      BIT5
> >  #define ICH9_SMI_EN_GBL_SMI_EN   BIT0
> >  
> > +//
> > +// Root Complex Base Address register
> > +//
> > +#define ICH9_RCBA     0xf0
> > +#define ICH9_RCBA_EN  BIT0
> > +
> >  #endif
> > diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> > index 4cb70dc..a6586f3 100644
> > --- a/OvmfPkg/OvmfPkg.dec
> > +++ b/OvmfPkg/OvmfPkg.dec
> > @@ -78,6 +78,10 @@
> >    #  to PIIX4 function 3 offset 0x40-0x43 bits [15:6].
> >    gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress|0xB000|UINT16|5
> >  
> > +  ## This flag determines the Root Complex Register Block BAR,
> > written to Q35
> > +  #  function 31 offset 0xf0-0xf3 bits [31:14]
> > +
> > gUefiOvmfPkgTokenSpaceGuid.PcdRootComplexBaseAddress|0xfed1c000|UINT32|0x1e
> > + ## When VirtioScsiDxe is instantiated for a HBA, the numbers of
> > targets and #  LUNs are retrieved from the host during virtio-scsi
> > setup. #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget
> > * MaxLun diff --git a/OvmfPkg/PlatformPei/Platform.c
> > b/OvmfPkg/PlatformPei/Platform.c index 1126c65..09c9a2c 100644
> > --- a/OvmfPkg/PlatformPei/Platform.c
> > +++ b/OvmfPkg/PlatformPei/Platform.c
> > @@ -261,6 +261,13 @@ MiscInitialization (
> >        Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
> >        AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
> >        AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
> > +
> > +      //
> > +      // Set Root Complex Register Block BAR
> > +      //
> > +      PciWrite32 (POWER_MGMT_REGISTER_Q35 (ICH9_RCBA),
> > +                  PcdGet32 (PcdRootComplexBaseAddress) |
> > (UINT32)ICH9_RCBA_EN
> 
> Do we need a PCD here? How about just defining ICH9_ROOT_COMPLEX_BASE?

In fact, we don't. Since the MMIO address is being hard-corded in
QEMU's ACPI DSDT table and it is unlikely to be changed, so defining
ICH9_ROOT_COMPLEX_BASE for it is OK.

Thanks,

Paulo

> 
> -Jordan
> 
> > +                 );
> >        break;
> >      default:
> >        DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID:
> > 0x%04x\n", diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf
> > b/OvmfPkg/PlatformPei/PlatformPei.inf index 0307bca..4aa47cc 100644
> > --- a/OvmfPkg/PlatformPei/PlatformPei.inf
> > +++ b/OvmfPkg/PlatformPei/PlatformPei.inf
> > @@ -74,6 +74,7 @@
> >    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
> >    gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
> >    gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
> > +  gUefiOvmfPkgTokenSpaceGuid.PcdRootComplexBaseAddress
> >    gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize
> >    gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
> >    gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
> > -- 
> > 2.1.0
> > 
> > 
> > ------------------------------------------------------------------------------
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> 
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-- 
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.