From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Date: Thu, 18 Jun 2015 09:38:01 +0000 Subject: Re: [PATCH 1/3] powerpc: implement barrier primitives Message-Id: <20150618093801.GA5168@arm.com> List-Id: References: <1434534230-17249-1-git-send-email-andre.przywara@arm.com> <1434534230-17249-2-git-send-email-andre.przywara@arm.com> <20150617101506.GD6303@arm.com> <1434618718.18306.1.camel@ellerman.id.au> In-Reply-To: <1434618718.18306.1.camel@ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Michael Ellerman Cc: Andre Przywara , "kvm-ppc@vger.kernel.org" , "kvm@vger.kernel.org" , Vaidyanathan Srinivasan , Matt Evans On Thu, Jun 18, 2015 at 10:11:58AM +0100, Michael Ellerman wrote: > On Wed, 2015-06-17 at 11:15 +0100, Will Deacon wrote: > > On Wed, Jun 17, 2015 at 10:43:48AM +0100, Andre Przywara wrote: > > > Instead of referring to the Linux header including the barrier > > > macros, copy over the rather simple implementation for the PowerPC > > > barrier instructions kvmtool uses. This fixes build for powerpc. > > > > > > Signed-off-by: Andre Przywara > > > --- > > > Hi, > > > > > > I just took what kvmtool seems to have used before, I actually have > > > no idea if "sync" is the right instruction or "lwsync" would do. > > > Would be nice if some people with PowerPC knowledge could comment. > > > > I *think* we can use lwsync for rmb and wmb, but would want confirmation > > from a ppc guy before making that change! > > Ugh, memory barriers :) I prefer to call them "Job Security" :) > You probably can use lwsync, assuming you're only ordering cacheable vs > cacheable. > > But, lwsync has given us pain in the past[1], so I'd be happier if you just used > sync. No probs. I pushed Andre's original patch. Will From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH 1/3] powerpc: implement barrier primitives Date: Thu, 18 Jun 2015 10:38:01 +0100 Message-ID: <20150618093801.GA5168@arm.com> References: <1434534230-17249-1-git-send-email-andre.przywara@arm.com> <1434534230-17249-2-git-send-email-andre.przywara@arm.com> <20150617101506.GD6303@arm.com> <1434618718.18306.1.camel@ellerman.id.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Andre Przywara , "kvm-ppc@vger.kernel.org" , "kvm@vger.kernel.org" , Vaidyanathan Srinivasan , Matt Evans To: Michael Ellerman Return-path: Received: from foss.arm.com ([217.140.101.70]:41631 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932079AbbFRJiK (ORCPT ); Thu, 18 Jun 2015 05:38:10 -0400 Content-Disposition: inline In-Reply-To: <1434618718.18306.1.camel@ellerman.id.au> Sender: kvm-owner@vger.kernel.org List-ID: On Thu, Jun 18, 2015 at 10:11:58AM +0100, Michael Ellerman wrote: > On Wed, 2015-06-17 at 11:15 +0100, Will Deacon wrote: > > On Wed, Jun 17, 2015 at 10:43:48AM +0100, Andre Przywara wrote: > > > Instead of referring to the Linux header including the barrier > > > macros, copy over the rather simple implementation for the PowerPC > > > barrier instructions kvmtool uses. This fixes build for powerpc. > > > > > > Signed-off-by: Andre Przywara > > > --- > > > Hi, > > > > > > I just took what kvmtool seems to have used before, I actually have > > > no idea if "sync" is the right instruction or "lwsync" would do. > > > Would be nice if some people with PowerPC knowledge could comment. > > > > I *think* we can use lwsync for rmb and wmb, but would want confirmation > > from a ppc guy before making that change! > > Ugh, memory barriers :) I prefer to call them "Job Security" :) > You probably can use lwsync, assuming you're only ordering cacheable vs > cacheable. > > But, lwsync has given us pain in the past[1], so I'd be happier if you just used > sync. No probs. I pushed Andre's original patch. Will