From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35276) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7lnU-0000PJ-Ol for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:37:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z7lnS-0004KQ-5n for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:37:04 -0400 Received: from [2001:bc8:30d7:101::1] (port=46068 helo=hall.aurel32.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7lnR-0004K7-VK for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:37:02 -0400 Date: Wed, 24 Jun 2015 16:37:00 +0200 From: Aurelien Jarno Message-ID: <20150624143700.GC26795@aurel32.net> References: <1434708524-25434-1-git-send-email-leon.alrae@imgtec.com> <1434708524-25434-4-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1434708524-25434-4-git-send-email-leon.alrae@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v3 3/5] target-mips: remove identical code in different branch List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae Cc: qemu-devel@nongnu.org, matthew.fortune@imgtec.com On 2015-06-19 11:08, Leon Alrae wrote: > Signed-off-by: Leon Alrae > --- > target-mips/translate.c | 25 ++++--------------------- > 1 file changed, 4 insertions(+), 21 deletions(-) > > diff --git a/target-mips/translate.c b/target-mips/translate.c > index 1d128ee..6fd6dd9 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -11852,11 +11852,7 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx) > * when in debug mode... > */ > check_insn(ctx, ISA_MIPS32); > - if (!(ctx->hflags & MIPS_HFLAG_DM)) { > - generate_exception(ctx, EXCP_DBp); > - } else { > - generate_exception(ctx, EXCP_DBp); > - } > + generate_exception(ctx, EXCP_DBp); The reason for this duplicated code, is from the comment above, that is we are not sure which exception should be generated in debug mode. If someone knows the answer (or my experiment that on real hardware) that might be a good opportu to fix that the correct way. > break; > case RR_SLT: > gen_slt(ctx, OPC_SLT, 24, rx, ry); > @@ -12707,11 +12703,7 @@ static void gen_pool16c_insn(DisasContext *ctx) > * when in debug mode... > */ > check_insn(ctx, ISA_MIPS32); > - if (!(ctx->hflags & MIPS_HFLAG_DM)) { > - generate_exception(ctx, EXCP_DBp); > - } else { > - generate_exception(ctx, EXCP_DBp); > - } > + generate_exception(ctx, EXCP_DBp); > break; > case JRADDIUSP + 0: > case JRADDIUSP + 1: > @@ -13076,11 +13068,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs) > break; > case SDBBP: > check_insn(ctx, ISA_MIPS32); > - if (!(ctx->hflags & MIPS_HFLAG_DM)) { > - generate_exception(ctx, EXCP_DBp); > - } else { > - generate_exception(ctx, EXCP_DBp); > - } > + generate_exception(ctx, EXCP_DBp); > break; > default: > goto pool32axf_invalid; > @@ -16849,12 +16837,7 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx) > * when in debug mode... > */ > check_insn(ctx, ISA_MIPS32); > - if (!(ctx->hflags & MIPS_HFLAG_DM)) { > - generate_exception(ctx, EXCP_DBp); > - } else { > - generate_exception(ctx, EXCP_DBp); > - } > - /* Treat as NOP. */ > + generate_exception(ctx, EXCP_DBp); > break; > #if defined(TARGET_MIPS64) > case OPC_DCLO: > Besides the nitpick above: Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net