From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7lqa-0004JH-73 for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:40:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z7lqW-0005Zl-AR for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:40:16 -0400 Received: from [2001:bc8:30d7:101::1] (port=46086 helo=hall.aurel32.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z7lqW-0005Ze-4M for qemu-devel@nongnu.org; Wed, 24 Jun 2015 10:40:12 -0400 Date: Wed, 24 Jun 2015 16:40:10 +0200 From: Aurelien Jarno Message-ID: <20150624144010.GA27653@aurel32.net> References: <1434708524-25434-1-git-send-email-leon.alrae@imgtec.com> <1434708524-25434-5-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1434708524-25434-5-git-send-email-leon.alrae@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v3 4/5] target-mips: add Unified Hosting Interface (UHI) support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae Cc: qemu-devel@nongnu.org, matthew.fortune@imgtec.com On 2015-06-19 11:08, Leon Alrae wrote: > Add UHI semihosting support for MIPS. QEMU run with "-semihosting" option > will alter the behaviour of SDBBP 1 instruction -- UHI operation will be > called instead of generating a debug exception. > > Also tweak Malta's pseudo-bootloader. On CPU reset the $4 register is set > to -1 if semihosting arguments are passed to indicate that the UHI > operations should be used to obtain input arguments. > > Signed-off-by: Leon Alrae > --- > hw/mips/mips_malta.c | 9 +- > qemu-options.hx | 10 +- > target-mips/Makefile.objs | 2 +- > target-mips/helper.h | 2 + > target-mips/mips-semi.c | 336 ++++++++++++++++++++++++++++++++++++++++++++++ > target-mips/translate.c | 75 ++++++++--- > 6 files changed, 408 insertions(+), 26 deletions(-) > create mode 100644 target-mips/mips-semi.c Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net