All of lore.kernel.org
 help / color / mirror / Atom feed
From: Aurelien Jarno <aurelien@aurel32.net>
To: Serge Vakulenko <serge.vakulenko@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH pic32 v2 1/5] Speed of MIPS CPU timer made configurable per platform.
Date: Wed, 1 Jul 2015 12:02:51 +0200	[thread overview]
Message-ID: <20150701100251.GA11361@aurel32.net> (raw)
In-Reply-To: <ea933a5c69f2b15ddbb55a5526af30022029c5c7.1435723168.git.serge.vakulenko@gmail.com>

On 2015-06-30 21:12, Serge Vakulenko wrote:
> Signed-off-by: Serge Vakulenko <serge.vakulenko@gmail.com>
> ---
>  hw/mips/cputimer.c        | 13 +++++++------
>  hw/mips/mips_fulong2e.c   |  2 +-
>  hw/mips/mips_jazz.c       |  2 +-
>  hw/mips/mips_malta.c      |  4 ++--
>  hw/mips/mips_mipssim.c    |  2 +-
>  hw/mips/mips_r4k.c        |  2 +-
>  include/hw/mips/cpudevs.h |  2 +-
>  target-mips/cpu.h         |  1 +
>  8 files changed, 15 insertions(+), 13 deletions(-)
> 
> diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
> index 577c9ae..4f02a9f 100644
> --- a/hw/mips/cputimer.c
> +++ b/hw/mips/cputimer.c
> @@ -50,8 +50,8 @@ static void cpu_mips_timer_update(CPUMIPSState *env)
>  
>      now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
>      wait = env->CP0_Compare - env->CP0_Count -
> -	    (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
> -    next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
> +        (uint32_t)muldiv64(now, env->count_freq, get_ticks_per_sec());
> +    next = now + muldiv64(wait, get_ticks_per_sec(), env->count_freq);
>      timer_mod(env->timer, next);
>  }
>  
> @@ -80,7 +80,7 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env)
>          }
>  
>          return env->CP0_Count +
> -            (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
> +            (uint32_t)muldiv64(now, env->count_freq, get_ticks_per_sec());
>      }
>  }
>  
> @@ -97,7 +97,7 @@ void cpu_mips_store_count (CPUMIPSState *env, uint32_t count)
>          /* Store new count register */
>          env->CP0_Count =
>              count - (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
> -                                       TIMER_FREQ, get_ticks_per_sec());
> +                                       env->count_freq, get_ticks_per_sec());
>          /* Update timer timer */
>          cpu_mips_timer_update(env);
>      }
> @@ -122,7 +122,7 @@ void cpu_mips_stop_count(CPUMIPSState *env)
>  {
>      /* Store the current value */
>      env->CP0_Count += (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
> -                                         TIMER_FREQ, get_ticks_per_sec());
> +                                         env->count_freq, get_ticks_per_sec());
>  }
>  
>  static void mips_timer_cb (void *opaque)
> @@ -145,7 +145,7 @@ static void mips_timer_cb (void *opaque)
>      env->CP0_Count--;
>  }
>  
> -void cpu_mips_clock_init (CPUMIPSState *env)
> +void cpu_mips_clock_init(CPUMIPSState *env, unsigned count_freq)
>  {
>      /*
>       * If we're in KVM mode, don't create the periodic timer, that is handled in
> @@ -153,5 +153,6 @@ void cpu_mips_clock_init (CPUMIPSState *env)
>       */
>      if (!kvm_enabled()) {
>          env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env);
> +        env->count_freq = count_freq;
>      }
>  }

So it means the value passed as an argument to this function is ignored
in the KVM case. I guess we want to be able to tell the kernel about the
request frequency.

Otherwise it looks fine.

> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index dea941a..5decc30 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -343,7 +343,7 @@ static void mips_fulong2e_init(MachineState *machine)
>  
>      /* Init internal devices */
>      cpu_mips_irq_init_cpu(env);
> -    cpu_mips_clock_init(env);
> +    cpu_mips_clock_init(env, 100*1000*1000);
>  
>      /* North bridge, Bonito --> IP2 */
>      pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index 9d60633..02629fa 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -210,7 +210,7 @@ static void mips_jazz_init(MachineState *machine,
>  
>      /* Init CPU internal devices */
>      cpu_mips_irq_init_cpu(env);
> -    cpu_mips_clock_init(env);
> +    cpu_mips_clock_init(env, 100*1000*1000);
>  
>      /* Chipset */
>      rc4030 = rc4030_init(&dmas, &rc4030_dma_mr);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 3082e75..0393017 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -988,7 +988,7 @@ void mips_malta_init(MachineState *machine)
>  
>          /* Init internal devices */
>          cpu_mips_irq_init_cpu(env);
> -        cpu_mips_clock_init(env);
> +        cpu_mips_clock_init(env, 100*1000*1000);
>          qemu_register_reset(main_cpu_reset, cpu);
>      }
>      cpu = MIPS_CPU(first_cpu);
> @@ -1144,7 +1144,7 @@ void mips_malta_init(MachineState *machine)
>  
>      /* Init internal devices */
>      cpu_mips_irq_init_cpu(env);
> -    cpu_mips_clock_init(env);
> +    cpu_mips_clock_init(env, 100*1000*1000);
>  
>      /*
>       * We have a circular dependency problem: pci_bus depends on isa_irq,
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index 61f74a6..940ca58 100644
> --- a/hw/mips/mips_mipssim.c
> +++ b/hw/mips/mips_mipssim.c
> @@ -213,7 +213,7 @@ mips_mipssim_init(MachineState *machine)
>  
>      /* Init CPU internal devices. */
>      cpu_mips_irq_init_cpu(env);
> -    cpu_mips_clock_init(env);
> +    cpu_mips_clock_init(env, 100*1000*1000);
>  
>      /* Register 64 KB of ISA IO space at 0x1fd00000. */
>      memory_region_init_alias(isa, NULL, "isa_mmio",
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index f4dcacd..5f0b766 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -266,7 +266,7 @@ void mips_r4k_init(MachineState *machine)
>  
>      /* Init CPU internal devices */
>      cpu_mips_irq_init_cpu(env);
> -    cpu_mips_clock_init(env);
> +    cpu_mips_clock_init(env, 100*1000*1000);
>  
>      /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
>      memory_region_init_alias(isa_io, NULL, "isa-io",
> diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
> index b2626f2..4d4e62a 100644
> --- a/include/hw/mips/cpudevs.h
> +++ b/include/hw/mips/cpudevs.h
> @@ -12,6 +12,6 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
>  void cpu_mips_irq_init_cpu(CPUMIPSState *env);
>  
>  /* mips_timer.c */
> -void cpu_mips_clock_init(CPUMIPSState *);
> +void cpu_mips_clock_init(CPUMIPSState *, unsigned count_freq);
>  
>  #endif
> diff --git a/target-mips/cpu.h b/target-mips/cpu.h
> index 474a0e3..c476166 100644
> --- a/target-mips/cpu.h
> +++ b/target-mips/cpu.h
> @@ -595,6 +595,7 @@ struct CPUMIPSState {
>      const mips_def_t *cpu_model;
>      void *irq[8];
>      QEMUTimer *timer; /* Internal timer */
> +    unsigned count_freq; /* rate of Count register */
>  };
>  
>  #include "cpu-qom.h"
> -- 
> 1.9.1
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

  reply	other threads:[~2015-07-01 10:03 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-01  4:12 [Qemu-devel] [PATCH pic32 v2 0/5] Support for Microchip pic32mx7 and pic32mz microcontrollers Serge Vakulenko
     [not found] ` <cover.1435723168.git.serge.vakulenko@gmail.com>
2015-07-01  4:12   ` [Qemu-devel] [PATCH pic32 v2 1/5] Speed of MIPS CPU timer made configurable per platform Serge Vakulenko
2015-07-01 10:02     ` Aurelien Jarno [this message]
2015-07-05 23:25       ` Serge Vakulenko
2015-07-06  8:31         ` Aurelien Jarno
2015-07-01  4:12   ` [Qemu-devel] [PATCH pic32 v2 2/5] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries Serge Vakulenko
2015-07-01 10:11     ` Aurelien Jarno
2015-07-03 21:39       ` Maciej W. Rozycki
2015-07-06  0:16         ` Serge Vakulenko
2015-07-06  0:03       ` Serge Vakulenko
2015-07-06  8:32         ` Aurelien Jarno
2015-07-02  7:52     ` Antony Pavlov
2015-07-06  0:06       ` Serge Vakulenko
2015-07-01  4:12   ` [Qemu-devel] [PATCH pic32 v2 3/5] Added support for external interrupt controller (EIC) mode Serge Vakulenko
2015-07-01 11:07     ` Aurelien Jarno
2015-07-06  3:05       ` Serge Vakulenko
2015-07-06  3:31         ` Serge Vakulenko
2015-07-06  9:31           ` Aurelien Jarno
2015-07-06  9:28         ` Aurelien Jarno
2015-07-01  4:12   ` [Qemu-devel] [PATCH pic32 v2 4/5] Two new processor variants: M4K and microAptivP Serge Vakulenko
2015-07-01 13:37     ` Aurelien Jarno
2015-07-03 22:04       ` Maciej W. Rozycki
2015-07-06  4:15         ` Serge Vakulenko
2015-07-06  3:48       ` Serge Vakulenko
2015-07-06  8:40         ` Aurelien Jarno
2015-07-01  4:12   ` [Qemu-devel] [PATCH pic32 v2 5/5] Two new machine platforms: pic32mz7 and pic32mz Serge Vakulenko
2015-07-01 13:41     ` Aurelien Jarno
2015-07-06  4:18       ` Serge Vakulenko
2015-07-06  7:33         ` Antony Pavlov
2015-07-06 18:58           ` Serge Vakulenko
2015-07-06 21:43             ` Peter Crosthwaite
2015-07-07  7:30             ` Antony Pavlov
2015-07-07 14:08               ` Aurelien Jarno
2015-07-02  5:56     ` Antony Pavlov
2015-07-06  4:27       ` Serge Vakulenko
2015-07-06  7:55         ` Antony Pavlov
2015-07-02  5:31 ` [Qemu-devel] [PATCH pic32 v2 0/5] Support for Microchip pic32mx7 and pic32mz microcontrollers Antony Pavlov
2015-07-06  0:39   ` Serge Vakulenko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150701100251.GA11361@aurel32.net \
    --to=aurelien@aurel32.net \
    --cc=leon.alrae@imgtec.com \
    --cc=qemu-devel@nongnu.org \
    --cc=serge.vakulenko@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.