From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Weinehall Subject: Re: [PATCH] drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6 Date: Wed, 1 Jul 2015 15:57:02 +0300 Message-ID: <20150701125702.GW14570@boom> References: <1435673207-23030-1-git-send-email-imre.deak@intel.com> <20150630172706.GA28262@amd> <20150701090207.GR5176@intel.com> <20150701095127.GB7969@amd> <20150701105331.GS5176@intel.com> <20150701123524.GE7969@amd> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B5F6A6EB0E for ; Wed, 1 Jul 2015 05:58:09 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20150701123524.GE7969@amd> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Pavel Machek Cc: Paul Bolle , Dirk Griesbach , Jani Nikula , Mikko Rapeli , intel-gfx@lists.freedesktop.org, "Rafael J. Wysocki" , stable@vger.kernel.org, Daniel Vetter , Ilya Tumaykin List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCBKdWwgMDEsIDIwMTUgYXQgMDI6MzU6MjRQTSArMDIwMCwgUGF2ZWwgTWFjaGVrIHdy b3RlOgo+IE9uIFdlZCAyMDE1LTA3LTAxIDEzOjUzOjMxLCBWaWxsZSBTeXJqw6Rsw6Qgd3JvdGU6 Cj4gPiBTdXJlIGl0IGRvZXMuIEV2ZW50dWFsbHkgd2UnbGwgd2FudCB0byBhdm9pZCByZXN1bWlu ZyBydW50aW1lIHN1c3BlbmRlZAo+ID4gZGV2aWNlcyB3aGVuIGVudGVyaW5nIHN5c3RlbSBzdXNw ZW5kLiBGb3IgYnJva2VuIG1hY2hpbmVzIHdlJ2QgbmVlZCB0bwo+ID4gcmVzdW1lIHRoZSBHUFUg YXQgdGhhdCBwb2ludC4KPiAKPiBZb3Ugd2FudCB0byBvcHRpbWl6ZSB0cmFuc2l0aW9uIGJldHdl ZW4gc3VzcGVuZC10by1SQU0gYW5kCj4gaGliZXJuYXRpb24/IE5vPyBJIHRob3VnaHQgc28uCj4g Cj4gU28gbm8gYmVuZWZpdHMsIDcgcmVhbCwgYnJva2VuIG1hY2hpbmVzLgoKUnVudGltZSBzdXNw ZW5kID0gdGhpbmdzIGxpa2UgUzBpeCBhbmQgb3RoZXIgZm9ybXMgb2Ygc2hhbGxvdyBzbGVlcC4K U3lzdGVtIHN1c3BlbmQgPSBzdXNwZW5kLXRvLVJBTS4KCkl0J3Mgbm90IGFib3V0IGhpYmVybmF0 ZSAodGhvdWdoIGl0J2Qgb2YgY291cnNlIG5pY2UgaWYgYSB0cmFuc2l0aW9uCmZyb20gc3VzcGVu ZCB0byBoaWJlcm5hdGUgYmVjYXVzZSBvZiBsb3cgYmF0dGVyeSB3b24ndCByZXN1bHQgaW4gdGhl CmRldmljZSBjb25zdW1pbmcgc28gbXVjaCBiYXR0ZXJ5IGR1cmluZyB0aGUgaW50ZXJtZWRpYXRl IHdha2V1cCB0aGF0CnRoZSBkZXZpY2Ugc2h1dHMgZG93biByYXRoZXIgdGhhbiBoaWJlcm5hdGVz KS4KCgpLaW5kIHJlZ2FyZHMsIERhdmlkCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZy ZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGlu Zm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com ([134.134.136.20]:28361 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752430AbbGAM6J (ORCPT ); Wed, 1 Jul 2015 08:58:09 -0400 Date: Wed, 1 Jul 2015 15:57:02 +0300 From: David Weinehall To: Pavel Machek Cc: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= , Paul Bolle , Dirk Griesbach , Jani Nikula , Mikko Rapeli , "Rafael J. Wysocki" , stable@vger.kernel.org, Daniel Vetter , intel-gfx@lists.freedesktop.org, Ilya Tumaykin Subject: Re: [Intel-gfx] [PATCH] drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6 Message-ID: <20150701125702.GW14570@boom> References: <1435673207-23030-1-git-send-email-imre.deak@intel.com> <20150630172706.GA28262@amd> <20150701090207.GR5176@intel.com> <20150701095127.GB7969@amd> <20150701105331.GS5176@intel.com> <20150701123524.GE7969@amd> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20150701123524.GE7969@amd> Sender: stable-owner@vger.kernel.org List-ID: On Wed, Jul 01, 2015 at 02:35:24PM +0200, Pavel Machek wrote: > On Wed 2015-07-01 13:53:31, Ville Syrj�l� wrote: > > Sure it does. Eventually we'll want to avoid resuming runtime suspended > > devices when entering system suspend. For broken machines we'd need to > > resume the GPU at that point. > > You want to optimize transition between suspend-to-RAM and > hibernation? No? I thought so. > > So no benefits, 7 real, broken machines. Runtime suspend = things like S0ix and other forms of shallow sleep. System suspend = suspend-to-RAM. It's not about hibernate (though it'd of course nice if a transition from suspend to hibernate because of low battery won't result in the device consuming so much battery during the intermediate wakeup that the device shuts down rather than hibernates). Kind regards, David