From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tony Lindgren <tony@atomide.com>
Subject: Re: [PATCH] pinctrl: single: support GPIO for bits pinctrl
Date: Mon, 6 Jul 2015 03:40:00 -0700
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To: Jun Nie <jun.nie@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>, Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org, Shawn Guo <shawn.guo@linaro.org>, "wan.zhijun" <wan.zhijun@zte.com.cn>, Jason Liu <jason.liu@linaro.org>

* Jun Nie <jun.nie@linaro.org> [150706 02:21]:
> 2015-07-06 17:03 GMT+08:00 Tony Lindgren <tony@atomide.com>:
> > * Jun Nie <jun.nie@linaro.org> [150706 01:43]:
> >> 2015-06-23 18:18 GMT+08:00 Jun Nie <jun.nie@linaro.org>:
> >> > 2015-06-23 18:14 GMT+08:00 Tony Lindgren <tony@atomide.com>:
> >> >> * Jun Nie <jun.nie@linaro.org> [150623 02:56]:
> >> >>> 2015-06-17 15:17 GMT+08:00 Tony Lindgren <tony@atomide.com>:
> >> >>> > * Jun Nie <jun.nie@linaro.org> [150616 18:58]:
> >> >>> >> +             if (pcs->bits_per_mux) {
> >> >>> >> +                     int pin_pos, byte_num, num_pins_in_register;
> >> >>> >> +
> >> >>> >> +                     num_pins_in_register = pcs->width / pcs->bits_per_pin;
> >> >>> >> +                     byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
> >> >>> >> +                     offset = (byte_num / mux_bytes) * mux_bytes;
> >> >>> >> +                     pin_pos = pin % num_pins_in_register;
> >> >>> >> +                     pin_pos *= pcs->bits_per_pin;
> >> >>> >> +                     data = pcs->read(pcs->base + offset) &
> >> >>> >> +                             ~(pcs->fmask << pin_pos);
> >> >>> >
> >> >>> > Should you check the pcs->fmask here too in case some bits are reserved?
> >> >>> >
> >> >>> Did not catch your idea? Those bits set in fmask are dedicated for one
> >> >>> pin mux control and should be clear before set as desired value per my
> >> >>> understanding. Do you mean some bits may be reserved and not for any
> >> >>> function?
> >> >>
> >> >> Right, can you please check that we don't try to write to reserved
> >> >> bits in the hardawre if the mask is set?
> >>
> >> > Then I have question that how can I know what bits is for function
> >> > mask, what bits are for reserved? Do we have any other value to
> >> > indicate it? I did not find it in one register for one pin mux case.
> >>
> >> Could you help elaborate this? Thanks!
> >
> > We can only write to the bits specified in pinctrl-single,function-mask.
> >
> I see, you want below mask to make sure gpiofunc value does not exceed
> expected bits though it should be safe if dts data is correct. Right?
> +                       data = pcs->read(pcs->base + offset) &
> +                               ~(pcs->fmask << pin_pos);
> +                       data |= (pcs->fmask & frange->gpiofunc) << pin_pos;

Yes please :)

Tony