diff for duplicates of <20150707114217.GV3182@x1> diff --git a/a/1.txt b/N1/1.txt index 81e9992..f08d184 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,48 +1,54 @@ On Wed, 01 Jul 2015, S Twiss wrote: -> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> -> +> From: S Twiss <stwiss.opensource@diasemi.com> +>=20 > Add MFD core driver support for DA9062 -> -> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> -> +>=20 +> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> +>=20 > --- > Changes in V5: > - Alter register.h file with the following: > bit macro change defines of the form (0x01<<N) to BIT(N) > zero shift change defines of the form (0xM<<0) to 0xM -> +>=20 > Changes in V4: > - Removal of struct da9062 unrequired data from core.h and driver code > - Remove IRQ handler for VDD_WARN and corresponding IRQ request code > - Use DEFINE_RES_NAMED() macro for resource definitions > - Refactor da9062_clear_fault_log() to remove inconsistencies > - Refactor da9062_device_init() and da9062_irq_init() into probe() -> - Add new function get_device_type() for variant and device_id information -> - devm_kzalloc to alloc *chip instead of struct and use not-chip on error +> - Add new function get_device_type() for variant and device_id informati= +on +> - devm_kzalloc to alloc *chip instead of struct and use not-chip on erro= +r > - Move da9062_dt_ids closer to usage > - Move LUT definitions into da9062_regmap_config structure > - Erase da9062_device_exit() abstractions > - Clean up header inclusions through removal of redundant entries > - Whitespace and string literal discipline -> +>=20 > Changes in V3: > - Removed references to the RTC and OnKey in the mfd_cell definition. -> +>=20 > Changes in V2: -> - Copyright headers GPL v2 (and later) match correct 'GPL' in MODULE_LICENSE -> - Ensure DA9062 core is tristate in Kconfig so it can be built as a module -> - Move VDD_WARN code and resource into the core instead of regulator driver -> +> - Copyright headers GPL v2 (and later) match correct 'GPL' in MODULE_LIC= +ENSE +> - Ensure DA9062 core is tristate in Kconfig so it can be built as a modu= +le +> - Move VDD_WARN code and resource into the core instead of regulator dri= +ver +>=20 > This patch applies against linux-next and next-20150701 -> -> -> +>=20 +>=20 +>=20 > drivers/mfd/Kconfig | 12 + > drivers/mfd/Makefile | 3 +- > drivers/mfd/da9062-core.c | 512 ++++++++++++++++ > include/linux/mfd/da9062/core.h | 50 ++ -> include/linux/mfd/da9062/registers.h | 1108 ++++++++++++++++++++++++++++++++++ +> include/linux/mfd/da9062/registers.h | 1108 ++++++++++++++++++++++++++++= +++++++ > 5 files changed, 1684 insertions(+), 1 deletion(-) > create mode 100644 drivers/mfd/da9062-core.c > create mode 100644 include/linux/mfd/da9062/core.h @@ -57,13 +63,13 @@ Applied, thanks. > @@ -186,6 +186,18 @@ config MFD_DA9055 > This driver can be built as a module. If built as a module it will be > called "da9055" -> +> =20 > +config MFD_DA9062 > + tristate "Dialog Semiconductor DA9062 PMIC Support" > + select MFD_CORE > + select REGMAP_I2C > + select REGMAP_IRQ -> + depends on I2C=y +> + depends on I2C=3Dy > + help > + Say yes here for support for the Dialog Semiconductor DA9062 PMIC. > + This includes the I2C driver and core APIs. @@ -77,19 +83,19 @@ Applied, thanks. > index ea40e07..fd4d8b4 100644 > --- a/drivers/mfd/Makefile > +++ b/drivers/mfd/Makefile -> @@ -110,10 +110,11 @@ obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o -> -> da9055-objs := da9055-core.o da9055-i2c.o -> obj-$(CONFIG_MFD_DA9055) += da9055.o +> @@ -110,10 +110,11 @@ obj-$(CONFIG_MFD_LP8788) +=3D lp8788.o lp8788-irq.o +> =20 +> da9055-objs :=3D da9055-core.o da9055-i2c.o +> obj-$(CONFIG_MFD_DA9055) +=3D da9055.o > - -> +obj-$(CONFIG_MFD_DA9062) += da9062-core.o -> da9063-objs := da9063-core.o da9063-irq.o da9063-i2c.o -> obj-$(CONFIG_MFD_DA9063) += da9063.o -> obj-$(CONFIG_MFD_DA9150) += da9150-core.o -> + -> obj-$(CONFIG_MFD_MAX14577) += max14577.o -> obj-$(CONFIG_MFD_MAX77686) += max77686.o -> obj-$(CONFIG_MFD_MAX77693) += max77693.o +> +obj-$(CONFIG_MFD_DA9062) +=3D da9062-core.o +> da9063-objs :=3D da9063-core.o da9063-irq.o da9063-i2c.o +> obj-$(CONFIG_MFD_DA9063) +=3D da9063.o +> obj-$(CONFIG_MFD_DA9150) +=3D da9150-core.o +> + +> obj-$(CONFIG_MFD_MAX14577) +=3D max14577.o +> obj-$(CONFIG_MFD_MAX77686) +=3D max77686.o +> obj-$(CONFIG_MFD_MAX77693) +=3D max77693.o > diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c > new file mode 100644 > index 0000000..4cf0643 @@ -128,116 +134,116 @@ Applied, thanks. > +#define DA9062_REG_EVENT_B_OFFSET 1 > +#define DA9062_REG_EVENT_C_OFFSET 2 > + -> +static struct regmap_irq da9062_irqs[] = { +> +static struct regmap_irq da9062_irqs[] =3D { > + /* EVENT A */ -> + [DA9062_IRQ_ONKEY] = { -> + .reg_offset = DA9062_REG_EVENT_A_OFFSET, -> + .mask = DA9062AA_M_NONKEY_MASK, +> + [DA9062_IRQ_ONKEY] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_A_OFFSET, +> + .mask =3D DA9062AA_M_NONKEY_MASK, > + }, -> + [DA9062_IRQ_ALARM] = { -> + .reg_offset = DA9062_REG_EVENT_A_OFFSET, -> + .mask = DA9062AA_M_ALARM_MASK, +> + [DA9062_IRQ_ALARM] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_A_OFFSET, +> + .mask =3D DA9062AA_M_ALARM_MASK, > + }, -> + [DA9062_IRQ_TICK] = { -> + .reg_offset = DA9062_REG_EVENT_A_OFFSET, -> + .mask = DA9062AA_M_TICK_MASK, +> + [DA9062_IRQ_TICK] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_A_OFFSET, +> + .mask =3D DA9062AA_M_TICK_MASK, > + }, -> + [DA9062_IRQ_WDG_WARN] = { -> + .reg_offset = DA9062_REG_EVENT_A_OFFSET, -> + .mask = DA9062AA_M_WDG_WARN_MASK, +> + [DA9062_IRQ_WDG_WARN] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_A_OFFSET, +> + .mask =3D DA9062AA_M_WDG_WARN_MASK, > + }, -> + [DA9062_IRQ_SEQ_RDY] = { -> + .reg_offset = DA9062_REG_EVENT_A_OFFSET, -> + .mask = DA9062AA_M_SEQ_RDY_MASK, +> + [DA9062_IRQ_SEQ_RDY] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_A_OFFSET, +> + .mask =3D DA9062AA_M_SEQ_RDY_MASK, > + }, > + /* EVENT B */ -> + [DA9062_IRQ_TEMP] = { -> + .reg_offset = DA9062_REG_EVENT_B_OFFSET, -> + .mask = DA9062AA_M_TEMP_MASK, +> + [DA9062_IRQ_TEMP] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_B_OFFSET, +> + .mask =3D DA9062AA_M_TEMP_MASK, > + }, -> + [DA9062_IRQ_LDO_LIM] = { -> + .reg_offset = DA9062_REG_EVENT_B_OFFSET, -> + .mask = DA9062AA_M_LDO_LIM_MASK, +> + [DA9062_IRQ_LDO_LIM] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_B_OFFSET, +> + .mask =3D DA9062AA_M_LDO_LIM_MASK, > + }, -> + [DA9062_IRQ_DVC_RDY] = { -> + .reg_offset = DA9062_REG_EVENT_B_OFFSET, -> + .mask = DA9062AA_M_DVC_RDY_MASK, +> + [DA9062_IRQ_DVC_RDY] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_B_OFFSET, +> + .mask =3D DA9062AA_M_DVC_RDY_MASK, > + }, -> + [DA9062_IRQ_VDD_WARN] = { -> + .reg_offset = DA9062_REG_EVENT_B_OFFSET, -> + .mask = DA9062AA_M_VDD_WARN_MASK, +> + [DA9062_IRQ_VDD_WARN] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_B_OFFSET, +> + .mask =3D DA9062AA_M_VDD_WARN_MASK, > + }, > + /* EVENT C */ -> + [DA9062_IRQ_GPI0] = { -> + .reg_offset = DA9062_REG_EVENT_C_OFFSET, -> + .mask = DA9062AA_M_GPI0_MASK, +> + [DA9062_IRQ_GPI0] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_C_OFFSET, +> + .mask =3D DA9062AA_M_GPI0_MASK, > + }, -> + [DA9062_IRQ_GPI1] = { -> + .reg_offset = DA9062_REG_EVENT_C_OFFSET, -> + .mask = DA9062AA_M_GPI1_MASK, +> + [DA9062_IRQ_GPI1] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_C_OFFSET, +> + .mask =3D DA9062AA_M_GPI1_MASK, > + }, -> + [DA9062_IRQ_GPI2] = { -> + .reg_offset = DA9062_REG_EVENT_C_OFFSET, -> + .mask = DA9062AA_M_GPI2_MASK, +> + [DA9062_IRQ_GPI2] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_C_OFFSET, +> + .mask =3D DA9062AA_M_GPI2_MASK, > + }, -> + [DA9062_IRQ_GPI3] = { -> + .reg_offset = DA9062_REG_EVENT_C_OFFSET, -> + .mask = DA9062AA_M_GPI3_MASK, +> + [DA9062_IRQ_GPI3] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_C_OFFSET, +> + .mask =3D DA9062AA_M_GPI3_MASK, > + }, -> + [DA9062_IRQ_GPI4] = { -> + .reg_offset = DA9062_REG_EVENT_C_OFFSET, -> + .mask = DA9062AA_M_GPI4_MASK, +> + [DA9062_IRQ_GPI4] =3D { +> + .reg_offset =3D DA9062_REG_EVENT_C_OFFSET, +> + .mask =3D DA9062AA_M_GPI4_MASK, > + }, > +}; > + -> +static struct regmap_irq_chip da9062_irq_chip = { -> + .name = "da9062-irq", -> + .irqs = da9062_irqs, -> + .num_irqs = DA9062_NUM_IRQ, -> + .num_regs = 3, -> + .status_base = DA9062AA_EVENT_A, -> + .mask_base = DA9062AA_IRQ_MASK_A, -> + .ack_base = DA9062AA_EVENT_A, +> +static struct regmap_irq_chip da9062_irq_chip =3D { +> + .name =3D "da9062-irq", +> + .irqs =3D da9062_irqs, +> + .num_irqs =3D DA9062_NUM_IRQ, +> + .num_regs =3D 3, +> + .status_base =3D DA9062AA_EVENT_A, +> + .mask_base =3D DA9062AA_IRQ_MASK_A, +> + .ack_base =3D DA9062AA_EVENT_A, > +}; > + -> +static struct resource da9062_core_resources[] = { +> +static struct resource da9062_core_resources[] =3D { > + DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ), > +}; > + -> +static struct resource da9062_regulators_resources[] = { +> +static struct resource da9062_regulators_resources[] =3D { > + DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ), > +}; > + -> +static struct resource da9062_thermal_resources[] = { +> +static struct resource da9062_thermal_resources[] =3D { > + DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ), > +}; > + -> +static struct resource da9062_wdt_resources[] = { +> +static struct resource da9062_wdt_resources[] =3D { > + DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ), > +}; > + -> +static const struct mfd_cell da9062_devs[] = { +> +static const struct mfd_cell da9062_devs[] =3D { > + { -> + .name = "da9062-core", -> + .num_resources = ARRAY_SIZE(da9062_core_resources), -> + .resources = da9062_core_resources, +> + .name =3D "da9062-core", +> + .num_resources =3D ARRAY_SIZE(da9062_core_resources), +> + .resources =3D da9062_core_resources, > + }, > + { -> + .name = "da9062-regulators", -> + .num_resources = ARRAY_SIZE(da9062_regulators_resources), -> + .resources = da9062_regulators_resources, +> + .name =3D "da9062-regulators", +> + .num_resources =3D ARRAY_SIZE(da9062_regulators_resources), +> + .resources =3D da9062_regulators_resources, > + }, > + { -> + .name = "da9062-watchdog", -> + .num_resources = ARRAY_SIZE(da9062_wdt_resources), -> + .resources = da9062_wdt_resources, -> + .of_compatible = "dlg,da9062-wdt", +> + .name =3D "da9062-watchdog", +> + .num_resources =3D ARRAY_SIZE(da9062_wdt_resources), +> + .resources =3D da9062_wdt_resources, +> + .of_compatible =3D "dlg,da9062-wdt", > + }, > + { -> + .name = "da9062-thermal", -> + .num_resources = ARRAY_SIZE(da9062_thermal_resources), -> + .resources = da9062_thermal_resources, -> + .of_compatible = "dlg,da9062-thermal", +> + .name =3D "da9062-thermal", +> + .num_resources =3D ARRAY_SIZE(da9062_thermal_resources), +> + .resources =3D da9062_thermal_resources, +> + .of_compatible =3D "dlg,da9062-thermal", > + }, > +}; > + @@ -246,7 +252,7 @@ Applied, thanks. > + int ret; > + int fault_log; > + -> + ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log); +> + ret =3D regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log); > + if (ret < 0) > + return ret; > + @@ -268,7 +274,7 @@ Applied, thanks. > + if (fault_log & DA9062AA_WAIT_SHUT_MASK) > + dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n"); > + -> + ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG, +> + ret =3D regmap_write(chip->regmap, DA9062AA_FAULT_LOG, > + fault_log); > + } > + @@ -280,17 +286,17 @@ Applied, thanks. > + int device_id, variant_id, variant_mrc; > + int ret; > + -> + ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id); +> + ret =3D regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id); > + if (ret < 0) { > + dev_err(chip->dev, "Cannot read chip ID.\n"); > + return -EIO; > + } -> + if (device_id != DA9062_PMIC_DEVICE_ID) { +> + if (device_id !=3D DA9062_PMIC_DEVICE_ID) { > + dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id); > + return -ENODEV; > + } > + -> + ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id); +> + ret =3D regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id); > + if (ret < 0) { > + dev_err(chip->dev, "Cannot read chip variant id.\n"); > + return -EIO; @@ -300,7 +306,7 @@ Applied, thanks. > + "Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n", > + device_id, variant_id); > + -> + variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT; +> + variant_mrc =3D (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT; > + > + if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) { > + dev_err(chip->dev, @@ -311,205 +317,205 @@ Applied, thanks. > + return ret; > +} > + -> +static const struct regmap_range da9062_aa_readable_ranges[] = { +> +static const struct regmap_range da9062_aa_readable_ranges[] =3D { > + { -> + .range_min = DA9062AA_PAGE_CON, -> + .range_max = DA9062AA_STATUS_B, +> + .range_min =3D DA9062AA_PAGE_CON, +> + .range_max =3D DA9062AA_STATUS_B, > + }, { -> + .range_min = DA9062AA_STATUS_D, -> + .range_max = DA9062AA_EVENT_C, +> + .range_min =3D DA9062AA_STATUS_D, +> + .range_max =3D DA9062AA_EVENT_C, > + }, { -> + .range_min = DA9062AA_IRQ_MASK_A, -> + .range_max = DA9062AA_IRQ_MASK_C, +> + .range_min =3D DA9062AA_IRQ_MASK_A, +> + .range_max =3D DA9062AA_IRQ_MASK_C, > + }, { -> + .range_min = DA9062AA_CONTROL_A, -> + .range_max = DA9062AA_GPIO_4, +> + .range_min =3D DA9062AA_CONTROL_A, +> + .range_max =3D DA9062AA_GPIO_4, > + }, { -> + .range_min = DA9062AA_GPIO_WKUP_MODE, -> + .range_max = DA9062AA_BUCK4_CONT, +> + .range_min =3D DA9062AA_GPIO_WKUP_MODE, +> + .range_max =3D DA9062AA_BUCK4_CONT, > + }, { -> + .range_min = DA9062AA_BUCK3_CONT, -> + .range_max = DA9062AA_BUCK3_CONT, +> + .range_min =3D DA9062AA_BUCK3_CONT, +> + .range_max =3D DA9062AA_BUCK3_CONT, > + }, { -> + .range_min = DA9062AA_LDO1_CONT, -> + .range_max = DA9062AA_LDO4_CONT, +> + .range_min =3D DA9062AA_LDO1_CONT, +> + .range_max =3D DA9062AA_LDO4_CONT, > + }, { -> + .range_min = DA9062AA_DVC_1, -> + .range_max = DA9062AA_DVC_1, +> + .range_min =3D DA9062AA_DVC_1, +> + .range_max =3D DA9062AA_DVC_1, > + }, { -> + .range_min = DA9062AA_COUNT_S, -> + .range_max = DA9062AA_SECOND_D, +> + .range_min =3D DA9062AA_COUNT_S, +> + .range_max =3D DA9062AA_SECOND_D, > + }, { -> + .range_min = DA9062AA_SEQ, -> + .range_max = DA9062AA_ID_4_3, +> + .range_min =3D DA9062AA_SEQ, +> + .range_max =3D DA9062AA_ID_4_3, > + }, { -> + .range_min = DA9062AA_ID_12_11, -> + .range_max = DA9062AA_ID_16_15, +> + .range_min =3D DA9062AA_ID_12_11, +> + .range_max =3D DA9062AA_ID_16_15, > + }, { -> + .range_min = DA9062AA_ID_22_21, -> + .range_max = DA9062AA_ID_32_31, +> + .range_min =3D DA9062AA_ID_22_21, +> + .range_max =3D DA9062AA_ID_32_31, > + }, { -> + .range_min = DA9062AA_SEQ_A, -> + .range_max = DA9062AA_BUCK3_CFG, +> + .range_min =3D DA9062AA_SEQ_A, +> + .range_max =3D DA9062AA_BUCK3_CFG, > + }, { -> + .range_min = DA9062AA_VBUCK2_A, -> + .range_max = DA9062AA_VBUCK4_A, +> + .range_min =3D DA9062AA_VBUCK2_A, +> + .range_max =3D DA9062AA_VBUCK4_A, > + }, { -> + .range_min = DA9062AA_VBUCK3_A, -> + .range_max = DA9062AA_VBUCK3_A, +> + .range_min =3D DA9062AA_VBUCK3_A, +> + .range_max =3D DA9062AA_VBUCK3_A, > + }, { -> + .range_min = DA9062AA_VLDO1_A, -> + .range_max = DA9062AA_VLDO4_A, +> + .range_min =3D DA9062AA_VLDO1_A, +> + .range_max =3D DA9062AA_VLDO4_A, > + }, { -> + .range_min = DA9062AA_VBUCK2_B, -> + .range_max = DA9062AA_VBUCK4_B, +> + .range_min =3D DA9062AA_VBUCK2_B, +> + .range_max =3D DA9062AA_VBUCK4_B, > + }, { -> + .range_min = DA9062AA_VBUCK3_B, -> + .range_max = DA9062AA_VBUCK3_B, +> + .range_min =3D DA9062AA_VBUCK3_B, +> + .range_max =3D DA9062AA_VBUCK3_B, > + }, { -> + .range_min = DA9062AA_VLDO1_B, -> + .range_max = DA9062AA_VLDO4_B, +> + .range_min =3D DA9062AA_VLDO1_B, +> + .range_max =3D DA9062AA_VLDO4_B, > + }, { -> + .range_min = DA9062AA_BBAT_CONT, -> + .range_max = DA9062AA_BBAT_CONT, +> + .range_min =3D DA9062AA_BBAT_CONT, +> + .range_max =3D DA9062AA_BBAT_CONT, > + }, { -> + .range_min = DA9062AA_INTERFACE, -> + .range_max = DA9062AA_CONFIG_E, +> + .range_min =3D DA9062AA_INTERFACE, +> + .range_max =3D DA9062AA_CONFIG_E, > + }, { -> + .range_min = DA9062AA_CONFIG_G, -> + .range_max = DA9062AA_CONFIG_K, +> + .range_min =3D DA9062AA_CONFIG_G, +> + .range_max =3D DA9062AA_CONFIG_K, > + }, { -> + .range_min = DA9062AA_CONFIG_M, -> + .range_max = DA9062AA_CONFIG_M, +> + .range_min =3D DA9062AA_CONFIG_M, +> + .range_max =3D DA9062AA_CONFIG_M, > + }, { -> + .range_min = DA9062AA_TRIM_CLDR, -> + .range_max = DA9062AA_GP_ID_19, +> + .range_min =3D DA9062AA_TRIM_CLDR, +> + .range_max =3D DA9062AA_GP_ID_19, > + }, { -> + .range_min = DA9062AA_DEVICE_ID, -> + .range_max = DA9062AA_CONFIG_ID, +> + .range_min =3D DA9062AA_DEVICE_ID, +> + .range_max =3D DA9062AA_CONFIG_ID, > + }, > +}; > + -> +static const struct regmap_range da9062_aa_writeable_ranges[] = { +> +static const struct regmap_range da9062_aa_writeable_ranges[] =3D { > + { -> + .range_min = DA9062AA_PAGE_CON, -> + .range_max = DA9062AA_PAGE_CON, +> + .range_min =3D DA9062AA_PAGE_CON, +> + .range_max =3D DA9062AA_PAGE_CON, > + }, { -> + .range_min = DA9062AA_FAULT_LOG, -> + .range_max = DA9062AA_EVENT_C, +> + .range_min =3D DA9062AA_FAULT_LOG, +> + .range_max =3D DA9062AA_EVENT_C, > + }, { -> + .range_min = DA9062AA_IRQ_MASK_A, -> + .range_max = DA9062AA_IRQ_MASK_C, +> + .range_min =3D DA9062AA_IRQ_MASK_A, +> + .range_max =3D DA9062AA_IRQ_MASK_C, > + }, { -> + .range_min = DA9062AA_CONTROL_A, -> + .range_max = DA9062AA_GPIO_4, +> + .range_min =3D DA9062AA_CONTROL_A, +> + .range_max =3D DA9062AA_GPIO_4, > + }, { -> + .range_min = DA9062AA_GPIO_WKUP_MODE, -> + .range_max = DA9062AA_BUCK4_CONT, +> + .range_min =3D DA9062AA_GPIO_WKUP_MODE, +> + .range_max =3D DA9062AA_BUCK4_CONT, > + }, { -> + .range_min = DA9062AA_BUCK3_CONT, -> + .range_max = DA9062AA_BUCK3_CONT, +> + .range_min =3D DA9062AA_BUCK3_CONT, +> + .range_max =3D DA9062AA_BUCK3_CONT, > + }, { -> + .range_min = DA9062AA_LDO1_CONT, -> + .range_max = DA9062AA_LDO4_CONT, +> + .range_min =3D DA9062AA_LDO1_CONT, +> + .range_max =3D DA9062AA_LDO4_CONT, > + }, { -> + .range_min = DA9062AA_DVC_1, -> + .range_max = DA9062AA_DVC_1, +> + .range_min =3D DA9062AA_DVC_1, +> + .range_max =3D DA9062AA_DVC_1, > + }, { -> + .range_min = DA9062AA_COUNT_S, -> + .range_max = DA9062AA_ALARM_Y, +> + .range_min =3D DA9062AA_COUNT_S, +> + .range_max =3D DA9062AA_ALARM_Y, > + }, { -> + .range_min = DA9062AA_SEQ, -> + .range_max = DA9062AA_ID_4_3, +> + .range_min =3D DA9062AA_SEQ, +> + .range_max =3D DA9062AA_ID_4_3, > + }, { -> + .range_min = DA9062AA_ID_12_11, -> + .range_max = DA9062AA_ID_16_15, +> + .range_min =3D DA9062AA_ID_12_11, +> + .range_max =3D DA9062AA_ID_16_15, > + }, { -> + .range_min = DA9062AA_ID_22_21, -> + .range_max = DA9062AA_ID_32_31, +> + .range_min =3D DA9062AA_ID_22_21, +> + .range_max =3D DA9062AA_ID_32_31, > + }, { -> + .range_min = DA9062AA_SEQ_A, -> + .range_max = DA9062AA_BUCK3_CFG, +> + .range_min =3D DA9062AA_SEQ_A, +> + .range_max =3D DA9062AA_BUCK3_CFG, > + }, { -> + .range_min = DA9062AA_VBUCK2_A, -> + .range_max = DA9062AA_VBUCK4_A, +> + .range_min =3D DA9062AA_VBUCK2_A, +> + .range_max =3D DA9062AA_VBUCK4_A, > + }, { -> + .range_min = DA9062AA_VBUCK3_A, -> + .range_max = DA9062AA_VBUCK3_A, +> + .range_min =3D DA9062AA_VBUCK3_A, +> + .range_max =3D DA9062AA_VBUCK3_A, > + }, { -> + .range_min = DA9062AA_VLDO1_A, -> + .range_max = DA9062AA_VLDO4_A, +> + .range_min =3D DA9062AA_VLDO1_A, +> + .range_max =3D DA9062AA_VLDO4_A, > + }, { -> + .range_min = DA9062AA_VBUCK2_B, -> + .range_max = DA9062AA_VBUCK4_B, +> + .range_min =3D DA9062AA_VBUCK2_B, +> + .range_max =3D DA9062AA_VBUCK4_B, > + }, { -> + .range_min = DA9062AA_VBUCK3_B, -> + .range_max = DA9062AA_VBUCK3_B, +> + .range_min =3D DA9062AA_VBUCK3_B, +> + .range_max =3D DA9062AA_VBUCK3_B, > + }, { -> + .range_min = DA9062AA_VLDO1_B, -> + .range_max = DA9062AA_VLDO4_B, +> + .range_min =3D DA9062AA_VLDO1_B, +> + .range_max =3D DA9062AA_VLDO4_B, > + }, { -> + .range_min = DA9062AA_BBAT_CONT, -> + .range_max = DA9062AA_BBAT_CONT, +> + .range_min =3D DA9062AA_BBAT_CONT, +> + .range_max =3D DA9062AA_BBAT_CONT, > + }, { -> + .range_min = DA9062AA_GP_ID_0, -> + .range_max = DA9062AA_GP_ID_19, +> + .range_min =3D DA9062AA_GP_ID_0, +> + .range_max =3D DA9062AA_GP_ID_19, > + }, > +}; > + -> +static const struct regmap_range da9062_aa_volatile_ranges[] = { +> +static const struct regmap_range da9062_aa_volatile_ranges[] =3D { > + { -> + .range_min = DA9062AA_PAGE_CON, -> + .range_max = DA9062AA_STATUS_B, +> + .range_min =3D DA9062AA_PAGE_CON, +> + .range_max =3D DA9062AA_STATUS_B, > + }, { -> + .range_min = DA9062AA_STATUS_D, -> + .range_max = DA9062AA_EVENT_C, +> + .range_min =3D DA9062AA_STATUS_D, +> + .range_max =3D DA9062AA_EVENT_C, > + }, { -> + .range_min = DA9062AA_CONTROL_F, -> + .range_max = DA9062AA_CONTROL_F, +> + .range_min =3D DA9062AA_CONTROL_F, +> + .range_max =3D DA9062AA_CONTROL_F, > + }, { -> + .range_min = DA9062AA_COUNT_S, -> + .range_max = DA9062AA_SECOND_D, +> + .range_min =3D DA9062AA_COUNT_S, +> + .range_max =3D DA9062AA_SECOND_D, > + }, > +}; > + -> +static const struct regmap_access_table da9062_aa_readable_table = { -> + .yes_ranges = da9062_aa_readable_ranges, -> + .n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges), +> +static const struct regmap_access_table da9062_aa_readable_table =3D { +> + .yes_ranges =3D da9062_aa_readable_ranges, +> + .n_yes_ranges =3D ARRAY_SIZE(da9062_aa_readable_ranges), > +}; > + -> +static const struct regmap_access_table da9062_aa_writeable_table = { -> + .yes_ranges = da9062_aa_writeable_ranges, -> + .n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges), +> +static const struct regmap_access_table da9062_aa_writeable_table =3D { +> + .yes_ranges =3D da9062_aa_writeable_ranges, +> + .n_yes_ranges =3D ARRAY_SIZE(da9062_aa_writeable_ranges), > +}; > + -> +static const struct regmap_access_table da9062_aa_volatile_table = { -> + .yes_ranges = da9062_aa_volatile_ranges, -> + .n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges), +> +static const struct regmap_access_table da9062_aa_volatile_table =3D { +> + .yes_ranges =3D da9062_aa_volatile_ranges, +> + .n_yes_ranges =3D ARRAY_SIZE(da9062_aa_volatile_ranges), > +}; > + -> +static const struct regmap_range_cfg da9062_range_cfg[] = { +> +static const struct regmap_range_cfg da9062_range_cfg[] =3D { > + { -> + .range_min = DA9062AA_PAGE_CON, -> + .range_max = DA9062AA_CONFIG_ID, -> + .selector_reg = DA9062AA_PAGE_CON, -> + .selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT, -> + .selector_shift = DA9062_I2C_PAGE_SEL_SHIFT, -> + .window_start = 0, -> + .window_len = 256, +> + .range_min =3D DA9062AA_PAGE_CON, +> + .range_max =3D DA9062AA_CONFIG_ID, +> + .selector_reg =3D DA9062AA_PAGE_CON, +> + .selector_mask =3D 1 << DA9062_I2C_PAGE_SEL_SHIFT, +> + .selector_shift =3D DA9062_I2C_PAGE_SEL_SHIFT, +> + .window_start =3D 0, +> + .window_len =3D 256, > + } > +}; > + -> +static struct regmap_config da9062_regmap_config = { -> + .reg_bits = 8, -> + .val_bits = 8, -> + .ranges = da9062_range_cfg, -> + .num_ranges = ARRAY_SIZE(da9062_range_cfg), -> + .max_register = DA9062AA_CONFIG_ID, -> + .cache_type = REGCACHE_RBTREE, -> + .rd_table = &da9062_aa_readable_table, -> + .wr_table = &da9062_aa_writeable_table, -> + .volatile_table = &da9062_aa_volatile_table, +> +static struct regmap_config da9062_regmap_config =3D { +> + .reg_bits =3D 8, +> + .val_bits =3D 8, +> + .ranges =3D da9062_range_cfg, +> + .num_ranges =3D ARRAY_SIZE(da9062_range_cfg), +> + .max_register =3D DA9062AA_CONFIG_ID, +> + .cache_type =3D REGCACHE_RBTREE, +> + .rd_table =3D &da9062_aa_readable_table, +> + .wr_table =3D &da9062_aa_writeable_table, +> + .volatile_table =3D &da9062_aa_volatile_table, > +}; > + > +static int da9062_i2c_probe(struct i2c_client *i2c, @@ -519,35 +525,35 @@ Applied, thanks. > + unsigned int irq_base; > + int ret; > + -> + chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL); +> + chip =3D devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL); > + if (!chip) > + return -ENOMEM; > + > + i2c_set_clientdata(i2c, chip); -> + chip->dev = &i2c->dev; +> + chip->dev =3D &i2c->dev; > + > + if (!i2c->irq) { > + dev_err(chip->dev, "No IRQ configured\n"); > + return -EINVAL; > + } > + -> + chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config); +> + chip->regmap =3D devm_regmap_init_i2c(i2c, &da9062_regmap_config); > + if (IS_ERR(chip->regmap)) { -> + ret = PTR_ERR(chip->regmap); +> + ret =3D PTR_ERR(chip->regmap); > + dev_err(chip->dev, "Failed to allocate register map: %d\n", > + ret); > + return ret; > + } > + -> + ret = da9062_clear_fault_log(chip); +> + ret =3D da9062_clear_fault_log(chip); > + if (ret < 0) > + dev_warn(chip->dev, "Cannot clear fault log\n"); > + -> + ret = get_device_type(chip); +> + ret =3D get_device_type(chip); > + if (ret) > + return ret; > + -> + ret = regmap_add_irq_chip(chip->regmap, i2c->irq, +> + ret =3D regmap_add_irq_chip(chip->regmap, i2c->irq, > + IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, > + -1, &da9062_irq_chip, > + &chip->regmap_irq); @@ -557,9 +563,9 @@ Applied, thanks. > + return ret; > + } > + -> + irq_base = regmap_irq_chip_get_base(chip->regmap_irq); +> + irq_base =3D regmap_irq_chip_get_base(chip->regmap_irq); > + -> + ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs, +> + ret =3D mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs, > + ARRAY_SIZE(da9062_devs), NULL, irq_base, > + NULL); > + if (ret) { @@ -573,7 +579,7 @@ Applied, thanks. > + > +static int da9062_i2c_remove(struct i2c_client *i2c) > +{ -> + struct da9062 *chip = i2c_get_clientdata(i2c); +> + struct da9062 *chip =3D i2c_get_clientdata(i2c); > + > + mfd_remove_devices(chip->dev); > + regmap_del_irq_chip(i2c->irq, chip->regmap_irq); @@ -581,34 +587,35 @@ Applied, thanks. > + return 0; > +} > + -> +static const struct i2c_device_id da9062_i2c_id[] = { +> +static const struct i2c_device_id da9062_i2c_id[] =3D { > + { "da9062", 0 }, > + { }, > +}; > +MODULE_DEVICE_TABLE(i2c, da9062_i2c_id); > + -> +static const struct of_device_id da9062_dt_ids[] = { -> + { .compatible = "dlg,da9062", }, +> +static const struct of_device_id da9062_dt_ids[] =3D { +> + { .compatible =3D "dlg,da9062", }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, da9062_dt_ids); > + -> +static struct i2c_driver da9062_i2c_driver = { -> + .driver = { -> + .name = "da9062", -> + .of_match_table = of_match_ptr(da9062_dt_ids), +> +static struct i2c_driver da9062_i2c_driver =3D { +> + .driver =3D { +> + .name =3D "da9062", +> + .of_match_table =3D of_match_ptr(da9062_dt_ids), > + }, -> + .probe = da9062_i2c_probe, -> + .remove = da9062_i2c_remove, -> + .id_table = da9062_i2c_id, +> + .probe =3D da9062_i2c_probe, +> + .remove =3D da9062_i2c_remove, +> + .id_table =3D da9062_i2c_id, > +}; > + > +module_i2c_driver(da9062_i2c_driver); > + > +MODULE_DESCRIPTION("Core device driver for Dialog DA9062"); -> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>"); +> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>"); > +MODULE_LICENSE("GPL"); -> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h +> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/c= +ore.h > new file mode 100644 > index 0000000..376ba84 > --- /dev/null @@ -664,7 +671,8 @@ Applied, thanks. > +}; > + > +#endif /* __MFD_DA9062_CORE_H__ */ -> diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9062/registers.h +> diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9= +062/registers.h > new file mode 100644 > index 0000000..97790d1 > --- /dev/null @@ -831,7 +839,7 @@ Applied, thanks. > + * Bit fields > + */ > + -> +/* DA9062AA_PAGE_CON = 0x000 */ +> +/* DA9062AA_PAGE_CON =3D 0x000 */ > +#define DA9062AA_PAGE_SHIFT 0 > +#define DA9062AA_PAGE_MASK 0x3f > +#define DA9062AA_WRITE_MODE_SHIFT 6 @@ -839,13 +847,13 @@ Applied, thanks. > +#define DA9062AA_REVERT_SHIFT 7 > +#define DA9062AA_REVERT_MASK BIT(7) > + -> +/* DA9062AA_STATUS_A = 0x001 */ +> +/* DA9062AA_STATUS_A =3D 0x001 */ > +#define DA9062AA_NONKEY_SHIFT 0 > +#define DA9062AA_NONKEY_MASK 0x01 > +#define DA9062AA_DVC_BUSY_SHIFT 2 > +#define DA9062AA_DVC_BUSY_MASK BIT(2) > + -> +/* DA9062AA_STATUS_B = 0x002 */ +> +/* DA9062AA_STATUS_B =3D 0x002 */ > +#define DA9062AA_GPI0_SHIFT 0 > +#define DA9062AA_GPI0_MASK 0x01 > +#define DA9062AA_GPI1_SHIFT 1 @@ -857,7 +865,7 @@ Applied, thanks. > +#define DA9062AA_GPI4_SHIFT 4 > +#define DA9062AA_GPI4_MASK BIT(4) > + -> +/* DA9062AA_STATUS_D = 0x004 */ +> +/* DA9062AA_STATUS_D =3D 0x004 */ > +#define DA9062AA_LDO1_ILIM_SHIFT 0 > +#define DA9062AA_LDO1_ILIM_MASK 0x01 > +#define DA9062AA_LDO2_ILIM_SHIFT 1 @@ -867,7 +875,7 @@ Applied, thanks. > +#define DA9062AA_LDO4_ILIM_SHIFT 3 > +#define DA9062AA_LDO4_ILIM_MASK BIT(3) > + -> +/* DA9062AA_FAULT_LOG = 0x005 */ +> +/* DA9062AA_FAULT_LOG =3D 0x005 */ > +#define DA9062AA_TWD_ERROR_SHIFT 0 > +#define DA9062AA_TWD_ERROR_MASK 0x01 > +#define DA9062AA_POR_SHIFT 1 @@ -885,7 +893,7 @@ Applied, thanks. > +#define DA9062AA_WAIT_SHUT_SHIFT 7 > +#define DA9062AA_WAIT_SHUT_MASK BIT(7) > + -> +/* DA9062AA_EVENT_A = 0x006 */ +> +/* DA9062AA_EVENT_A =3D 0x006 */ > +#define DA9062AA_E_NONKEY_SHIFT 0 > +#define DA9062AA_E_NONKEY_MASK 0x01 > +#define DA9062AA_E_ALARM_SHIFT 1 @@ -901,7 +909,7 @@ Applied, thanks. > +#define DA9062AA_EVENTS_C_SHIFT 6 > +#define DA9062AA_EVENTS_C_MASK BIT(6) > + -> +/* DA9062AA_EVENT_B = 0x007 */ +> +/* DA9062AA_EVENT_B =3D 0x007 */ > +#define DA9062AA_E_TEMP_SHIFT 1 > +#define DA9062AA_E_TEMP_MASK BIT(1) > +#define DA9062AA_E_LDO_LIM_SHIFT 3 @@ -911,7 +919,7 @@ Applied, thanks. > +#define DA9062AA_E_VDD_WARN_SHIFT 7 > +#define DA9062AA_E_VDD_WARN_MASK BIT(7) > + -> +/* DA9062AA_EVENT_C = 0x008 */ +> +/* DA9062AA_EVENT_C =3D 0x008 */ > +#define DA9062AA_E_GPI0_SHIFT 0 > +#define DA9062AA_E_GPI0_MASK 0x01 > +#define DA9062AA_E_GPI1_SHIFT 1 @@ -923,7 +931,7 @@ Applied, thanks. > +#define DA9062AA_E_GPI4_SHIFT 4 > +#define DA9062AA_E_GPI4_MASK BIT(4) > + -> +/* DA9062AA_IRQ_MASK_A = 0x00A */ +> +/* DA9062AA_IRQ_MASK_A =3D 0x00A */ > +#define DA9062AA_M_NONKEY_SHIFT 0 > +#define DA9062AA_M_NONKEY_MASK 0x01 > +#define DA9062AA_M_ALARM_SHIFT 1 @@ -935,7 +943,7 @@ Applied, thanks. > +#define DA9062AA_M_SEQ_RDY_SHIFT 4 > +#define DA9062AA_M_SEQ_RDY_MASK BIT(4) > + -> +/* DA9062AA_IRQ_MASK_B = 0x00B */ +> +/* DA9062AA_IRQ_MASK_B =3D 0x00B */ > +#define DA9062AA_M_TEMP_SHIFT 1 > +#define DA9062AA_M_TEMP_MASK BIT(1) > +#define DA9062AA_M_LDO_LIM_SHIFT 3 @@ -945,7 +953,7 @@ Applied, thanks. > +#define DA9062AA_M_VDD_WARN_SHIFT 7 > +#define DA9062AA_M_VDD_WARN_MASK BIT(7) > + -> +/* DA9062AA_IRQ_MASK_C = 0x00C */ +> +/* DA9062AA_IRQ_MASK_C =3D 0x00C */ > +#define DA9062AA_M_GPI0_SHIFT 0 > +#define DA9062AA_M_GPI0_MASK 0x01 > +#define DA9062AA_M_GPI1_SHIFT 1 @@ -957,7 +965,7 @@ Applied, thanks. > +#define DA9062AA_M_GPI4_SHIFT 4 > +#define DA9062AA_M_GPI4_MASK BIT(4) > + -> +/* DA9062AA_CONTROL_A = 0x00E */ +> +/* DA9062AA_CONTROL_A =3D 0x00E */ > +#define DA9062AA_SYSTEM_EN_SHIFT 0 > +#define DA9062AA_SYSTEM_EN_MASK 0x01 > +#define DA9062AA_POWER_EN_SHIFT 1 @@ -973,7 +981,7 @@ Applied, thanks. > +#define DA9062AA_M_POWER1_EN_SHIFT 6 > +#define DA9062AA_M_POWER1_EN_MASK BIT(6) > + -> +/* DA9062AA_CONTROL_B = 0x00F */ +> +/* DA9062AA_CONTROL_B =3D 0x00F */ > +#define DA9062AA_WATCHDOG_PD_SHIFT 1 > +#define DA9062AA_WATCHDOG_PD_MASK BIT(1) > +#define DA9062AA_FREEZE_EN_SHIFT 2 @@ -987,7 +995,7 @@ Applied, thanks. > +#define DA9062AA_BUCK_SLOWSTART_SHIFT 7 > +#define DA9062AA_BUCK_SLOWSTART_MASK BIT(7) > + -> +/* DA9062AA_CONTROL_C = 0x010 */ +> +/* DA9062AA_CONTROL_C =3D 0x010 */ > +#define DA9062AA_DEBOUNCING_SHIFT 0 > +#define DA9062AA_DEBOUNCING_MASK 0x07 > +#define DA9062AA_AUTO_BOOT_SHIFT 3 @@ -999,11 +1007,11 @@ Applied, thanks. > +#define DA9062AA_DEF_SUPPLY_SHIFT 7 > +#define DA9062AA_DEF_SUPPLY_MASK BIT(7) > + -> +/* DA9062AA_CONTROL_D = 0x011 */ +> +/* DA9062AA_CONTROL_D =3D 0x011 */ > +#define DA9062AA_TWDSCALE_SHIFT 0 > +#define DA9062AA_TWDSCALE_MASK 0x07 > + -> +/* DA9062AA_CONTROL_E = 0x012 */ +> +/* DA9062AA_CONTROL_E =3D 0x012 */ > +#define DA9062AA_RTC_MODE_PD_SHIFT 0 > +#define DA9062AA_RTC_MODE_PD_MASK 0x01 > +#define DA9062AA_RTC_MODE_SD_SHIFT 1 @@ -1013,7 +1021,7 @@ Applied, thanks. > +#define DA9062AA_V_LOCK_SHIFT 7 > +#define DA9062AA_V_LOCK_MASK BIT(7) > + -> +/* DA9062AA_CONTROL_F = 0x013 */ +> +/* DA9062AA_CONTROL_F =3D 0x013 */ > +#define DA9062AA_WATCHDOG_SHIFT 0 > +#define DA9062AA_WATCHDOG_MASK 0x01 > +#define DA9062AA_SHUTDOWN_SHIFT 1 @@ -1021,7 +1029,7 @@ Applied, thanks. > +#define DA9062AA_WAKE_UP_SHIFT 2 > +#define DA9062AA_WAKE_UP_MASK BIT(2) > + -> +/* DA9062AA_PD_DIS = 0x014 */ +> +/* DA9062AA_PD_DIS =3D 0x014 */ > +#define DA9062AA_GPI_DIS_SHIFT 0 > +#define DA9062AA_GPI_DIS_MASK 0x01 > +#define DA9062AA_PMIF_DIS_SHIFT 2 @@ -1035,7 +1043,7 @@ Applied, thanks. > +#define DA9062AA_PMCONT_DIS_SHIFT 7 > +#define DA9062AA_PMCONT_DIS_MASK BIT(7) > + -> +/* DA9062AA_GPIO_0_1 = 0x015 */ +> +/* DA9062AA_GPIO_0_1 =3D 0x015 */ > +#define DA9062AA_GPIO0_PIN_SHIFT 0 > +#define DA9062AA_GPIO0_PIN_MASK 0x03 > +#define DA9062AA_GPIO0_TYPE_SHIFT 2 @@ -1049,7 +1057,7 @@ Applied, thanks. > +#define DA9062AA_GPIO1_WEN_SHIFT 7 > +#define DA9062AA_GPIO1_WEN_MASK BIT(7) > + -> +/* DA9062AA_GPIO_2_3 = 0x016 */ +> +/* DA9062AA_GPIO_2_3 =3D 0x016 */ > +#define DA9062AA_GPIO2_PIN_SHIFT 0 > +#define DA9062AA_GPIO2_PIN_MASK 0x03 > +#define DA9062AA_GPIO2_TYPE_SHIFT 2 @@ -1063,7 +1071,7 @@ Applied, thanks. > +#define DA9062AA_GPIO3_WEN_SHIFT 7 > +#define DA9062AA_GPIO3_WEN_MASK BIT(7) > + -> +/* DA9062AA_GPIO_4 = 0x017 */ +> +/* DA9062AA_GPIO_4 =3D 0x017 */ > +#define DA9062AA_GPIO4_PIN_SHIFT 0 > +#define DA9062AA_GPIO4_PIN_MASK 0x03 > +#define DA9062AA_GPIO4_TYPE_SHIFT 2 @@ -1071,7 +1079,7 @@ Applied, thanks. > +#define DA9062AA_GPIO4_WEN_SHIFT 3 > +#define DA9062AA_GPIO4_WEN_MASK BIT(3) > + -> +/* DA9062AA_GPIO_WKUP_MODE = 0x01C */ +> +/* DA9062AA_GPIO_WKUP_MODE =3D 0x01C */ > +#define DA9062AA_GPIO0_WKUP_MODE_SHIFT 0 > +#define DA9062AA_GPIO0_WKUP_MODE_MASK 0x01 > +#define DA9062AA_GPIO1_WKUP_MODE_SHIFT 1 @@ -1083,7 +1091,7 @@ Applied, thanks. > +#define DA9062AA_GPIO4_WKUP_MODE_SHIFT 4 > +#define DA9062AA_GPIO4_WKUP_MODE_MASK BIT(4) > + -> +/* DA9062AA_GPIO_MODE0_4 = 0x01D */ +> +/* DA9062AA_GPIO_MODE0_4 =3D 0x01D */ > +#define DA9062AA_GPIO0_MODE_SHIFT 0 > +#define DA9062AA_GPIO0_MODE_MASK 0x01 > +#define DA9062AA_GPIO1_MODE_SHIFT 1 @@ -1095,7 +1103,7 @@ Applied, thanks. > +#define DA9062AA_GPIO4_MODE_SHIFT 4 > +#define DA9062AA_GPIO4_MODE_MASK BIT(4) > + -> +/* DA9062AA_GPIO_OUT0_2 = 0x01E */ +> +/* DA9062AA_GPIO_OUT0_2 =3D 0x01E */ > +#define DA9062AA_GPIO0_OUT_SHIFT 0 > +#define DA9062AA_GPIO0_OUT_MASK 0x07 > +#define DA9062AA_GPIO1_OUT_SHIFT 3 @@ -1103,13 +1111,13 @@ Applied, thanks. > +#define DA9062AA_GPIO2_OUT_SHIFT 6 > +#define DA9062AA_GPIO2_OUT_MASK (0x03 << 6) > + -> +/* DA9062AA_GPIO_OUT3_4 = 0x01F */ +> +/* DA9062AA_GPIO_OUT3_4 =3D 0x01F */ > +#define DA9062AA_GPIO3_OUT_SHIFT 0 > +#define DA9062AA_GPIO3_OUT_MASK 0x07 > +#define DA9062AA_GPIO4_OUT_SHIFT 3 > +#define DA9062AA_GPIO4_OUT_MASK (0x03 << 3) > + -> +/* DA9062AA_BUCK2_CONT = 0x020 */ +> +/* DA9062AA_BUCK2_CONT =3D 0x020 */ > +#define DA9062AA_BUCK2_EN_SHIFT 0 > +#define DA9062AA_BUCK2_EN_MASK 0x01 > +#define DA9062AA_BUCK2_GPI_SHIFT 1 @@ -1119,7 +1127,7 @@ Applied, thanks. > +#define DA9062AA_VBUCK2_GPI_SHIFT 5 > +#define DA9062AA_VBUCK2_GPI_MASK (0x03 << 5) > + -> +/* DA9062AA_BUCK1_CONT = 0x021 */ +> +/* DA9062AA_BUCK1_CONT =3D 0x021 */ > +#define DA9062AA_BUCK1_EN_SHIFT 0 > +#define DA9062AA_BUCK1_EN_MASK 0x01 > +#define DA9062AA_BUCK1_GPI_SHIFT 1 @@ -1129,7 +1137,7 @@ Applied, thanks. > +#define DA9062AA_VBUCK1_GPI_SHIFT 5 > +#define DA9062AA_VBUCK1_GPI_MASK (0x03 << 5) > + -> +/* DA9062AA_BUCK4_CONT = 0x022 */ +> +/* DA9062AA_BUCK4_CONT =3D 0x022 */ > +#define DA9062AA_BUCK4_EN_SHIFT 0 > +#define DA9062AA_BUCK4_EN_MASK 0x01 > +#define DA9062AA_BUCK4_GPI_SHIFT 1 @@ -1139,7 +1147,7 @@ Applied, thanks. > +#define DA9062AA_VBUCK4_GPI_SHIFT 5 > +#define DA9062AA_VBUCK4_GPI_MASK (0x03 << 5) > + -> +/* DA9062AA_BUCK3_CONT = 0x024 */ +> +/* DA9062AA_BUCK3_CONT =3D 0x024 */ > +#define DA9062AA_BUCK3_EN_SHIFT 0 > +#define DA9062AA_BUCK3_EN_MASK 0x01 > +#define DA9062AA_BUCK3_GPI_SHIFT 1 @@ -1149,7 +1157,7 @@ Applied, thanks. > +#define DA9062AA_VBUCK3_GPI_SHIFT 5 > +#define DA9062AA_VBUCK3_GPI_MASK (0x03 << 5) > + -> +/* DA9062AA_LDO1_CONT = 0x026 */ +> +/* DA9062AA_LDO1_CONT =3D 0x026 */ > +#define DA9062AA_LDO1_EN_SHIFT 0 > +#define DA9062AA_LDO1_EN_MASK 0x01 > +#define DA9062AA_LDO1_GPI_SHIFT 1 @@ -1161,7 +1169,7 @@ Applied, thanks. > +#define DA9062AA_LDO1_CONF_SHIFT 7 > +#define DA9062AA_LDO1_CONF_MASK BIT(7) > + -> +/* DA9062AA_LDO2_CONT = 0x027 */ +> +/* DA9062AA_LDO2_CONT =3D 0x027 */ > +#define DA9062AA_LDO2_EN_SHIFT 0 > +#define DA9062AA_LDO2_EN_MASK 0x01 > +#define DA9062AA_LDO2_GPI_SHIFT 1 @@ -1173,7 +1181,7 @@ Applied, thanks. > +#define DA9062AA_LDO2_CONF_SHIFT 7 > +#define DA9062AA_LDO2_CONF_MASK BIT(7) > + -> +/* DA9062AA_LDO3_CONT = 0x028 */ +> +/* DA9062AA_LDO3_CONT =3D 0x028 */ > +#define DA9062AA_LDO3_EN_SHIFT 0 > +#define DA9062AA_LDO3_EN_MASK 0x01 > +#define DA9062AA_LDO3_GPI_SHIFT 1 @@ -1185,7 +1193,7 @@ Applied, thanks. > +#define DA9062AA_LDO3_CONF_SHIFT 7 > +#define DA9062AA_LDO3_CONF_MASK BIT(7) > + -> +/* DA9062AA_LDO4_CONT = 0x029 */ +> +/* DA9062AA_LDO4_CONT =3D 0x029 */ > +#define DA9062AA_LDO4_EN_SHIFT 0 > +#define DA9062AA_LDO4_EN_MASK 0x01 > +#define DA9062AA_LDO4_GPI_SHIFT 1 @@ -1197,7 +1205,7 @@ Applied, thanks. > +#define DA9062AA_LDO4_CONF_SHIFT 7 > +#define DA9062AA_LDO4_CONF_MASK BIT(7) > + -> +/* DA9062AA_DVC_1 = 0x032 */ +> +/* DA9062AA_DVC_1 =3D 0x032 */ > +#define DA9062AA_VBUCK1_SEL_SHIFT 0 > +#define DA9062AA_VBUCK1_SEL_MASK 0x01 > +#define DA9062AA_VBUCK2_SEL_SHIFT 1 @@ -1215,53 +1223,53 @@ Applied, thanks. > +#define DA9062AA_VLDO4_SEL_SHIFT 7 > +#define DA9062AA_VLDO4_SEL_MASK BIT(7) > + -> +/* DA9062AA_COUNT_S = 0x040 */ +> +/* DA9062AA_COUNT_S =3D 0x040 */ > +#define DA9062AA_COUNT_SEC_SHIFT 0 > +#define DA9062AA_COUNT_SEC_MASK 0x3f > +#define DA9062AA_RTC_READ_SHIFT 7 > +#define DA9062AA_RTC_READ_MASK BIT(7) > + -> +/* DA9062AA_COUNT_MI = 0x041 */ +> +/* DA9062AA_COUNT_MI =3D 0x041 */ > +#define DA9062AA_COUNT_MIN_SHIFT 0 > +#define DA9062AA_COUNT_MIN_MASK 0x3f > + -> +/* DA9062AA_COUNT_H = 0x042 */ +> +/* DA9062AA_COUNT_H =3D 0x042 */ > +#define DA9062AA_COUNT_HOUR_SHIFT 0 > +#define DA9062AA_COUNT_HOUR_MASK 0x1f > + -> +/* DA9062AA_COUNT_D = 0x043 */ +> +/* DA9062AA_COUNT_D =3D 0x043 */ > +#define DA9062AA_COUNT_DAY_SHIFT 0 > +#define DA9062AA_COUNT_DAY_MASK 0x1f > + -> +/* DA9062AA_COUNT_MO = 0x044 */ +> +/* DA9062AA_COUNT_MO =3D 0x044 */ > +#define DA9062AA_COUNT_MONTH_SHIFT 0 > +#define DA9062AA_COUNT_MONTH_MASK 0x0f > + -> +/* DA9062AA_COUNT_Y = 0x045 */ +> +/* DA9062AA_COUNT_Y =3D 0x045 */ > +#define DA9062AA_COUNT_YEAR_SHIFT 0 > +#define DA9062AA_COUNT_YEAR_MASK 0x3f > +#define DA9062AA_MONITOR_SHIFT 6 > +#define DA9062AA_MONITOR_MASK BIT(6) > + -> +/* DA9062AA_ALARM_S = 0x046 */ +> +/* DA9062AA_ALARM_S =3D 0x046 */ > +#define DA9062AA_ALARM_SEC_SHIFT 0 > +#define DA9062AA_ALARM_SEC_MASK 0x3f > +#define DA9062AA_ALARM_STATUS_SHIFT 6 > +#define DA9062AA_ALARM_STATUS_MASK (0x03 << 6) > + -> +/* DA9062AA_ALARM_MI = 0x047 */ +> +/* DA9062AA_ALARM_MI =3D 0x047 */ > +#define DA9062AA_ALARM_MIN_SHIFT 0 > +#define DA9062AA_ALARM_MIN_MASK 0x3f > + -> +/* DA9062AA_ALARM_H = 0x048 */ +> +/* DA9062AA_ALARM_H =3D 0x048 */ > +#define DA9062AA_ALARM_HOUR_SHIFT 0 > +#define DA9062AA_ALARM_HOUR_MASK 0x1f > + -> +/* DA9062AA_ALARM_D = 0x049 */ +> +/* DA9062AA_ALARM_D =3D 0x049 */ > +#define DA9062AA_ALARM_DAY_SHIFT 0 > +#define DA9062AA_ALARM_DAY_MASK 0x1f > + -> +/* DA9062AA_ALARM_MO = 0x04A */ +> +/* DA9062AA_ALARM_MO =3D 0x04A */ > +#define DA9062AA_ALARM_MONTH_SHIFT 0 > +#define DA9062AA_ALARM_MONTH_MASK 0x0f > +#define DA9062AA_TICK_TYPE_SHIFT 4 @@ -1269,7 +1277,7 @@ Applied, thanks. > +#define DA9062AA_TICK_WAKE_SHIFT 5 > +#define DA9062AA_TICK_WAKE_MASK BIT(5) > + -> +/* DA9062AA_ALARM_Y = 0x04B */ +> +/* DA9062AA_ALARM_Y =3D 0x04B */ > +#define DA9062AA_ALARM_YEAR_SHIFT 0 > +#define DA9062AA_ALARM_YEAR_MASK 0x3f > +#define DA9062AA_ALARM_ON_SHIFT 6 @@ -1277,111 +1285,111 @@ Applied, thanks. > +#define DA9062AA_TICK_ON_SHIFT 7 > +#define DA9062AA_TICK_ON_MASK BIT(7) > + -> +/* DA9062AA_SECOND_A = 0x04C */ +> +/* DA9062AA_SECOND_A =3D 0x04C */ > +#define DA9062AA_SECONDS_A_SHIFT 0 > +#define DA9062AA_SECONDS_A_MASK 0xff > + -> +/* DA9062AA_SECOND_B = 0x04D */ +> +/* DA9062AA_SECOND_B =3D 0x04D */ > +#define DA9062AA_SECONDS_B_SHIFT 0 > +#define DA9062AA_SECONDS_B_MASK 0xff > + -> +/* DA9062AA_SECOND_C = 0x04E */ +> +/* DA9062AA_SECOND_C =3D 0x04E */ > +#define DA9062AA_SECONDS_C_SHIFT 0 > +#define DA9062AA_SECONDS_C_MASK 0xff > + -> +/* DA9062AA_SECOND_D = 0x04F */ +> +/* DA9062AA_SECOND_D =3D 0x04F */ > +#define DA9062AA_SECONDS_D_SHIFT 0 > +#define DA9062AA_SECONDS_D_MASK 0xff > + -> +/* DA9062AA_SEQ = 0x081 */ +> +/* DA9062AA_SEQ =3D 0x081 */ > +#define DA9062AA_SEQ_POINTER_SHIFT 0 > +#define DA9062AA_SEQ_POINTER_MASK 0x0f > +#define DA9062AA_NXT_SEQ_START_SHIFT 4 > +#define DA9062AA_NXT_SEQ_START_MASK (0x0f << 4) > + -> +/* DA9062AA_SEQ_TIMER = 0x082 */ +> +/* DA9062AA_SEQ_TIMER =3D 0x082 */ > +#define DA9062AA_SEQ_TIME_SHIFT 0 > +#define DA9062AA_SEQ_TIME_MASK 0x0f > +#define DA9062AA_SEQ_DUMMY_SHIFT 4 > +#define DA9062AA_SEQ_DUMMY_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_2_1 = 0x083 */ +> +/* DA9062AA_ID_2_1 =3D 0x083 */ > +#define DA9062AA_LDO1_STEP_SHIFT 0 > +#define DA9062AA_LDO1_STEP_MASK 0x0f > +#define DA9062AA_LDO2_STEP_SHIFT 4 > +#define DA9062AA_LDO2_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_4_3 = 0x084 */ +> +/* DA9062AA_ID_4_3 =3D 0x084 */ > +#define DA9062AA_LDO3_STEP_SHIFT 0 > +#define DA9062AA_LDO3_STEP_MASK 0x0f > +#define DA9062AA_LDO4_STEP_SHIFT 4 > +#define DA9062AA_LDO4_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_12_11 = 0x088 */ +> +/* DA9062AA_ID_12_11 =3D 0x088 */ > +#define DA9062AA_PD_DIS_STEP_SHIFT 4 > +#define DA9062AA_PD_DIS_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_14_13 = 0x089 */ +> +/* DA9062AA_ID_14_13 =3D 0x089 */ > +#define DA9062AA_BUCK1_STEP_SHIFT 0 > +#define DA9062AA_BUCK1_STEP_MASK 0x0f > +#define DA9062AA_BUCK2_STEP_SHIFT 4 > +#define DA9062AA_BUCK2_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_16_15 = 0x08A */ +> +/* DA9062AA_ID_16_15 =3D 0x08A */ > +#define DA9062AA_BUCK4_STEP_SHIFT 0 > +#define DA9062AA_BUCK4_STEP_MASK 0x0f > +#define DA9062AA_BUCK3_STEP_SHIFT 4 > +#define DA9062AA_BUCK3_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_22_21 = 0x08D */ +> +/* DA9062AA_ID_22_21 =3D 0x08D */ > +#define DA9062AA_GP_RISE1_STEP_SHIFT 0 > +#define DA9062AA_GP_RISE1_STEP_MASK 0x0f > +#define DA9062AA_GP_FALL1_STEP_SHIFT 4 > +#define DA9062AA_GP_FALL1_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_24_23 = 0x08E */ +> +/* DA9062AA_ID_24_23 =3D 0x08E */ > +#define DA9062AA_GP_RISE2_STEP_SHIFT 0 > +#define DA9062AA_GP_RISE2_STEP_MASK 0x0f > +#define DA9062AA_GP_FALL2_STEP_SHIFT 4 > +#define DA9062AA_GP_FALL2_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_26_25 = 0x08F */ +> +/* DA9062AA_ID_26_25 =3D 0x08F */ > +#define DA9062AA_GP_RISE3_STEP_SHIFT 0 > +#define DA9062AA_GP_RISE3_STEP_MASK 0x0f > +#define DA9062AA_GP_FALL3_STEP_SHIFT 4 > +#define DA9062AA_GP_FALL3_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_28_27 = 0x090 */ +> +/* DA9062AA_ID_28_27 =3D 0x090 */ > +#define DA9062AA_GP_RISE4_STEP_SHIFT 0 > +#define DA9062AA_GP_RISE4_STEP_MASK 0x0f > +#define DA9062AA_GP_FALL4_STEP_SHIFT 4 > +#define DA9062AA_GP_FALL4_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_30_29 = 0x091 */ +> +/* DA9062AA_ID_30_29 =3D 0x091 */ > +#define DA9062AA_GP_RISE5_STEP_SHIFT 0 > +#define DA9062AA_GP_RISE5_STEP_MASK 0x0f > +#define DA9062AA_GP_FALL5_STEP_SHIFT 4 > +#define DA9062AA_GP_FALL5_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_ID_32_31 = 0x092 */ +> +/* DA9062AA_ID_32_31 =3D 0x092 */ > +#define DA9062AA_WAIT_STEP_SHIFT 0 > +#define DA9062AA_WAIT_STEP_MASK 0x0f > +#define DA9062AA_EN32K_STEP_SHIFT 4 > +#define DA9062AA_EN32K_STEP_MASK (0x0f << 4) > + -> +/* DA9062AA_SEQ_A = 0x095 */ +> +/* DA9062AA_SEQ_A =3D 0x095 */ > +#define DA9062AA_SYSTEM_END_SHIFT 0 > +#define DA9062AA_SYSTEM_END_MASK 0x0f > +#define DA9062AA_POWER_END_SHIFT 4 > +#define DA9062AA_POWER_END_MASK (0x0f << 4) > + -> +/* DA9062AA_SEQ_B = 0x096 */ +> +/* DA9062AA_SEQ_B =3D 0x096 */ > +#define DA9062AA_MAX_COUNT_SHIFT 0 > +#define DA9062AA_MAX_COUNT_MASK 0x0f > +#define DA9062AA_PART_DOWN_SHIFT 4 > +#define DA9062AA_PART_DOWN_MASK (0x0f << 4) > + -> +/* DA9062AA_WAIT = 0x097 */ +> +/* DA9062AA_WAIT =3D 0x097 */ > +#define DA9062AA_WAIT_TIME_SHIFT 0 > +#define DA9062AA_WAIT_TIME_MASK 0x0f > +#define DA9062AA_WAIT_MODE_SHIFT 4 @@ -1391,7 +1399,7 @@ Applied, thanks. > +#define DA9062AA_WAIT_DIR_SHIFT 6 > +#define DA9062AA_WAIT_DIR_MASK (0x03 << 6) > + -> +/* DA9062AA_EN_32K = 0x098 */ +> +/* DA9062AA_EN_32K =3D 0x098 */ > +#define DA9062AA_STABILISATION_TIME_SHIFT 0 > +#define DA9062AA_STABILISATION_TIME_MASK 0x07 > +#define DA9062AA_CRYSTAL_SHIFT 3 @@ -1405,39 +1413,39 @@ Applied, thanks. > +#define DA9062AA_EN_32KOUT_SHIFT 7 > +#define DA9062AA_EN_32KOUT_MASK BIT(7) > + -> +/* DA9062AA_RESET = 0x099 */ +> +/* DA9062AA_RESET =3D 0x099 */ > +#define DA9062AA_RESET_TIMER_SHIFT 0 > +#define DA9062AA_RESET_TIMER_MASK 0x3f > +#define DA9062AA_RESET_EVENT_SHIFT 6 > +#define DA9062AA_RESET_EVENT_MASK (0x03 << 6) > + -> +/* DA9062AA_BUCK_ILIM_A = 0x09A */ +> +/* DA9062AA_BUCK_ILIM_A =3D 0x09A */ > +#define DA9062AA_BUCK3_ILIM_SHIFT 0 > +#define DA9062AA_BUCK3_ILIM_MASK 0x0f > + -> +/* DA9062AA_BUCK_ILIM_B = 0x09B */ +> +/* DA9062AA_BUCK_ILIM_B =3D 0x09B */ > +#define DA9062AA_BUCK4_ILIM_SHIFT 0 > +#define DA9062AA_BUCK4_ILIM_MASK 0x0f > + -> +/* DA9062AA_BUCK_ILIM_C = 0x09C */ +> +/* DA9062AA_BUCK_ILIM_C =3D 0x09C */ > +#define DA9062AA_BUCK1_ILIM_SHIFT 0 > +#define DA9062AA_BUCK1_ILIM_MASK 0x0f > +#define DA9062AA_BUCK2_ILIM_SHIFT 4 > +#define DA9062AA_BUCK2_ILIM_MASK (0x0f << 4) > + -> +/* DA9062AA_BUCK2_CFG = 0x09D */ +> +/* DA9062AA_BUCK2_CFG =3D 0x09D */ > +#define DA9062AA_BUCK2_PD_DIS_SHIFT 5 > +#define DA9062AA_BUCK2_PD_DIS_MASK BIT(5) > +#define DA9062AA_BUCK2_MODE_SHIFT 6 > +#define DA9062AA_BUCK2_MODE_MASK (0x03 << 6) > + -> +/* DA9062AA_BUCK1_CFG = 0x09E */ +> +/* DA9062AA_BUCK1_CFG =3D 0x09E */ > +#define DA9062AA_BUCK1_PD_DIS_SHIFT 5 > +#define DA9062AA_BUCK1_PD_DIS_MASK BIT(5) > +#define DA9062AA_BUCK1_MODE_SHIFT 6 > +#define DA9062AA_BUCK1_MODE_MASK (0x03 << 6) > + -> +/* DA9062AA_BUCK4_CFG = 0x09F */ +> +/* DA9062AA_BUCK4_CFG =3D 0x09F */ > +#define DA9062AA_BUCK4_VTTR_EN_SHIFT 3 > +#define DA9062AA_BUCK4_VTTR_EN_MASK BIT(3) > +#define DA9062AA_BUCK4_VTT_EN_SHIFT 4 @@ -1447,119 +1455,119 @@ Applied, thanks. > +#define DA9062AA_BUCK4_MODE_SHIFT 6 > +#define DA9062AA_BUCK4_MODE_MASK (0x03 << 6) > + -> +/* DA9062AA_BUCK3_CFG = 0x0A0 */ +> +/* DA9062AA_BUCK3_CFG =3D 0x0A0 */ > +#define DA9062AA_BUCK3_PD_DIS_SHIFT 5 > +#define DA9062AA_BUCK3_PD_DIS_MASK BIT(5) > +#define DA9062AA_BUCK3_MODE_SHIFT 6 > +#define DA9062AA_BUCK3_MODE_MASK (0x03 << 6) > + -> +/* DA9062AA_VBUCK2_A = 0x0A3 */ +> +/* DA9062AA_VBUCK2_A =3D 0x0A3 */ > +#define DA9062AA_VBUCK2_A_SHIFT 0 > +#define DA9062AA_VBUCK2_A_MASK 0x7f > +#define DA9062AA_BUCK2_SL_A_SHIFT 7 > +#define DA9062AA_BUCK2_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VBUCK1_A = 0x0A4 */ +> +/* DA9062AA_VBUCK1_A =3D 0x0A4 */ > +#define DA9062AA_VBUCK1_A_SHIFT 0 > +#define DA9062AA_VBUCK1_A_MASK 0x7f > +#define DA9062AA_BUCK1_SL_A_SHIFT 7 > +#define DA9062AA_BUCK1_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VBUCK4_A = 0x0A5 */ +> +/* DA9062AA_VBUCK4_A =3D 0x0A5 */ > +#define DA9062AA_VBUCK4_A_SHIFT 0 > +#define DA9062AA_VBUCK4_A_MASK 0x7f > +#define DA9062AA_BUCK4_SL_A_SHIFT 7 > +#define DA9062AA_BUCK4_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VBUCK3_A = 0x0A7 */ +> +/* DA9062AA_VBUCK3_A =3D 0x0A7 */ > +#define DA9062AA_VBUCK3_A_SHIFT 0 > +#define DA9062AA_VBUCK3_A_MASK 0x7f > +#define DA9062AA_BUCK3_SL_A_SHIFT 7 > +#define DA9062AA_BUCK3_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VLDO1_A = 0x0A9 */ +> +/* DA9062AA_VLDO1_A =3D 0x0A9 */ > +#define DA9062AA_VLDO1_A_SHIFT 0 > +#define DA9062AA_VLDO1_A_MASK 0x3f > +#define DA9062AA_LDO1_SL_A_SHIFT 7 > +#define DA9062AA_LDO1_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VLDO2_A = 0x0AA */ +> +/* DA9062AA_VLDO2_A =3D 0x0AA */ > +#define DA9062AA_VLDO2_A_SHIFT 0 > +#define DA9062AA_VLDO2_A_MASK 0x3f > +#define DA9062AA_LDO2_SL_A_SHIFT 7 > +#define DA9062AA_LDO2_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VLDO3_A = 0x0AB */ +> +/* DA9062AA_VLDO3_A =3D 0x0AB */ > +#define DA9062AA_VLDO3_A_SHIFT 0 > +#define DA9062AA_VLDO3_A_MASK 0x3f > +#define DA9062AA_LDO3_SL_A_SHIFT 7 > +#define DA9062AA_LDO3_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VLDO4_A = 0x0AC */ +> +/* DA9062AA_VLDO4_A =3D 0x0AC */ > +#define DA9062AA_VLDO4_A_SHIFT 0 > +#define DA9062AA_VLDO4_A_MASK 0x3f > +#define DA9062AA_LDO4_SL_A_SHIFT 7 > +#define DA9062AA_LDO4_SL_A_MASK BIT(7) > + -> +/* DA9062AA_VBUCK2_B = 0x0B4 */ +> +/* DA9062AA_VBUCK2_B =3D 0x0B4 */ > +#define DA9062AA_VBUCK2_B_SHIFT 0 > +#define DA9062AA_VBUCK2_B_MASK 0x7f > +#define DA9062AA_BUCK2_SL_B_SHIFT 7 > +#define DA9062AA_BUCK2_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VBUCK1_B = 0x0B5 */ +> +/* DA9062AA_VBUCK1_B =3D 0x0B5 */ > +#define DA9062AA_VBUCK1_B_SHIFT 0 > +#define DA9062AA_VBUCK1_B_MASK 0x7f > +#define DA9062AA_BUCK1_SL_B_SHIFT 7 > +#define DA9062AA_BUCK1_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VBUCK4_B = 0x0B6 */ +> +/* DA9062AA_VBUCK4_B =3D 0x0B6 */ > +#define DA9062AA_VBUCK4_B_SHIFT 0 > +#define DA9062AA_VBUCK4_B_MASK 0x7f > +#define DA9062AA_BUCK4_SL_B_SHIFT 7 > +#define DA9062AA_BUCK4_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VBUCK3_B = 0x0B8 */ +> +/* DA9062AA_VBUCK3_B =3D 0x0B8 */ > +#define DA9062AA_VBUCK3_B_SHIFT 0 > +#define DA9062AA_VBUCK3_B_MASK 0x7f > +#define DA9062AA_BUCK3_SL_B_SHIFT 7 > +#define DA9062AA_BUCK3_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VLDO1_B = 0x0BA */ +> +/* DA9062AA_VLDO1_B =3D 0x0BA */ > +#define DA9062AA_VLDO1_B_SHIFT 0 > +#define DA9062AA_VLDO1_B_MASK 0x3f > +#define DA9062AA_LDO1_SL_B_SHIFT 7 > +#define DA9062AA_LDO1_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VLDO2_B = 0x0BB */ +> +/* DA9062AA_VLDO2_B =3D 0x0BB */ > +#define DA9062AA_VLDO2_B_SHIFT 0 > +#define DA9062AA_VLDO2_B_MASK 0x3f > +#define DA9062AA_LDO2_SL_B_SHIFT 7 > +#define DA9062AA_LDO2_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VLDO3_B = 0x0BC */ +> +/* DA9062AA_VLDO3_B =3D 0x0BC */ > +#define DA9062AA_VLDO3_B_SHIFT 0 > +#define DA9062AA_VLDO3_B_MASK 0x3f > +#define DA9062AA_LDO3_SL_B_SHIFT 7 > +#define DA9062AA_LDO3_SL_B_MASK BIT(7) > + -> +/* DA9062AA_VLDO4_B = 0x0BD */ +> +/* DA9062AA_VLDO4_B =3D 0x0BD */ > +#define DA9062AA_VLDO4_B_SHIFT 0 > +#define DA9062AA_VLDO4_B_MASK 0x3f > +#define DA9062AA_LDO4_SL_B_SHIFT 7 > +#define DA9062AA_LDO4_SL_B_MASK BIT(7) > + -> +/* DA9062AA_BBAT_CONT = 0x0C5 */ +> +/* DA9062AA_BBAT_CONT =3D 0x0C5 */ > +#define DA9062AA_BCHG_VSET_SHIFT 0 > +#define DA9062AA_BCHG_VSET_MASK 0x0f > +#define DA9062AA_BCHG_ISET_SHIFT 4 > +#define DA9062AA_BCHG_ISET_MASK (0x0f << 4) > + -> +/* DA9062AA_INTERFACE = 0x105 */ +> +/* DA9062AA_INTERFACE =3D 0x105 */ > +#define DA9062AA_IF_BASE_ADDR_SHIFT 4 > +#define DA9062AA_IF_BASE_ADDR_MASK (0x0f << 4) > + -> +/* DA9062AA_CONFIG_A = 0x106 */ +> +/* DA9062AA_CONFIG_A =3D 0x106 */ > +#define DA9062AA_PM_I_V_SHIFT 0 > +#define DA9062AA_PM_I_V_MASK 0x01 > +#define DA9062AA_PM_O_TYPE_SHIFT 2 @@ -1573,13 +1581,13 @@ Applied, thanks. > +#define DA9062AA_PM_IF_HSM_SHIFT 6 > +#define DA9062AA_PM_IF_HSM_MASK BIT(6) > + -> +/* DA9062AA_CONFIG_B = 0x107 */ +> +/* DA9062AA_CONFIG_B =3D 0x107 */ > +#define DA9062AA_VDD_FAULT_ADJ_SHIFT 0 > +#define DA9062AA_VDD_FAULT_ADJ_MASK 0x0f > +#define DA9062AA_VDD_HYST_ADJ_SHIFT 4 > +#define DA9062AA_VDD_HYST_ADJ_MASK (0x07 << 4) > + -> +/* DA9062AA_CONFIG_C = 0x108 */ +> +/* DA9062AA_CONFIG_C =3D 0x108 */ > +#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT 2 > +#define DA9062AA_BUCK_ACTV_DISCHRG_MASK BIT(2) > +#define DA9062AA_BUCK1_CLK_INV_SHIFT 3 @@ -1589,7 +1597,7 @@ Applied, thanks. > +#define DA9062AA_BUCK3_CLK_INV_SHIFT 6 > +#define DA9062AA_BUCK3_CLK_INV_MASK BIT(6) > + -> +/* DA9062AA_CONFIG_D = 0x109 */ +> +/* DA9062AA_CONFIG_D =3D 0x109 */ > +#define DA9062AA_GPI_V_SHIFT 0 > +#define DA9062AA_GPI_V_MASK 0x01 > +#define DA9062AA_NIRQ_MODE_SHIFT 1 @@ -1599,7 +1607,7 @@ Applied, thanks. > +#define DA9062AA_FORCE_RESET_SHIFT 5 > +#define DA9062AA_FORCE_RESET_MASK BIT(5) > + -> +/* DA9062AA_CONFIG_E = 0x10A */ +> +/* DA9062AA_CONFIG_E =3D 0x10A */ > +#define DA9062AA_BUCK1_AUTO_SHIFT 0 > +#define DA9062AA_BUCK1_AUTO_MASK 0x01 > +#define DA9062AA_BUCK2_AUTO_SHIFT 1 @@ -1609,7 +1617,7 @@ Applied, thanks. > +#define DA9062AA_BUCK3_AUTO_SHIFT 4 > +#define DA9062AA_BUCK3_AUTO_MASK BIT(4) > + -> +/* DA9062AA_CONFIG_G = 0x10C */ +> +/* DA9062AA_CONFIG_G =3D 0x10C */ > +#define DA9062AA_LDO1_AUTO_SHIFT 0 > +#define DA9062AA_LDO1_AUTO_MASK 0x01 > +#define DA9062AA_LDO2_AUTO_SHIFT 1 @@ -1619,7 +1627,7 @@ Applied, thanks. > +#define DA9062AA_LDO4_AUTO_SHIFT 3 > +#define DA9062AA_LDO4_AUTO_MASK BIT(3) > + -> +/* DA9062AA_CONFIG_H = 0x10D */ +> +/* DA9062AA_CONFIG_H =3D 0x10D */ > +#define DA9062AA_BUCK1_2_MERGE_SHIFT 3 > +#define DA9062AA_BUCK1_2_MERGE_MASK BIT(3) > +#define DA9062AA_BUCK2_OD_SHIFT 5 @@ -1627,7 +1635,7 @@ Applied, thanks. > +#define DA9062AA_BUCK1_OD_SHIFT 6 > +#define DA9062AA_BUCK1_OD_MASK BIT(6) > + -> +/* DA9062AA_CONFIG_I = 0x10E */ +> +/* DA9062AA_CONFIG_I =3D 0x10E */ > +#define DA9062AA_NONKEY_PIN_SHIFT 0 > +#define DA9062AA_NONKEY_PIN_MASK 0x03 > +#define DA9062AA_nONKEY_SD_SHIFT 2 @@ -1643,7 +1651,7 @@ Applied, thanks. > +#define DA9062AA_LDO_SD_SHIFT 7 > +#define DA9062AA_LDO_SD_MASK BIT(7) > + -> +/* DA9062AA_CONFIG_J = 0x10F */ +> +/* DA9062AA_CONFIG_J =3D 0x10F */ > +#define DA9062AA_KEY_DELAY_SHIFT 0 > +#define DA9062AA_KEY_DELAY_MASK 0x03 > +#define DA9062AA_SHUT_DELAY_SHIFT 2 @@ -1655,7 +1663,7 @@ Applied, thanks. > +#define DA9062AA_IF_RESET_SHIFT 7 > +#define DA9062AA_IF_RESET_MASK BIT(7) > + -> +/* DA9062AA_CONFIG_K = 0x110 */ +> +/* DA9062AA_CONFIG_K =3D 0x110 */ > +#define DA9062AA_GPIO0_PUPD_SHIFT 0 > +#define DA9062AA_GPIO0_PUPD_MASK 0x01 > +#define DA9062AA_GPIO1_PUPD_SHIFT 1 @@ -1667,7 +1675,7 @@ Applied, thanks. > +#define DA9062AA_GPIO4_PUPD_SHIFT 4 > +#define DA9062AA_GPIO4_PUPD_MASK BIT(4) > + -> +/* DA9062AA_CONFIG_M = 0x112 */ +> +/* DA9062AA_CONFIG_M =3D 0x112 */ > +#define DA9062AA_NSHUTDOWN_PU_SHIFT 1 > +#define DA9062AA_NSHUTDOWN_PU_MASK BIT(1) > +#define DA9062AA_WDG_MODE_SHIFT 3 @@ -1675,116 +1683,125 @@ Applied, thanks. > +#define DA9062AA_OSC_FRQ_SHIFT 4 > +#define DA9062AA_OSC_FRQ_MASK (0x0f << 4) > + -> +/* DA9062AA_TRIM_CLDR = 0x120 */ +> +/* DA9062AA_TRIM_CLDR =3D 0x120 */ > +#define DA9062AA_TRIM_CLDR_SHIFT 0 > +#define DA9062AA_TRIM_CLDR_MASK 0xff > + -> +/* DA9062AA_GP_ID_0 = 0x121 */ +> +/* DA9062AA_GP_ID_0 =3D 0x121 */ > +#define DA9062AA_GP_0_SHIFT 0 > +#define DA9062AA_GP_0_MASK 0xff > + -> +/* DA9062AA_GP_ID_1 = 0x122 */ +> +/* DA9062AA_GP_ID_1 =3D 0x122 */ > +#define DA9062AA_GP_1_SHIFT 0 > +#define DA9062AA_GP_1_MASK 0xff > + -> +/* DA9062AA_GP_ID_2 = 0x123 */ +> +/* DA9062AA_GP_ID_2 =3D 0x123 */ > +#define DA9062AA_GP_2_SHIFT 0 > +#define DA9062AA_GP_2_MASK 0xff > + -> +/* DA9062AA_GP_ID_3 = 0x124 */ +> +/* DA9062AA_GP_ID_3 =3D 0x124 */ > +#define DA9062AA_GP_3_SHIFT 0 > +#define DA9062AA_GP_3_MASK 0xff > + -> +/* DA9062AA_GP_ID_4 = 0x125 */ +> +/* DA9062AA_GP_ID_4 =3D 0x125 */ > +#define DA9062AA_GP_4_SHIFT 0 > +#define DA9062AA_GP_4_MASK 0xff > + -> +/* DA9062AA_GP_ID_5 = 0x126 */ +> +/* DA9062AA_GP_ID_5 =3D 0x126 */ > +#define DA9062AA_GP_5_SHIFT 0 > +#define DA9062AA_GP_5_MASK 0xff > + -> +/* DA9062AA_GP_ID_6 = 0x127 */ +> +/* DA9062AA_GP_ID_6 =3D 0x127 */ > +#define DA9062AA_GP_6_SHIFT 0 > +#define DA9062AA_GP_6_MASK 0xff > + -> +/* DA9062AA_GP_ID_7 = 0x128 */ +> +/* DA9062AA_GP_ID_7 =3D 0x128 */ > +#define DA9062AA_GP_7_SHIFT 0 > +#define DA9062AA_GP_7_MASK 0xff > + -> +/* DA9062AA_GP_ID_8 = 0x129 */ +> +/* DA9062AA_GP_ID_8 =3D 0x129 */ > +#define DA9062AA_GP_8_SHIFT 0 > +#define DA9062AA_GP_8_MASK 0xff > + -> +/* DA9062AA_GP_ID_9 = 0x12A */ +> +/* DA9062AA_GP_ID_9 =3D 0x12A */ > +#define DA9062AA_GP_9_SHIFT 0 > +#define DA9062AA_GP_9_MASK 0xff > + -> +/* DA9062AA_GP_ID_10 = 0x12B */ +> +/* DA9062AA_GP_ID_10 =3D 0x12B */ > +#define DA9062AA_GP_10_SHIFT 0 > +#define DA9062AA_GP_10_MASK 0xff > + -> +/* DA9062AA_GP_ID_11 = 0x12C */ +> +/* DA9062AA_GP_ID_11 =3D 0x12C */ > +#define DA9062AA_GP_11_SHIFT 0 > +#define DA9062AA_GP_11_MASK 0xff > + -> +/* DA9062AA_GP_ID_12 = 0x12D */ +> +/* DA9062AA_GP_ID_12 =3D 0x12D */ > +#define DA9062AA_GP_12_SHIFT 0 > +#define DA9062AA_GP_12_MASK 0xff > + -> +/* DA9062AA_GP_ID_13 = 0x12E */ +> +/* DA9062AA_GP_ID_13 =3D 0x12E */ > +#define DA9062AA_GP_13_SHIFT 0 > +#define DA9062AA_GP_13_MASK 0xff > + -> +/* DA9062AA_GP_ID_14 = 0x12F */ +> +/* DA9062AA_GP_ID_14 =3D 0x12F */ > +#define DA9062AA_GP_14_SHIFT 0 > +#define DA9062AA_GP_14_MASK 0xff > + -> +/* DA9062AA_GP_ID_15 = 0x130 */ +> +/* DA9062AA_GP_ID_15 =3D 0x130 */ > +#define DA9062AA_GP_15_SHIFT 0 > +#define DA9062AA_GP_15_MASK 0xff > + -> +/* DA9062AA_GP_ID_16 = 0x131 */ +> +/* DA9062AA_GP_ID_16 =3D 0x131 */ > +#define DA9062AA_GP_16_SHIFT 0 > +#define DA9062AA_GP_16_MASK 0xff > + -> +/* DA9062AA_GP_ID_17 = 0x132 */ +> +/* DA9062AA_GP_ID_17 =3D 0x132 */ > +#define DA9062AA_GP_17_SHIFT 0 > +#define DA9062AA_GP_17_MASK 0xff > + -> +/* DA9062AA_GP_ID_18 = 0x133 */ +> +/* DA9062AA_GP_ID_18 =3D 0x133 */ > +#define DA9062AA_GP_18_SHIFT 0 > +#define DA9062AA_GP_18_MASK 0xff > + -> +/* DA9062AA_GP_ID_19 = 0x134 */ +> +/* DA9062AA_GP_ID_19 =3D 0x134 */ > +#define DA9062AA_GP_19_SHIFT 0 > +#define DA9062AA_GP_19_MASK 0xff > + -> +/* DA9062AA_DEVICE_ID = 0x181 */ +> +/* DA9062AA_DEVICE_ID =3D 0x181 */ > +#define DA9062AA_DEV_ID_SHIFT 0 > +#define DA9062AA_DEV_ID_MASK 0xff > + -> +/* DA9062AA_VARIANT_ID = 0x182 */ +> +/* DA9062AA_VARIANT_ID =3D 0x182 */ > +#define DA9062AA_VRC_SHIFT 0 > +#define DA9062AA_VRC_MASK 0x0f > +#define DA9062AA_MRC_SHIFT 4 > +#define DA9062AA_MRC_MASK (0x0f << 4) > + -> +/* DA9062AA_CUSTOMER_ID = 0x183 */ +> +/* DA9062AA_CUSTOMER_ID =3D 0x183 */ > +#define DA9062AA_CUST_ID_SHIFT 0 > +#define DA9062AA_CUST_ID_MASK 0xff > + -> +/* DA9062AA_CONFIG_ID = 0x184 */ +> +/* DA9062AA_CONFIG_ID =3D 0x184 */ > +#define DA9062AA_CONFIG_REV_SHIFT 0 > +#define DA9062AA_CONFIG_REV_MASK 0xff > + > +#endif /* __DA9062_H__ */ --- +--=20 Lee Jones Linaro STMicroelectronics Landing Team Lead -Linaro.org │ Open source software for ARM SoCs +Linaro.org =E2=94=82 Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog --- -To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html + +--=20 +--=20 +You received this message because you are subscribed to "rtc-linux". +Membership options at http://groups.google.com/group/rtc-linux . +Please read http://groups.google.com/group/rtc-linux/web/checklist +before submitting a driver. +---=20 +You received this message because you are subscribed to the Google Groups "= +rtc-linux" group. +To unsubscribe from this group and stop receiving emails from it, send an e= +mail to rtc-linux+unsubscribe@googlegroups.com. +For more options, visit https://groups.google.com/d/optout. diff --git a/a/content_digest b/N1/content_digest index ff8f283..5ddc5a1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,75 +1,80 @@ "ref\0cover.1435756293.git.stwiss.opensource@diasemi.com\0" "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource@diasemi.com\0" - "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org\0" - "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" - "Subject\0Re: [PATCH V5 1/2] mfd: da9062: DA9062 MFD core driver\0" + "From\0Lee Jones <lee.jones@linaro.org>\0" + "Subject\0[rtc-linux] Re: [PATCH V5 1/2] mfd: da9062: DA9062 MFD core driver\0" "Date\0Tue, 7 Jul 2015 12:42:17 +0100\0" - "To\0S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\0" - "Cc\0LINUXKERNEL <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> - Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org> - DEVICETREE <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - David Dajun Chen <david.chen-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - LINUXINPUT <linux-input-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - LINUXWATCHDOG <linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Liam Girdwood <lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - RTCLINUX <rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Support Opensource <support.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - " Wim Van Sebroeck <wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org>\0" + "To\0S Twiss <stwiss.opensource@diasemi.com>\0" + "Cc\0LINUXKERNEL <linux-kernel@vger.kernel.org>" + Samuel Ortiz <sameo@linux.intel.com> + Alessandro Zummo <a.zummo@towertech.it> + DEVICETREE <devicetree@vger.kernel.org> + David Dajun Chen <david.chen@diasemi.com> + Dmitry Torokhov <dmitry.torokhov@gmail.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + LINUXINPUT <linux-input@vger.kernel.org> + LINUXWATCHDOG <linux-watchdog@vger.kernel.org> + Liam Girdwood <lgirdwood@gmail.com> + Mark Brown <broonie@kernel.org> + Mark Rutland <mark.rutland@arm.com> + Pawel Moll <pawel.moll@arm.com> + RTCLINUX <rtc-linux@googlegroups.com> + Rob Herring <robh+dt@kernel.org> + Support Opensource <support.opensource@diasemi.com> + " Wim Van Sebroeck <wim@iguana.be>\0" "\00:1\0" "b\0" "On Wed, 01 Jul 2015, S Twiss wrote:\n" "\n" - "> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" - "> \n" + "> From: S Twiss <stwiss.opensource@diasemi.com>\n" + ">=20\n" "> Add MFD core driver support for DA9062\n" - "> \n" - "> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" - "> \n" + ">=20\n" + "> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>\n" + ">=20\n" "> ---\n" "> Changes in V5:\n" "> - Alter register.h file with the following:\n" "> bit macro change defines of the form (0x01<<N) to BIT(N)\n" "> zero shift change defines of the form (0xM<<0) to 0xM\n" - "> \n" + ">=20\n" "> Changes in V4:\n" "> - Removal of struct da9062 unrequired data from core.h and driver code\n" "> - Remove IRQ handler for VDD_WARN and corresponding IRQ request code\n" "> - Use DEFINE_RES_NAMED() macro for resource definitions\n" "> - Refactor da9062_clear_fault_log() to remove inconsistencies\n" "> - Refactor da9062_device_init() and da9062_irq_init() into probe()\n" - "> - Add new function get_device_type() for variant and device_id information\n" - "> - devm_kzalloc to alloc *chip instead of struct and use not-chip on error\n" + "> - Add new function get_device_type() for variant and device_id informati=\n" + "on\n" + "> - devm_kzalloc to alloc *chip instead of struct and use not-chip on erro=\n" + "r\n" "> - Move da9062_dt_ids closer to usage\n" "> - Move LUT definitions into da9062_regmap_config structure\n" "> - Erase da9062_device_exit() abstractions\n" "> - Clean up header inclusions through removal of redundant entries\n" "> - Whitespace and string literal discipline\n" - "> \n" + ">=20\n" "> Changes in V3:\n" "> - Removed references to the RTC and OnKey in the mfd_cell definition.\n" - "> \n" + ">=20\n" "> Changes in V2:\n" - "> - Copyright headers GPL v2 (and later) match correct 'GPL' in MODULE_LICENSE\n" - "> - Ensure DA9062 core is tristate in Kconfig so it can be built as a module\n" - "> - Move VDD_WARN code and resource into the core instead of regulator driver\n" - "> \n" + "> - Copyright headers GPL v2 (and later) match correct 'GPL' in MODULE_LIC=\n" + "ENSE\n" + "> - Ensure DA9062 core is tristate in Kconfig so it can be built as a modu=\n" + "le\n" + "> - Move VDD_WARN code and resource into the core instead of regulator dri=\n" + "ver\n" + ">=20\n" "> This patch applies against linux-next and next-20150701\n" - "> \n" - "> \n" - "> \n" + ">=20\n" + ">=20\n" + ">=20\n" "> drivers/mfd/Kconfig | 12 +\n" "> drivers/mfd/Makefile | 3 +-\n" "> drivers/mfd/da9062-core.c | 512 ++++++++++++++++\n" "> include/linux/mfd/da9062/core.h | 50 ++\n" - "> include/linux/mfd/da9062/registers.h | 1108 ++++++++++++++++++++++++++++++++++\n" + "> include/linux/mfd/da9062/registers.h | 1108 ++++++++++++++++++++++++++++=\n" + "++++++\n" "> 5 files changed, 1684 insertions(+), 1 deletion(-)\n" "> create mode 100644 drivers/mfd/da9062-core.c\n" "> create mode 100644 include/linux/mfd/da9062/core.h\n" @@ -84,13 +89,13 @@ "> @@ -186,6 +186,18 @@ config MFD_DA9055\n" "> \t This driver can be built as a module. If built as a module it will be\n" "> \t called \"da9055\"\n" - "> \n" + "> =20\n" "> +config MFD_DA9062\n" "> +\ttristate \"Dialog Semiconductor DA9062 PMIC Support\"\n" "> +\tselect MFD_CORE\n" "> +\tselect REGMAP_I2C\n" "> +\tselect REGMAP_IRQ\n" - "> +\tdepends on I2C=y\n" + "> +\tdepends on I2C=3Dy\n" "> +\thelp\n" "> +\t Say yes here for support for the Dialog Semiconductor DA9062 PMIC.\n" "> +\t This includes the I2C driver and core APIs.\n" @@ -104,19 +109,19 @@ "> index ea40e07..fd4d8b4 100644\n" "> --- a/drivers/mfd/Makefile\n" "> +++ b/drivers/mfd/Makefile\n" - "> @@ -110,10 +110,11 @@ obj-$(CONFIG_MFD_LP8788)\t+= lp8788.o lp8788-irq.o\n" - "> \n" - "> da9055-objs\t\t\t:= da9055-core.o da9055-i2c.o\n" - "> obj-$(CONFIG_MFD_DA9055)\t+= da9055.o\n" + "> @@ -110,10 +110,11 @@ obj-$(CONFIG_MFD_LP8788)\t+=3D lp8788.o lp8788-irq.o\n" + "> =20\n" + "> da9055-objs\t\t\t:=3D da9055-core.o da9055-i2c.o\n" + "> obj-$(CONFIG_MFD_DA9055)\t+=3D da9055.o\n" "> -\n" - "> +obj-$(CONFIG_MFD_DA9062)\t+= da9062-core.o\n" - "> da9063-objs\t\t\t:= da9063-core.o da9063-irq.o da9063-i2c.o\n" - "> obj-$(CONFIG_MFD_DA9063)\t+= da9063.o\n" - "> obj-$(CONFIG_MFD_DA9150)\t+= da9150-core.o\n" - "> +\n" - "> obj-$(CONFIG_MFD_MAX14577)\t+= max14577.o\n" - "> obj-$(CONFIG_MFD_MAX77686)\t+= max77686.o\n" - "> obj-$(CONFIG_MFD_MAX77693)\t+= max77693.o\n" + "> +obj-$(CONFIG_MFD_DA9062)\t+=3D da9062-core.o\n" + "> da9063-objs\t\t\t:=3D da9063-core.o da9063-irq.o da9063-i2c.o\n" + "> obj-$(CONFIG_MFD_DA9063)\t+=3D da9063.o\n" + "> obj-$(CONFIG_MFD_DA9150)\t+=3D da9150-core.o\n" + "> +\n" + "> obj-$(CONFIG_MFD_MAX14577)\t+=3D max14577.o\n" + "> obj-$(CONFIG_MFD_MAX77686)\t+=3D max77686.o\n" + "> obj-$(CONFIG_MFD_MAX77693)\t+=3D max77693.o\n" "> diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c\n" "> new file mode 100644\n" "> index 0000000..4cf0643\n" @@ -155,116 +160,116 @@ "> +#define\tDA9062_REG_EVENT_B_OFFSET\t1\n" "> +#define\tDA9062_REG_EVENT_C_OFFSET\t2\n" "> +\n" - "> +static struct regmap_irq da9062_irqs[] = {\n" + "> +static struct regmap_irq da9062_irqs[] =3D {\n" "> +\t/* EVENT A */\n" - "> +\t[DA9062_IRQ_ONKEY] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_A_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_NONKEY_MASK,\n" + "> +\t[DA9062_IRQ_ONKEY] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_A_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_NONKEY_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_ALARM] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_A_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_ALARM_MASK,\n" + "> +\t[DA9062_IRQ_ALARM] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_A_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_ALARM_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_TICK] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_A_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_TICK_MASK,\n" + "> +\t[DA9062_IRQ_TICK] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_A_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_TICK_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_WDG_WARN] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_A_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_WDG_WARN_MASK,\n" + "> +\t[DA9062_IRQ_WDG_WARN] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_A_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_WDG_WARN_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_SEQ_RDY] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_A_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_SEQ_RDY_MASK,\n" + "> +\t[DA9062_IRQ_SEQ_RDY] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_A_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_SEQ_RDY_MASK,\n" "> +\t},\n" "> +\t/* EVENT B */\n" - "> +\t[DA9062_IRQ_TEMP] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_B_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_TEMP_MASK,\n" + "> +\t[DA9062_IRQ_TEMP] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_B_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_TEMP_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_LDO_LIM] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_B_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_LDO_LIM_MASK,\n" + "> +\t[DA9062_IRQ_LDO_LIM] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_B_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_LDO_LIM_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_DVC_RDY] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_B_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_DVC_RDY_MASK,\n" + "> +\t[DA9062_IRQ_DVC_RDY] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_B_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_DVC_RDY_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_VDD_WARN] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_B_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_VDD_WARN_MASK,\n" + "> +\t[DA9062_IRQ_VDD_WARN] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_B_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_VDD_WARN_MASK,\n" "> +\t},\n" "> +\t/* EVENT C */\n" - "> +\t[DA9062_IRQ_GPI0] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_C_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_GPI0_MASK,\n" + "> +\t[DA9062_IRQ_GPI0] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_C_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_GPI0_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_GPI1] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_C_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_GPI1_MASK,\n" + "> +\t[DA9062_IRQ_GPI1] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_C_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_GPI1_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_GPI2] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_C_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_GPI2_MASK,\n" + "> +\t[DA9062_IRQ_GPI2] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_C_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_GPI2_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_GPI3] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_C_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_GPI3_MASK,\n" + "> +\t[DA9062_IRQ_GPI3] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_C_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_GPI3_MASK,\n" "> +\t},\n" - "> +\t[DA9062_IRQ_GPI4] = {\n" - "> +\t\t.reg_offset = DA9062_REG_EVENT_C_OFFSET,\n" - "> +\t\t.mask = DA9062AA_M_GPI4_MASK,\n" + "> +\t[DA9062_IRQ_GPI4] =3D {\n" + "> +\t\t.reg_offset =3D DA9062_REG_EVENT_C_OFFSET,\n" + "> +\t\t.mask =3D DA9062AA_M_GPI4_MASK,\n" "> +\t},\n" "> +};\n" "> +\n" - "> +static struct regmap_irq_chip da9062_irq_chip = {\n" - "> +\t.name = \"da9062-irq\",\n" - "> +\t.irqs = da9062_irqs,\n" - "> +\t.num_irqs = DA9062_NUM_IRQ,\n" - "> +\t.num_regs = 3,\n" - "> +\t.status_base = DA9062AA_EVENT_A,\n" - "> +\t.mask_base = DA9062AA_IRQ_MASK_A,\n" - "> +\t.ack_base = DA9062AA_EVENT_A,\n" + "> +static struct regmap_irq_chip da9062_irq_chip =3D {\n" + "> +\t.name =3D \"da9062-irq\",\n" + "> +\t.irqs =3D da9062_irqs,\n" + "> +\t.num_irqs =3D DA9062_NUM_IRQ,\n" + "> +\t.num_regs =3D 3,\n" + "> +\t.status_base =3D DA9062AA_EVENT_A,\n" + "> +\t.mask_base =3D DA9062AA_IRQ_MASK_A,\n" + "> +\t.ack_base =3D DA9062AA_EVENT_A,\n" "> +};\n" "> +\n" - "> +static struct resource da9062_core_resources[] = {\n" + "> +static struct resource da9062_core_resources[] =3D {\n" "> +\tDEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, \"VDD_WARN\", IORESOURCE_IRQ),\n" "> +};\n" "> +\n" - "> +static struct resource da9062_regulators_resources[] = {\n" + "> +static struct resource da9062_regulators_resources[] =3D {\n" "> +\tDEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, \"LDO_LIM\", IORESOURCE_IRQ),\n" "> +};\n" "> +\n" - "> +static struct resource da9062_thermal_resources[] = {\n" + "> +static struct resource da9062_thermal_resources[] =3D {\n" "> +\tDEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, \"THERMAL\", IORESOURCE_IRQ),\n" "> +};\n" "> +\n" - "> +static struct resource da9062_wdt_resources[] = {\n" + "> +static struct resource da9062_wdt_resources[] =3D {\n" "> +\tDEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, \"WD_WARN\", IORESOURCE_IRQ),\n" "> +};\n" "> +\n" - "> +static const struct mfd_cell da9062_devs[] = {\n" + "> +static const struct mfd_cell da9062_devs[] =3D {\n" "> +\t{\n" - "> +\t\t.name\t\t= \"da9062-core\",\n" - "> +\t\t.num_resources\t= ARRAY_SIZE(da9062_core_resources),\n" - "> +\t\t.resources\t= da9062_core_resources,\n" + "> +\t\t.name\t\t=3D \"da9062-core\",\n" + "> +\t\t.num_resources\t=3D ARRAY_SIZE(da9062_core_resources),\n" + "> +\t\t.resources\t=3D da9062_core_resources,\n" "> +\t},\n" "> +\t{\n" - "> +\t\t.name\t\t= \"da9062-regulators\",\n" - "> +\t\t.num_resources\t= ARRAY_SIZE(da9062_regulators_resources),\n" - "> +\t\t.resources\t= da9062_regulators_resources,\n" + "> +\t\t.name\t\t=3D \"da9062-regulators\",\n" + "> +\t\t.num_resources\t=3D ARRAY_SIZE(da9062_regulators_resources),\n" + "> +\t\t.resources\t=3D da9062_regulators_resources,\n" "> +\t},\n" "> +\t{\n" - "> +\t\t.name\t\t= \"da9062-watchdog\",\n" - "> +\t\t.num_resources\t= ARRAY_SIZE(da9062_wdt_resources),\n" - "> +\t\t.resources\t= da9062_wdt_resources,\n" - "> +\t\t.of_compatible = \"dlg,da9062-wdt\",\n" + "> +\t\t.name\t\t=3D \"da9062-watchdog\",\n" + "> +\t\t.num_resources\t=3D ARRAY_SIZE(da9062_wdt_resources),\n" + "> +\t\t.resources\t=3D da9062_wdt_resources,\n" + "> +\t\t.of_compatible =3D \"dlg,da9062-wdt\",\n" "> +\t},\n" "> +\t{\n" - "> +\t\t.name\t\t= \"da9062-thermal\",\n" - "> +\t\t.num_resources\t= ARRAY_SIZE(da9062_thermal_resources),\n" - "> +\t\t.resources\t= da9062_thermal_resources,\n" - "> +\t\t.of_compatible = \"dlg,da9062-thermal\",\n" + "> +\t\t.name\t\t=3D \"da9062-thermal\",\n" + "> +\t\t.num_resources\t=3D ARRAY_SIZE(da9062_thermal_resources),\n" + "> +\t\t.resources\t=3D da9062_thermal_resources,\n" + "> +\t\t.of_compatible =3D \"dlg,da9062-thermal\",\n" "> +\t},\n" "> +};\n" "> +\n" @@ -273,7 +278,7 @@ "> +\tint ret;\n" "> +\tint fault_log;\n" "> +\n" - "> +\tret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);\n" + "> +\tret =3D regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);\n" "> +\tif (ret < 0)\n" "> +\t\treturn ret;\n" "> +\n" @@ -295,7 +300,7 @@ "> +\t\tif (fault_log & DA9062AA_WAIT_SHUT_MASK)\n" "> +\t\t\tdev_dbg(chip->dev, \"Fault log entry detected: WAIT_SHUT\\n\");\n" "> +\n" - "> +\t\tret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,\n" + "> +\t\tret =3D regmap_write(chip->regmap, DA9062AA_FAULT_LOG,\n" "> +\t\t\t\t fault_log);\n" "> +\t}\n" "> +\n" @@ -307,17 +312,17 @@ "> +\tint device_id, variant_id, variant_mrc;\n" "> +\tint ret;\n" "> +\n" - "> +\tret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);\n" + "> +\tret =3D regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);\n" "> +\tif (ret < 0) {\n" "> +\t\tdev_err(chip->dev, \"Cannot read chip ID.\\n\");\n" "> +\t\treturn -EIO;\n" "> +\t}\n" - "> +\tif (device_id != DA9062_PMIC_DEVICE_ID) {\n" + "> +\tif (device_id !=3D DA9062_PMIC_DEVICE_ID) {\n" "> +\t\tdev_err(chip->dev, \"Invalid device ID: 0x%02x\\n\", device_id);\n" "> +\t\treturn -ENODEV;\n" "> +\t}\n" "> +\n" - "> +\tret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);\n" + "> +\tret =3D regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);\n" "> +\tif (ret < 0) {\n" "> +\t\tdev_err(chip->dev, \"Cannot read chip variant id.\\n\");\n" "> +\t\treturn -EIO;\n" @@ -327,7 +332,7 @@ "> +\t\t \"Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\\n\",\n" "> +\t\t device_id, variant_id);\n" "> +\n" - "> +\tvariant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;\n" + "> +\tvariant_mrc =3D (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;\n" "> +\n" "> +\tif (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {\n" "> +\t\tdev_err(chip->dev,\n" @@ -338,205 +343,205 @@ "> +\treturn ret;\n" "> +}\n" "> +\n" - "> +static const struct regmap_range da9062_aa_readable_ranges[] = {\n" + "> +static const struct regmap_range da9062_aa_readable_ranges[] =3D {\n" "> +\t{\n" - "> +\t\t.range_min = DA9062AA_PAGE_CON,\n" - "> +\t\t.range_max = DA9062AA_STATUS_B,\n" + "> +\t\t.range_min =3D DA9062AA_PAGE_CON,\n" + "> +\t\t.range_max =3D DA9062AA_STATUS_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_STATUS_D,\n" - "> +\t\t.range_max = DA9062AA_EVENT_C,\n" + "> +\t\t.range_min =3D DA9062AA_STATUS_D,\n" + "> +\t\t.range_max =3D DA9062AA_EVENT_C,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_IRQ_MASK_A,\n" - "> +\t\t.range_max = DA9062AA_IRQ_MASK_C,\n" + "> +\t\t.range_min =3D DA9062AA_IRQ_MASK_A,\n" + "> +\t\t.range_max =3D DA9062AA_IRQ_MASK_C,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_CONTROL_A,\n" - "> +\t\t.range_max = DA9062AA_GPIO_4,\n" + "> +\t\t.range_min =3D DA9062AA_CONTROL_A,\n" + "> +\t\t.range_max =3D DA9062AA_GPIO_4,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_GPIO_WKUP_MODE,\n" - "> +\t\t.range_max = DA9062AA_BUCK4_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_GPIO_WKUP_MODE,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK4_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_BUCK3_CONT,\n" - "> +\t\t.range_max = DA9062AA_BUCK3_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_BUCK3_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK3_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_LDO1_CONT,\n" - "> +\t\t.range_max = DA9062AA_LDO4_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_LDO1_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_LDO4_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_DVC_1,\n" - "> +\t\t.range_max = DA9062AA_DVC_1,\n" + "> +\t\t.range_min =3D DA9062AA_DVC_1,\n" + "> +\t\t.range_max =3D DA9062AA_DVC_1,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_COUNT_S,\n" - "> +\t\t.range_max = DA9062AA_SECOND_D,\n" + "> +\t\t.range_min =3D DA9062AA_COUNT_S,\n" + "> +\t\t.range_max =3D DA9062AA_SECOND_D,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_SEQ,\n" - "> +\t\t.range_max = DA9062AA_ID_4_3,\n" + "> +\t\t.range_min =3D DA9062AA_SEQ,\n" + "> +\t\t.range_max =3D DA9062AA_ID_4_3,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_ID_12_11,\n" - "> +\t\t.range_max = DA9062AA_ID_16_15,\n" + "> +\t\t.range_min =3D DA9062AA_ID_12_11,\n" + "> +\t\t.range_max =3D DA9062AA_ID_16_15,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_ID_22_21,\n" - "> +\t\t.range_max = DA9062AA_ID_32_31,\n" + "> +\t\t.range_min =3D DA9062AA_ID_22_21,\n" + "> +\t\t.range_max =3D DA9062AA_ID_32_31,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_SEQ_A,\n" - "> +\t\t.range_max = DA9062AA_BUCK3_CFG,\n" + "> +\t\t.range_min =3D DA9062AA_SEQ_A,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK3_CFG,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK2_A,\n" - "> +\t\t.range_max = DA9062AA_VBUCK4_A,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK2_A,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK4_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK3_A,\n" - "> +\t\t.range_max = DA9062AA_VBUCK3_A,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK3_A,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK3_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VLDO1_A,\n" - "> +\t\t.range_max = DA9062AA_VLDO4_A,\n" + "> +\t\t.range_min =3D DA9062AA_VLDO1_A,\n" + "> +\t\t.range_max =3D DA9062AA_VLDO4_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK2_B,\n" - "> +\t\t.range_max = DA9062AA_VBUCK4_B,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK2_B,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK4_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK3_B,\n" - "> +\t\t.range_max = DA9062AA_VBUCK3_B,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK3_B,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK3_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VLDO1_B,\n" - "> +\t\t.range_max = DA9062AA_VLDO4_B,\n" + "> +\t\t.range_min =3D DA9062AA_VLDO1_B,\n" + "> +\t\t.range_max =3D DA9062AA_VLDO4_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_BBAT_CONT,\n" - "> +\t\t.range_max = DA9062AA_BBAT_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_BBAT_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_BBAT_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_INTERFACE,\n" - "> +\t\t.range_max = DA9062AA_CONFIG_E,\n" + "> +\t\t.range_min =3D DA9062AA_INTERFACE,\n" + "> +\t\t.range_max =3D DA9062AA_CONFIG_E,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_CONFIG_G,\n" - "> +\t\t.range_max = DA9062AA_CONFIG_K,\n" + "> +\t\t.range_min =3D DA9062AA_CONFIG_G,\n" + "> +\t\t.range_max =3D DA9062AA_CONFIG_K,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_CONFIG_M,\n" - "> +\t\t.range_max = DA9062AA_CONFIG_M,\n" + "> +\t\t.range_min =3D DA9062AA_CONFIG_M,\n" + "> +\t\t.range_max =3D DA9062AA_CONFIG_M,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_TRIM_CLDR,\n" - "> +\t\t.range_max = DA9062AA_GP_ID_19,\n" + "> +\t\t.range_min =3D DA9062AA_TRIM_CLDR,\n" + "> +\t\t.range_max =3D DA9062AA_GP_ID_19,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_DEVICE_ID,\n" - "> +\t\t.range_max = DA9062AA_CONFIG_ID,\n" + "> +\t\t.range_min =3D DA9062AA_DEVICE_ID,\n" + "> +\t\t.range_max =3D DA9062AA_CONFIG_ID,\n" "> +\t},\n" "> +};\n" "> +\n" - "> +static const struct regmap_range da9062_aa_writeable_ranges[] = {\n" + "> +static const struct regmap_range da9062_aa_writeable_ranges[] =3D {\n" "> +\t{\n" - "> +\t\t.range_min = DA9062AA_PAGE_CON,\n" - "> +\t\t.range_max = DA9062AA_PAGE_CON,\n" + "> +\t\t.range_min =3D DA9062AA_PAGE_CON,\n" + "> +\t\t.range_max =3D DA9062AA_PAGE_CON,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_FAULT_LOG,\n" - "> +\t\t.range_max = DA9062AA_EVENT_C,\n" + "> +\t\t.range_min =3D DA9062AA_FAULT_LOG,\n" + "> +\t\t.range_max =3D DA9062AA_EVENT_C,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_IRQ_MASK_A,\n" - "> +\t\t.range_max = DA9062AA_IRQ_MASK_C,\n" + "> +\t\t.range_min =3D DA9062AA_IRQ_MASK_A,\n" + "> +\t\t.range_max =3D DA9062AA_IRQ_MASK_C,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_CONTROL_A,\n" - "> +\t\t.range_max = DA9062AA_GPIO_4,\n" + "> +\t\t.range_min =3D DA9062AA_CONTROL_A,\n" + "> +\t\t.range_max =3D DA9062AA_GPIO_4,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_GPIO_WKUP_MODE,\n" - "> +\t\t.range_max = DA9062AA_BUCK4_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_GPIO_WKUP_MODE,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK4_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_BUCK3_CONT,\n" - "> +\t\t.range_max = DA9062AA_BUCK3_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_BUCK3_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK3_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_LDO1_CONT,\n" - "> +\t\t.range_max = DA9062AA_LDO4_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_LDO1_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_LDO4_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_DVC_1,\n" - "> +\t\t.range_max = DA9062AA_DVC_1,\n" + "> +\t\t.range_min =3D DA9062AA_DVC_1,\n" + "> +\t\t.range_max =3D DA9062AA_DVC_1,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_COUNT_S,\n" - "> +\t\t.range_max = DA9062AA_ALARM_Y,\n" + "> +\t\t.range_min =3D DA9062AA_COUNT_S,\n" + "> +\t\t.range_max =3D DA9062AA_ALARM_Y,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_SEQ,\n" - "> +\t\t.range_max = DA9062AA_ID_4_3,\n" + "> +\t\t.range_min =3D DA9062AA_SEQ,\n" + "> +\t\t.range_max =3D DA9062AA_ID_4_3,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_ID_12_11,\n" - "> +\t\t.range_max = DA9062AA_ID_16_15,\n" + "> +\t\t.range_min =3D DA9062AA_ID_12_11,\n" + "> +\t\t.range_max =3D DA9062AA_ID_16_15,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_ID_22_21,\n" - "> +\t\t.range_max = DA9062AA_ID_32_31,\n" + "> +\t\t.range_min =3D DA9062AA_ID_22_21,\n" + "> +\t\t.range_max =3D DA9062AA_ID_32_31,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_SEQ_A,\n" - "> +\t\t.range_max = DA9062AA_BUCK3_CFG,\n" + "> +\t\t.range_min =3D DA9062AA_SEQ_A,\n" + "> +\t\t.range_max =3D DA9062AA_BUCK3_CFG,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK2_A,\n" - "> +\t\t.range_max = DA9062AA_VBUCK4_A,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK2_A,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK4_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK3_A,\n" - "> +\t\t.range_max = DA9062AA_VBUCK3_A,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK3_A,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK3_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VLDO1_A,\n" - "> +\t\t.range_max = DA9062AA_VLDO4_A,\n" + "> +\t\t.range_min =3D DA9062AA_VLDO1_A,\n" + "> +\t\t.range_max =3D DA9062AA_VLDO4_A,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK2_B,\n" - "> +\t\t.range_max = DA9062AA_VBUCK4_B,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK2_B,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK4_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VBUCK3_B,\n" - "> +\t\t.range_max = DA9062AA_VBUCK3_B,\n" + "> +\t\t.range_min =3D DA9062AA_VBUCK3_B,\n" + "> +\t\t.range_max =3D DA9062AA_VBUCK3_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_VLDO1_B,\n" - "> +\t\t.range_max = DA9062AA_VLDO4_B,\n" + "> +\t\t.range_min =3D DA9062AA_VLDO1_B,\n" + "> +\t\t.range_max =3D DA9062AA_VLDO4_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_BBAT_CONT,\n" - "> +\t\t.range_max = DA9062AA_BBAT_CONT,\n" + "> +\t\t.range_min =3D DA9062AA_BBAT_CONT,\n" + "> +\t\t.range_max =3D DA9062AA_BBAT_CONT,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_GP_ID_0,\n" - "> +\t\t.range_max = DA9062AA_GP_ID_19,\n" + "> +\t\t.range_min =3D DA9062AA_GP_ID_0,\n" + "> +\t\t.range_max =3D DA9062AA_GP_ID_19,\n" "> +\t},\n" "> +};\n" "> +\n" - "> +static const struct regmap_range da9062_aa_volatile_ranges[] = {\n" + "> +static const struct regmap_range da9062_aa_volatile_ranges[] =3D {\n" "> +\t{\n" - "> +\t\t.range_min = DA9062AA_PAGE_CON,\n" - "> +\t\t.range_max = DA9062AA_STATUS_B,\n" + "> +\t\t.range_min =3D DA9062AA_PAGE_CON,\n" + "> +\t\t.range_max =3D DA9062AA_STATUS_B,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_STATUS_D,\n" - "> +\t\t.range_max = DA9062AA_EVENT_C,\n" + "> +\t\t.range_min =3D DA9062AA_STATUS_D,\n" + "> +\t\t.range_max =3D DA9062AA_EVENT_C,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_CONTROL_F,\n" - "> +\t\t.range_max = DA9062AA_CONTROL_F,\n" + "> +\t\t.range_min =3D DA9062AA_CONTROL_F,\n" + "> +\t\t.range_max =3D DA9062AA_CONTROL_F,\n" "> +\t}, {\n" - "> +\t\t.range_min = DA9062AA_COUNT_S,\n" - "> +\t\t.range_max = DA9062AA_SECOND_D,\n" + "> +\t\t.range_min =3D DA9062AA_COUNT_S,\n" + "> +\t\t.range_max =3D DA9062AA_SECOND_D,\n" "> +\t},\n" "> +};\n" "> +\n" - "> +static const struct regmap_access_table da9062_aa_readable_table = {\n" - "> +\t.yes_ranges = da9062_aa_readable_ranges,\n" - "> +\t.n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),\n" + "> +static const struct regmap_access_table da9062_aa_readable_table =3D {\n" + "> +\t.yes_ranges =3D da9062_aa_readable_ranges,\n" + "> +\t.n_yes_ranges =3D ARRAY_SIZE(da9062_aa_readable_ranges),\n" "> +};\n" "> +\n" - "> +static const struct regmap_access_table da9062_aa_writeable_table = {\n" - "> +\t.yes_ranges = da9062_aa_writeable_ranges,\n" - "> +\t.n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),\n" + "> +static const struct regmap_access_table da9062_aa_writeable_table =3D {\n" + "> +\t.yes_ranges =3D da9062_aa_writeable_ranges,\n" + "> +\t.n_yes_ranges =3D ARRAY_SIZE(da9062_aa_writeable_ranges),\n" "> +};\n" "> +\n" - "> +static const struct regmap_access_table da9062_aa_volatile_table = {\n" - "> +\t.yes_ranges = da9062_aa_volatile_ranges,\n" - "> +\t.n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),\n" + "> +static const struct regmap_access_table da9062_aa_volatile_table =3D {\n" + "> +\t.yes_ranges =3D da9062_aa_volatile_ranges,\n" + "> +\t.n_yes_ranges =3D ARRAY_SIZE(da9062_aa_volatile_ranges),\n" "> +};\n" "> +\n" - "> +static const struct regmap_range_cfg da9062_range_cfg[] = {\n" + "> +static const struct regmap_range_cfg da9062_range_cfg[] =3D {\n" "> +\t{\n" - "> +\t\t.range_min = DA9062AA_PAGE_CON,\n" - "> +\t\t.range_max = DA9062AA_CONFIG_ID,\n" - "> +\t\t.selector_reg = DA9062AA_PAGE_CON,\n" - "> +\t\t.selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,\n" - "> +\t\t.selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,\n" - "> +\t\t.window_start = 0,\n" - "> +\t\t.window_len = 256,\n" + "> +\t\t.range_min =3D DA9062AA_PAGE_CON,\n" + "> +\t\t.range_max =3D DA9062AA_CONFIG_ID,\n" + "> +\t\t.selector_reg =3D DA9062AA_PAGE_CON,\n" + "> +\t\t.selector_mask =3D 1 << DA9062_I2C_PAGE_SEL_SHIFT,\n" + "> +\t\t.selector_shift =3D DA9062_I2C_PAGE_SEL_SHIFT,\n" + "> +\t\t.window_start =3D 0,\n" + "> +\t\t.window_len =3D 256,\n" "> +\t}\n" "> +};\n" "> +\n" - "> +static struct regmap_config da9062_regmap_config = {\n" - "> +\t.reg_bits = 8,\n" - "> +\t.val_bits = 8,\n" - "> +\t.ranges = da9062_range_cfg,\n" - "> +\t.num_ranges = ARRAY_SIZE(da9062_range_cfg),\n" - "> +\t.max_register = DA9062AA_CONFIG_ID,\n" - "> +\t.cache_type = REGCACHE_RBTREE,\n" - "> +\t.rd_table = &da9062_aa_readable_table,\n" - "> +\t.wr_table = &da9062_aa_writeable_table,\n" - "> +\t.volatile_table = &da9062_aa_volatile_table,\n" + "> +static struct regmap_config da9062_regmap_config =3D {\n" + "> +\t.reg_bits =3D 8,\n" + "> +\t.val_bits =3D 8,\n" + "> +\t.ranges =3D da9062_range_cfg,\n" + "> +\t.num_ranges =3D ARRAY_SIZE(da9062_range_cfg),\n" + "> +\t.max_register =3D DA9062AA_CONFIG_ID,\n" + "> +\t.cache_type =3D REGCACHE_RBTREE,\n" + "> +\t.rd_table =3D &da9062_aa_readable_table,\n" + "> +\t.wr_table =3D &da9062_aa_writeable_table,\n" + "> +\t.volatile_table =3D &da9062_aa_volatile_table,\n" "> +};\n" "> +\n" "> +static int da9062_i2c_probe(struct i2c_client *i2c,\n" @@ -546,35 +551,35 @@ "> +\tunsigned int irq_base;\n" "> +\tint ret;\n" "> +\n" - "> +\tchip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);\n" + "> +\tchip =3D devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);\n" "> +\tif (!chip)\n" "> +\t\treturn -ENOMEM;\n" "> +\n" "> +\ti2c_set_clientdata(i2c, chip);\n" - "> +\tchip->dev = &i2c->dev;\n" + "> +\tchip->dev =3D &i2c->dev;\n" "> +\n" "> +\tif (!i2c->irq) {\n" "> +\t\tdev_err(chip->dev, \"No IRQ configured\\n\");\n" "> +\t\treturn -EINVAL;\n" "> +\t}\n" "> +\n" - "> +\tchip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);\n" + "> +\tchip->regmap =3D devm_regmap_init_i2c(i2c, &da9062_regmap_config);\n" "> +\tif (IS_ERR(chip->regmap)) {\n" - "> +\t\tret = PTR_ERR(chip->regmap);\n" + "> +\t\tret =3D PTR_ERR(chip->regmap);\n" "> +\t\tdev_err(chip->dev, \"Failed to allocate register map: %d\\n\",\n" "> +\t\t\tret);\n" "> +\t\treturn ret;\n" "> +\t}\n" "> +\n" - "> +\tret = da9062_clear_fault_log(chip);\n" + "> +\tret =3D da9062_clear_fault_log(chip);\n" "> +\tif (ret < 0)\n" "> +\t\tdev_warn(chip->dev, \"Cannot clear fault log\\n\");\n" "> +\n" - "> +\tret = get_device_type(chip);\n" + "> +\tret =3D get_device_type(chip);\n" "> +\tif (ret)\n" "> +\t\treturn ret;\n" "> +\n" - "> +\tret = regmap_add_irq_chip(chip->regmap, i2c->irq,\n" + "> +\tret =3D regmap_add_irq_chip(chip->regmap, i2c->irq,\n" "> +\t\t\tIRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,\n" "> +\t\t\t-1, &da9062_irq_chip,\n" "> +\t\t\t&chip->regmap_irq);\n" @@ -584,9 +589,9 @@ "> +\t\treturn ret;\n" "> +\t}\n" "> +\n" - "> +\tirq_base = regmap_irq_chip_get_base(chip->regmap_irq);\n" + "> +\tirq_base =3D regmap_irq_chip_get_base(chip->regmap_irq);\n" "> +\n" - "> +\tret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,\n" + "> +\tret =3D mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs,\n" "> +\t\t\t ARRAY_SIZE(da9062_devs), NULL, irq_base,\n" "> +\t\t\t NULL);\n" "> +\tif (ret) {\n" @@ -600,7 +605,7 @@ "> +\n" "> +static int da9062_i2c_remove(struct i2c_client *i2c)\n" "> +{\n" - "> +\tstruct da9062 *chip = i2c_get_clientdata(i2c);\n" + "> +\tstruct da9062 *chip =3D i2c_get_clientdata(i2c);\n" "> +\n" "> +\tmfd_remove_devices(chip->dev);\n" "> +\tregmap_del_irq_chip(i2c->irq, chip->regmap_irq);\n" @@ -608,34 +613,35 @@ "> +\treturn 0;\n" "> +}\n" "> +\n" - "> +static const struct i2c_device_id da9062_i2c_id[] = {\n" + "> +static const struct i2c_device_id da9062_i2c_id[] =3D {\n" "> +\t{ \"da9062\", 0 },\n" "> +\t{ },\n" "> +};\n" "> +MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);\n" "> +\n" - "> +static const struct of_device_id da9062_dt_ids[] = {\n" - "> +\t{ .compatible = \"dlg,da9062\", },\n" + "> +static const struct of_device_id da9062_dt_ids[] =3D {\n" + "> +\t{ .compatible =3D \"dlg,da9062\", },\n" "> +\t{ }\n" "> +};\n" "> +MODULE_DEVICE_TABLE(of, da9062_dt_ids);\n" "> +\n" - "> +static struct i2c_driver da9062_i2c_driver = {\n" - "> +\t.driver = {\n" - "> +\t\t.name = \"da9062\",\n" - "> +\t\t.of_match_table = of_match_ptr(da9062_dt_ids),\n" + "> +static struct i2c_driver da9062_i2c_driver =3D {\n" + "> +\t.driver =3D {\n" + "> +\t\t.name =3D \"da9062\",\n" + "> +\t\t.of_match_table =3D of_match_ptr(da9062_dt_ids),\n" "> +\t},\n" - "> +\t.probe = da9062_i2c_probe,\n" - "> +\t.remove = da9062_i2c_remove,\n" - "> +\t.id_table = da9062_i2c_id,\n" + "> +\t.probe =3D da9062_i2c_probe,\n" + "> +\t.remove =3D da9062_i2c_remove,\n" + "> +\t.id_table =3D da9062_i2c_id,\n" "> +};\n" "> +\n" "> +module_i2c_driver(da9062_i2c_driver);\n" "> +\n" "> +MODULE_DESCRIPTION(\"Core device driver for Dialog DA9062\");\n" - "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\");\n" + "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource@diasemi.com>\");\n" "> +MODULE_LICENSE(\"GPL\");\n" - "> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h\n" + "> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/c=\n" + "ore.h\n" "> new file mode 100644\n" "> index 0000000..376ba84\n" "> --- /dev/null\n" @@ -691,7 +697,8 @@ "> +};\n" "> +\n" "> +#endif /* __MFD_DA9062_CORE_H__ */\n" - "> diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9062/registers.h\n" + "> diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9=\n" + "062/registers.h\n" "> new file mode 100644\n" "> index 0000000..97790d1\n" "> --- /dev/null\n" @@ -858,7 +865,7 @@ "> + * Bit fields\n" "> + */\n" "> +\n" - "> +/* DA9062AA_PAGE_CON = 0x000 */\n" + "> +/* DA9062AA_PAGE_CON =3D 0x000 */\n" "> +#define DA9062AA_PAGE_SHIFT\t\t0\n" "> +#define DA9062AA_PAGE_MASK\t\t0x3f\n" "> +#define DA9062AA_WRITE_MODE_SHIFT\t6\n" @@ -866,13 +873,13 @@ "> +#define DA9062AA_REVERT_SHIFT\t\t7\n" "> +#define DA9062AA_REVERT_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_STATUS_A = 0x001 */\n" + "> +/* DA9062AA_STATUS_A =3D 0x001 */\n" "> +#define DA9062AA_NONKEY_SHIFT\t\t0\n" "> +#define DA9062AA_NONKEY_MASK\t\t0x01\n" "> +#define DA9062AA_DVC_BUSY_SHIFT\t\t2\n" "> +#define DA9062AA_DVC_BUSY_MASK\t\tBIT(2)\n" "> +\n" - "> +/* DA9062AA_STATUS_B = 0x002 */\n" + "> +/* DA9062AA_STATUS_B =3D 0x002 */\n" "> +#define DA9062AA_GPI0_SHIFT\t\t0\n" "> +#define DA9062AA_GPI0_MASK\t\t0x01\n" "> +#define DA9062AA_GPI1_SHIFT\t\t1\n" @@ -884,7 +891,7 @@ "> +#define DA9062AA_GPI4_SHIFT\t\t4\n" "> +#define DA9062AA_GPI4_MASK\t\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_STATUS_D = 0x004 */\n" + "> +/* DA9062AA_STATUS_D =3D 0x004 */\n" "> +#define DA9062AA_LDO1_ILIM_SHIFT\t0\n" "> +#define DA9062AA_LDO1_ILIM_MASK\t\t0x01\n" "> +#define DA9062AA_LDO2_ILIM_SHIFT\t1\n" @@ -894,7 +901,7 @@ "> +#define DA9062AA_LDO4_ILIM_SHIFT\t3\n" "> +#define DA9062AA_LDO4_ILIM_MASK\t\tBIT(3)\n" "> +\n" - "> +/* DA9062AA_FAULT_LOG = 0x005 */\n" + "> +/* DA9062AA_FAULT_LOG =3D 0x005 */\n" "> +#define DA9062AA_TWD_ERROR_SHIFT\t0\n" "> +#define DA9062AA_TWD_ERROR_MASK\t\t0x01\n" "> +#define DA9062AA_POR_SHIFT\t\t1\n" @@ -912,7 +919,7 @@ "> +#define DA9062AA_WAIT_SHUT_SHIFT\t7\n" "> +#define DA9062AA_WAIT_SHUT_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_EVENT_A = 0x006 */\n" + "> +/* DA9062AA_EVENT_A =3D 0x006 */\n" "> +#define DA9062AA_E_NONKEY_SHIFT\t\t0\n" "> +#define DA9062AA_E_NONKEY_MASK\t\t0x01\n" "> +#define DA9062AA_E_ALARM_SHIFT\t\t1\n" @@ -928,7 +935,7 @@ "> +#define DA9062AA_EVENTS_C_SHIFT\t\t6\n" "> +#define DA9062AA_EVENTS_C_MASK\t\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_EVENT_B = 0x007 */\n" + "> +/* DA9062AA_EVENT_B =3D 0x007 */\n" "> +#define DA9062AA_E_TEMP_SHIFT\t\t1\n" "> +#define DA9062AA_E_TEMP_MASK\t\tBIT(1)\n" "> +#define DA9062AA_E_LDO_LIM_SHIFT\t3\n" @@ -938,7 +945,7 @@ "> +#define DA9062AA_E_VDD_WARN_SHIFT\t7\n" "> +#define DA9062AA_E_VDD_WARN_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_EVENT_C = 0x008 */\n" + "> +/* DA9062AA_EVENT_C =3D 0x008 */\n" "> +#define DA9062AA_E_GPI0_SHIFT\t\t0\n" "> +#define DA9062AA_E_GPI0_MASK\t\t0x01\n" "> +#define DA9062AA_E_GPI1_SHIFT\t\t1\n" @@ -950,7 +957,7 @@ "> +#define DA9062AA_E_GPI4_SHIFT\t\t4\n" "> +#define DA9062AA_E_GPI4_MASK\t\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_IRQ_MASK_A = 0x00A */\n" + "> +/* DA9062AA_IRQ_MASK_A =3D 0x00A */\n" "> +#define DA9062AA_M_NONKEY_SHIFT\t\t0\n" "> +#define DA9062AA_M_NONKEY_MASK\t\t0x01\n" "> +#define DA9062AA_M_ALARM_SHIFT\t\t1\n" @@ -962,7 +969,7 @@ "> +#define DA9062AA_M_SEQ_RDY_SHIFT\t4\n" "> +#define DA9062AA_M_SEQ_RDY_MASK\t\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_IRQ_MASK_B = 0x00B */\n" + "> +/* DA9062AA_IRQ_MASK_B =3D 0x00B */\n" "> +#define DA9062AA_M_TEMP_SHIFT\t\t1\n" "> +#define DA9062AA_M_TEMP_MASK\t\tBIT(1)\n" "> +#define DA9062AA_M_LDO_LIM_SHIFT\t3\n" @@ -972,7 +979,7 @@ "> +#define DA9062AA_M_VDD_WARN_SHIFT\t7\n" "> +#define DA9062AA_M_VDD_WARN_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_IRQ_MASK_C = 0x00C */\n" + "> +/* DA9062AA_IRQ_MASK_C =3D 0x00C */\n" "> +#define DA9062AA_M_GPI0_SHIFT\t\t0\n" "> +#define DA9062AA_M_GPI0_MASK\t\t0x01\n" "> +#define DA9062AA_M_GPI1_SHIFT\t\t1\n" @@ -984,7 +991,7 @@ "> +#define DA9062AA_M_GPI4_SHIFT\t\t4\n" "> +#define DA9062AA_M_GPI4_MASK\t\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_CONTROL_A = 0x00E */\n" + "> +/* DA9062AA_CONTROL_A =3D 0x00E */\n" "> +#define DA9062AA_SYSTEM_EN_SHIFT\t0\n" "> +#define DA9062AA_SYSTEM_EN_MASK\t\t0x01\n" "> +#define DA9062AA_POWER_EN_SHIFT\t\t1\n" @@ -1000,7 +1007,7 @@ "> +#define DA9062AA_M_POWER1_EN_SHIFT\t6\n" "> +#define DA9062AA_M_POWER1_EN_MASK\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_CONTROL_B = 0x00F */\n" + "> +/* DA9062AA_CONTROL_B =3D 0x00F */\n" "> +#define DA9062AA_WATCHDOG_PD_SHIFT\t1\n" "> +#define DA9062AA_WATCHDOG_PD_MASK\tBIT(1)\n" "> +#define DA9062AA_FREEZE_EN_SHIFT\t2\n" @@ -1014,7 +1021,7 @@ "> +#define DA9062AA_BUCK_SLOWSTART_SHIFT\t7\n" "> +#define DA9062AA_BUCK_SLOWSTART_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_CONTROL_C = 0x010 */\n" + "> +/* DA9062AA_CONTROL_C =3D 0x010 */\n" "> +#define DA9062AA_DEBOUNCING_SHIFT\t0\n" "> +#define DA9062AA_DEBOUNCING_MASK\t0x07\n" "> +#define DA9062AA_AUTO_BOOT_SHIFT\t3\n" @@ -1026,11 +1033,11 @@ "> +#define DA9062AA_DEF_SUPPLY_SHIFT\t7\n" "> +#define DA9062AA_DEF_SUPPLY_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_CONTROL_D = 0x011 */\n" + "> +/* DA9062AA_CONTROL_D =3D 0x011 */\n" "> +#define DA9062AA_TWDSCALE_SHIFT\t\t0\n" "> +#define DA9062AA_TWDSCALE_MASK\t\t0x07\n" "> +\n" - "> +/* DA9062AA_CONTROL_E = 0x012 */\n" + "> +/* DA9062AA_CONTROL_E =3D 0x012 */\n" "> +#define DA9062AA_RTC_MODE_PD_SHIFT\t0\n" "> +#define DA9062AA_RTC_MODE_PD_MASK\t0x01\n" "> +#define DA9062AA_RTC_MODE_SD_SHIFT\t1\n" @@ -1040,7 +1047,7 @@ "> +#define DA9062AA_V_LOCK_SHIFT\t\t7\n" "> +#define DA9062AA_V_LOCK_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_CONTROL_F = 0x013 */\n" + "> +/* DA9062AA_CONTROL_F =3D 0x013 */\n" "> +#define DA9062AA_WATCHDOG_SHIFT\t\t0\n" "> +#define DA9062AA_WATCHDOG_MASK\t\t0x01\n" "> +#define DA9062AA_SHUTDOWN_SHIFT\t\t1\n" @@ -1048,7 +1055,7 @@ "> +#define DA9062AA_WAKE_UP_SHIFT\t\t2\n" "> +#define DA9062AA_WAKE_UP_MASK\t\tBIT(2)\n" "> +\n" - "> +/* DA9062AA_PD_DIS = 0x014 */\n" + "> +/* DA9062AA_PD_DIS =3D 0x014 */\n" "> +#define DA9062AA_GPI_DIS_SHIFT\t\t0\n" "> +#define DA9062AA_GPI_DIS_MASK\t\t0x01\n" "> +#define DA9062AA_PMIF_DIS_SHIFT\t\t2\n" @@ -1062,7 +1069,7 @@ "> +#define DA9062AA_PMCONT_DIS_SHIFT\t7\n" "> +#define DA9062AA_PMCONT_DIS_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_GPIO_0_1 = 0x015 */\n" + "> +/* DA9062AA_GPIO_0_1 =3D 0x015 */\n" "> +#define DA9062AA_GPIO0_PIN_SHIFT\t0\n" "> +#define DA9062AA_GPIO0_PIN_MASK\t\t0x03\n" "> +#define DA9062AA_GPIO0_TYPE_SHIFT\t2\n" @@ -1076,7 +1083,7 @@ "> +#define DA9062AA_GPIO1_WEN_SHIFT\t7\n" "> +#define DA9062AA_GPIO1_WEN_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_GPIO_2_3 = 0x016 */\n" + "> +/* DA9062AA_GPIO_2_3 =3D 0x016 */\n" "> +#define DA9062AA_GPIO2_PIN_SHIFT\t0\n" "> +#define DA9062AA_GPIO2_PIN_MASK\t\t0x03\n" "> +#define DA9062AA_GPIO2_TYPE_SHIFT\t2\n" @@ -1090,7 +1097,7 @@ "> +#define DA9062AA_GPIO3_WEN_SHIFT\t7\n" "> +#define DA9062AA_GPIO3_WEN_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_GPIO_4 = 0x017 */\n" + "> +/* DA9062AA_GPIO_4 =3D 0x017 */\n" "> +#define DA9062AA_GPIO4_PIN_SHIFT\t0\n" "> +#define DA9062AA_GPIO4_PIN_MASK\t\t0x03\n" "> +#define DA9062AA_GPIO4_TYPE_SHIFT\t2\n" @@ -1098,7 +1105,7 @@ "> +#define DA9062AA_GPIO4_WEN_SHIFT\t3\n" "> +#define DA9062AA_GPIO4_WEN_MASK\t\tBIT(3)\n" "> +\n" - "> +/* DA9062AA_GPIO_WKUP_MODE = 0x01C */\n" + "> +/* DA9062AA_GPIO_WKUP_MODE =3D 0x01C */\n" "> +#define DA9062AA_GPIO0_WKUP_MODE_SHIFT\t0\n" "> +#define DA9062AA_GPIO0_WKUP_MODE_MASK\t0x01\n" "> +#define DA9062AA_GPIO1_WKUP_MODE_SHIFT\t1\n" @@ -1110,7 +1117,7 @@ "> +#define DA9062AA_GPIO4_WKUP_MODE_SHIFT\t4\n" "> +#define DA9062AA_GPIO4_WKUP_MODE_MASK\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_GPIO_MODE0_4 = 0x01D */\n" + "> +/* DA9062AA_GPIO_MODE0_4 =3D 0x01D */\n" "> +#define DA9062AA_GPIO0_MODE_SHIFT\t0\n" "> +#define DA9062AA_GPIO0_MODE_MASK\t0x01\n" "> +#define DA9062AA_GPIO1_MODE_SHIFT\t1\n" @@ -1122,7 +1129,7 @@ "> +#define DA9062AA_GPIO4_MODE_SHIFT\t4\n" "> +#define DA9062AA_GPIO4_MODE_MASK\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_GPIO_OUT0_2 = 0x01E */\n" + "> +/* DA9062AA_GPIO_OUT0_2 =3D 0x01E */\n" "> +#define DA9062AA_GPIO0_OUT_SHIFT\t0\n" "> +#define DA9062AA_GPIO0_OUT_MASK\t\t0x07\n" "> +#define DA9062AA_GPIO1_OUT_SHIFT\t3\n" @@ -1130,13 +1137,13 @@ "> +#define DA9062AA_GPIO2_OUT_SHIFT\t6\n" "> +#define DA9062AA_GPIO2_OUT_MASK\t\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_GPIO_OUT3_4 = 0x01F */\n" + "> +/* DA9062AA_GPIO_OUT3_4 =3D 0x01F */\n" "> +#define DA9062AA_GPIO3_OUT_SHIFT\t0\n" "> +#define DA9062AA_GPIO3_OUT_MASK\t\t0x07\n" "> +#define DA9062AA_GPIO4_OUT_SHIFT\t3\n" "> +#define DA9062AA_GPIO4_OUT_MASK\t\t(0x03 << 3)\n" "> +\n" - "> +/* DA9062AA_BUCK2_CONT = 0x020 */\n" + "> +/* DA9062AA_BUCK2_CONT =3D 0x020 */\n" "> +#define DA9062AA_BUCK2_EN_SHIFT\t\t0\n" "> +#define DA9062AA_BUCK2_EN_MASK\t\t0x01\n" "> +#define DA9062AA_BUCK2_GPI_SHIFT\t1\n" @@ -1146,7 +1153,7 @@ "> +#define DA9062AA_VBUCK2_GPI_SHIFT\t5\n" "> +#define DA9062AA_VBUCK2_GPI_MASK\t(0x03 << 5)\n" "> +\n" - "> +/* DA9062AA_BUCK1_CONT = 0x021 */\n" + "> +/* DA9062AA_BUCK1_CONT =3D 0x021 */\n" "> +#define DA9062AA_BUCK1_EN_SHIFT\t\t0\n" "> +#define DA9062AA_BUCK1_EN_MASK\t\t0x01\n" "> +#define DA9062AA_BUCK1_GPI_SHIFT\t1\n" @@ -1156,7 +1163,7 @@ "> +#define DA9062AA_VBUCK1_GPI_SHIFT\t5\n" "> +#define DA9062AA_VBUCK1_GPI_MASK\t(0x03 << 5)\n" "> +\n" - "> +/* DA9062AA_BUCK4_CONT = 0x022 */\n" + "> +/* DA9062AA_BUCK4_CONT =3D 0x022 */\n" "> +#define DA9062AA_BUCK4_EN_SHIFT\t\t0\n" "> +#define DA9062AA_BUCK4_EN_MASK\t\t0x01\n" "> +#define DA9062AA_BUCK4_GPI_SHIFT\t1\n" @@ -1166,7 +1173,7 @@ "> +#define DA9062AA_VBUCK4_GPI_SHIFT\t5\n" "> +#define DA9062AA_VBUCK4_GPI_MASK\t(0x03 << 5)\n" "> +\n" - "> +/* DA9062AA_BUCK3_CONT = 0x024 */\n" + "> +/* DA9062AA_BUCK3_CONT =3D 0x024 */\n" "> +#define DA9062AA_BUCK3_EN_SHIFT\t\t0\n" "> +#define DA9062AA_BUCK3_EN_MASK\t\t0x01\n" "> +#define DA9062AA_BUCK3_GPI_SHIFT\t1\n" @@ -1176,7 +1183,7 @@ "> +#define DA9062AA_VBUCK3_GPI_SHIFT\t5\n" "> +#define DA9062AA_VBUCK3_GPI_MASK\t(0x03 << 5)\n" "> +\n" - "> +/* DA9062AA_LDO1_CONT = 0x026 */\n" + "> +/* DA9062AA_LDO1_CONT =3D 0x026 */\n" "> +#define DA9062AA_LDO1_EN_SHIFT\t\t0\n" "> +#define DA9062AA_LDO1_EN_MASK\t\t0x01\n" "> +#define DA9062AA_LDO1_GPI_SHIFT\t\t1\n" @@ -1188,7 +1195,7 @@ "> +#define DA9062AA_LDO1_CONF_SHIFT\t7\n" "> +#define DA9062AA_LDO1_CONF_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_LDO2_CONT = 0x027 */\n" + "> +/* DA9062AA_LDO2_CONT =3D 0x027 */\n" "> +#define DA9062AA_LDO2_EN_SHIFT\t\t0\n" "> +#define DA9062AA_LDO2_EN_MASK\t\t0x01\n" "> +#define DA9062AA_LDO2_GPI_SHIFT\t\t1\n" @@ -1200,7 +1207,7 @@ "> +#define DA9062AA_LDO2_CONF_SHIFT\t7\n" "> +#define DA9062AA_LDO2_CONF_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_LDO3_CONT = 0x028 */\n" + "> +/* DA9062AA_LDO3_CONT =3D 0x028 */\n" "> +#define DA9062AA_LDO3_EN_SHIFT\t\t0\n" "> +#define DA9062AA_LDO3_EN_MASK\t\t0x01\n" "> +#define DA9062AA_LDO3_GPI_SHIFT\t\t1\n" @@ -1212,7 +1219,7 @@ "> +#define DA9062AA_LDO3_CONF_SHIFT\t7\n" "> +#define DA9062AA_LDO3_CONF_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_LDO4_CONT = 0x029 */\n" + "> +/* DA9062AA_LDO4_CONT =3D 0x029 */\n" "> +#define DA9062AA_LDO4_EN_SHIFT\t\t0\n" "> +#define DA9062AA_LDO4_EN_MASK\t\t0x01\n" "> +#define DA9062AA_LDO4_GPI_SHIFT\t\t1\n" @@ -1224,7 +1231,7 @@ "> +#define DA9062AA_LDO4_CONF_SHIFT\t7\n" "> +#define DA9062AA_LDO4_CONF_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_DVC_1 = 0x032 */\n" + "> +/* DA9062AA_DVC_1 =3D 0x032 */\n" "> +#define DA9062AA_VBUCK1_SEL_SHIFT\t0\n" "> +#define DA9062AA_VBUCK1_SEL_MASK\t0x01\n" "> +#define DA9062AA_VBUCK2_SEL_SHIFT\t1\n" @@ -1242,53 +1249,53 @@ "> +#define DA9062AA_VLDO4_SEL_SHIFT\t7\n" "> +#define DA9062AA_VLDO4_SEL_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_COUNT_S = 0x040 */\n" + "> +/* DA9062AA_COUNT_S =3D 0x040 */\n" "> +#define DA9062AA_COUNT_SEC_SHIFT\t0\n" "> +#define DA9062AA_COUNT_SEC_MASK\t\t0x3f\n" "> +#define DA9062AA_RTC_READ_SHIFT\t\t7\n" "> +#define DA9062AA_RTC_READ_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_COUNT_MI = 0x041 */\n" + "> +/* DA9062AA_COUNT_MI =3D 0x041 */\n" "> +#define DA9062AA_COUNT_MIN_SHIFT\t0\n" "> +#define DA9062AA_COUNT_MIN_MASK\t\t0x3f\n" "> +\n" - "> +/* DA9062AA_COUNT_H = 0x042 */\n" + "> +/* DA9062AA_COUNT_H =3D 0x042 */\n" "> +#define DA9062AA_COUNT_HOUR_SHIFT\t0\n" "> +#define DA9062AA_COUNT_HOUR_MASK\t0x1f\n" "> +\n" - "> +/* DA9062AA_COUNT_D = 0x043 */\n" + "> +/* DA9062AA_COUNT_D =3D 0x043 */\n" "> +#define DA9062AA_COUNT_DAY_SHIFT\t0\n" "> +#define DA9062AA_COUNT_DAY_MASK\t\t0x1f\n" "> +\n" - "> +/* DA9062AA_COUNT_MO = 0x044 */\n" + "> +/* DA9062AA_COUNT_MO =3D 0x044 */\n" "> +#define DA9062AA_COUNT_MONTH_SHIFT\t0\n" "> +#define DA9062AA_COUNT_MONTH_MASK\t0x0f\n" "> +\n" - "> +/* DA9062AA_COUNT_Y = 0x045 */\n" + "> +/* DA9062AA_COUNT_Y =3D 0x045 */\n" "> +#define DA9062AA_COUNT_YEAR_SHIFT\t0\n" "> +#define DA9062AA_COUNT_YEAR_MASK\t0x3f\n" "> +#define DA9062AA_MONITOR_SHIFT\t\t6\n" "> +#define DA9062AA_MONITOR_MASK\t\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_ALARM_S = 0x046 */\n" + "> +/* DA9062AA_ALARM_S =3D 0x046 */\n" "> +#define DA9062AA_ALARM_SEC_SHIFT\t0\n" "> +#define DA9062AA_ALARM_SEC_MASK\t\t0x3f\n" "> +#define DA9062AA_ALARM_STATUS_SHIFT\t6\n" "> +#define DA9062AA_ALARM_STATUS_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_ALARM_MI = 0x047 */\n" + "> +/* DA9062AA_ALARM_MI =3D 0x047 */\n" "> +#define DA9062AA_ALARM_MIN_SHIFT\t0\n" "> +#define DA9062AA_ALARM_MIN_MASK\t\t0x3f\n" "> +\n" - "> +/* DA9062AA_ALARM_H = 0x048 */\n" + "> +/* DA9062AA_ALARM_H =3D 0x048 */\n" "> +#define DA9062AA_ALARM_HOUR_SHIFT\t0\n" "> +#define DA9062AA_ALARM_HOUR_MASK\t0x1f\n" "> +\n" - "> +/* DA9062AA_ALARM_D = 0x049 */\n" + "> +/* DA9062AA_ALARM_D =3D 0x049 */\n" "> +#define DA9062AA_ALARM_DAY_SHIFT\t0\n" "> +#define DA9062AA_ALARM_DAY_MASK\t\t0x1f\n" "> +\n" - "> +/* DA9062AA_ALARM_MO = 0x04A */\n" + "> +/* DA9062AA_ALARM_MO =3D 0x04A */\n" "> +#define DA9062AA_ALARM_MONTH_SHIFT\t0\n" "> +#define DA9062AA_ALARM_MONTH_MASK\t0x0f\n" "> +#define DA9062AA_TICK_TYPE_SHIFT\t4\n" @@ -1296,7 +1303,7 @@ "> +#define DA9062AA_TICK_WAKE_SHIFT\t5\n" "> +#define DA9062AA_TICK_WAKE_MASK\t\tBIT(5)\n" "> +\n" - "> +/* DA9062AA_ALARM_Y = 0x04B */\n" + "> +/* DA9062AA_ALARM_Y =3D 0x04B */\n" "> +#define DA9062AA_ALARM_YEAR_SHIFT\t0\n" "> +#define DA9062AA_ALARM_YEAR_MASK\t0x3f\n" "> +#define DA9062AA_ALARM_ON_SHIFT\t\t6\n" @@ -1304,111 +1311,111 @@ "> +#define DA9062AA_TICK_ON_SHIFT\t\t7\n" "> +#define DA9062AA_TICK_ON_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_SECOND_A = 0x04C */\n" + "> +/* DA9062AA_SECOND_A =3D 0x04C */\n" "> +#define DA9062AA_SECONDS_A_SHIFT\t0\n" "> +#define DA9062AA_SECONDS_A_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_SECOND_B = 0x04D */\n" + "> +/* DA9062AA_SECOND_B =3D 0x04D */\n" "> +#define DA9062AA_SECONDS_B_SHIFT\t0\n" "> +#define DA9062AA_SECONDS_B_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_SECOND_C = 0x04E */\n" + "> +/* DA9062AA_SECOND_C =3D 0x04E */\n" "> +#define DA9062AA_SECONDS_C_SHIFT\t0\n" "> +#define DA9062AA_SECONDS_C_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_SECOND_D = 0x04F */\n" + "> +/* DA9062AA_SECOND_D =3D 0x04F */\n" "> +#define DA9062AA_SECONDS_D_SHIFT\t0\n" "> +#define DA9062AA_SECONDS_D_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_SEQ = 0x081 */\n" + "> +/* DA9062AA_SEQ =3D 0x081 */\n" "> +#define DA9062AA_SEQ_POINTER_SHIFT\t0\n" "> +#define DA9062AA_SEQ_POINTER_MASK\t0x0f\n" "> +#define DA9062AA_NXT_SEQ_START_SHIFT\t4\n" "> +#define DA9062AA_NXT_SEQ_START_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_SEQ_TIMER = 0x082 */\n" + "> +/* DA9062AA_SEQ_TIMER =3D 0x082 */\n" "> +#define DA9062AA_SEQ_TIME_SHIFT\t\t0\n" "> +#define DA9062AA_SEQ_TIME_MASK\t\t0x0f\n" "> +#define DA9062AA_SEQ_DUMMY_SHIFT\t4\n" "> +#define DA9062AA_SEQ_DUMMY_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_2_1 = 0x083 */\n" + "> +/* DA9062AA_ID_2_1 =3D 0x083 */\n" "> +#define DA9062AA_LDO1_STEP_SHIFT\t0\n" "> +#define DA9062AA_LDO1_STEP_MASK\t\t0x0f\n" "> +#define DA9062AA_LDO2_STEP_SHIFT\t4\n" "> +#define DA9062AA_LDO2_STEP_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_4_3 = 0x084 */\n" + "> +/* DA9062AA_ID_4_3 =3D 0x084 */\n" "> +#define DA9062AA_LDO3_STEP_SHIFT\t0\n" "> +#define DA9062AA_LDO3_STEP_MASK\t\t0x0f\n" "> +#define DA9062AA_LDO4_STEP_SHIFT\t4\n" "> +#define DA9062AA_LDO4_STEP_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_12_11 = 0x088 */\n" + "> +/* DA9062AA_ID_12_11 =3D 0x088 */\n" "> +#define DA9062AA_PD_DIS_STEP_SHIFT\t4\n" "> +#define DA9062AA_PD_DIS_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_14_13 = 0x089 */\n" + "> +/* DA9062AA_ID_14_13 =3D 0x089 */\n" "> +#define DA9062AA_BUCK1_STEP_SHIFT\t0\n" "> +#define DA9062AA_BUCK1_STEP_MASK\t0x0f\n" "> +#define DA9062AA_BUCK2_STEP_SHIFT\t4\n" "> +#define DA9062AA_BUCK2_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_16_15 = 0x08A */\n" + "> +/* DA9062AA_ID_16_15 =3D 0x08A */\n" "> +#define DA9062AA_BUCK4_STEP_SHIFT\t0\n" "> +#define DA9062AA_BUCK4_STEP_MASK\t0x0f\n" "> +#define DA9062AA_BUCK3_STEP_SHIFT\t4\n" "> +#define DA9062AA_BUCK3_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_22_21 = 0x08D */\n" + "> +/* DA9062AA_ID_22_21 =3D 0x08D */\n" "> +#define DA9062AA_GP_RISE1_STEP_SHIFT\t0\n" "> +#define DA9062AA_GP_RISE1_STEP_MASK\t0x0f\n" "> +#define DA9062AA_GP_FALL1_STEP_SHIFT\t4\n" "> +#define DA9062AA_GP_FALL1_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_24_23 = 0x08E */\n" + "> +/* DA9062AA_ID_24_23 =3D 0x08E */\n" "> +#define DA9062AA_GP_RISE2_STEP_SHIFT\t0\n" "> +#define DA9062AA_GP_RISE2_STEP_MASK\t0x0f\n" "> +#define DA9062AA_GP_FALL2_STEP_SHIFT\t4\n" "> +#define DA9062AA_GP_FALL2_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_26_25 = 0x08F */\n" + "> +/* DA9062AA_ID_26_25 =3D 0x08F */\n" "> +#define DA9062AA_GP_RISE3_STEP_SHIFT\t0\n" "> +#define DA9062AA_GP_RISE3_STEP_MASK\t0x0f\n" "> +#define DA9062AA_GP_FALL3_STEP_SHIFT\t4\n" "> +#define DA9062AA_GP_FALL3_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_28_27 = 0x090 */\n" + "> +/* DA9062AA_ID_28_27 =3D 0x090 */\n" "> +#define DA9062AA_GP_RISE4_STEP_SHIFT\t0\n" "> +#define DA9062AA_GP_RISE4_STEP_MASK\t0x0f\n" "> +#define DA9062AA_GP_FALL4_STEP_SHIFT\t4\n" "> +#define DA9062AA_GP_FALL4_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_30_29 = 0x091 */\n" + "> +/* DA9062AA_ID_30_29 =3D 0x091 */\n" "> +#define DA9062AA_GP_RISE5_STEP_SHIFT\t0\n" "> +#define DA9062AA_GP_RISE5_STEP_MASK\t0x0f\n" "> +#define DA9062AA_GP_FALL5_STEP_SHIFT\t4\n" "> +#define DA9062AA_GP_FALL5_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_ID_32_31 = 0x092 */\n" + "> +/* DA9062AA_ID_32_31 =3D 0x092 */\n" "> +#define DA9062AA_WAIT_STEP_SHIFT\t0\n" "> +#define DA9062AA_WAIT_STEP_MASK\t\t0x0f\n" "> +#define DA9062AA_EN32K_STEP_SHIFT\t4\n" "> +#define DA9062AA_EN32K_STEP_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_SEQ_A = 0x095 */\n" + "> +/* DA9062AA_SEQ_A =3D 0x095 */\n" "> +#define DA9062AA_SYSTEM_END_SHIFT\t0\n" "> +#define DA9062AA_SYSTEM_END_MASK\t0x0f\n" "> +#define DA9062AA_POWER_END_SHIFT\t4\n" "> +#define DA9062AA_POWER_END_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_SEQ_B = 0x096 */\n" + "> +/* DA9062AA_SEQ_B =3D 0x096 */\n" "> +#define DA9062AA_MAX_COUNT_SHIFT\t0\n" "> +#define DA9062AA_MAX_COUNT_MASK\t\t0x0f\n" "> +#define DA9062AA_PART_DOWN_SHIFT\t4\n" "> +#define DA9062AA_PART_DOWN_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_WAIT = 0x097 */\n" + "> +/* DA9062AA_WAIT =3D 0x097 */\n" "> +#define DA9062AA_WAIT_TIME_SHIFT\t0\n" "> +#define DA9062AA_WAIT_TIME_MASK\t\t0x0f\n" "> +#define DA9062AA_WAIT_MODE_SHIFT\t4\n" @@ -1418,7 +1425,7 @@ "> +#define DA9062AA_WAIT_DIR_SHIFT\t\t6\n" "> +#define DA9062AA_WAIT_DIR_MASK\t\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_EN_32K = 0x098 */\n" + "> +/* DA9062AA_EN_32K =3D 0x098 */\n" "> +#define DA9062AA_STABILISATION_TIME_SHIFT\t0\n" "> +#define DA9062AA_STABILISATION_TIME_MASK\t0x07\n" "> +#define DA9062AA_CRYSTAL_SHIFT\t\t\t3\n" @@ -1432,39 +1439,39 @@ "> +#define DA9062AA_EN_32KOUT_SHIFT\t\t7\n" "> +#define DA9062AA_EN_32KOUT_MASK\t\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_RESET = 0x099 */\n" + "> +/* DA9062AA_RESET =3D 0x099 */\n" "> +#define DA9062AA_RESET_TIMER_SHIFT\t0\n" "> +#define DA9062AA_RESET_TIMER_MASK\t0x3f\n" "> +#define DA9062AA_RESET_EVENT_SHIFT\t6\n" "> +#define DA9062AA_RESET_EVENT_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_BUCK_ILIM_A = 0x09A */\n" + "> +/* DA9062AA_BUCK_ILIM_A =3D 0x09A */\n" "> +#define DA9062AA_BUCK3_ILIM_SHIFT\t0\n" "> +#define DA9062AA_BUCK3_ILIM_MASK\t0x0f\n" "> +\n" - "> +/* DA9062AA_BUCK_ILIM_B = 0x09B */\n" + "> +/* DA9062AA_BUCK_ILIM_B =3D 0x09B */\n" "> +#define DA9062AA_BUCK4_ILIM_SHIFT\t0\n" "> +#define DA9062AA_BUCK4_ILIM_MASK\t0x0f\n" "> +\n" - "> +/* DA9062AA_BUCK_ILIM_C = 0x09C */\n" + "> +/* DA9062AA_BUCK_ILIM_C =3D 0x09C */\n" "> +#define DA9062AA_BUCK1_ILIM_SHIFT\t0\n" "> +#define DA9062AA_BUCK1_ILIM_MASK\t0x0f\n" "> +#define DA9062AA_BUCK2_ILIM_SHIFT\t4\n" "> +#define DA9062AA_BUCK2_ILIM_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_BUCK2_CFG = 0x09D */\n" + "> +/* DA9062AA_BUCK2_CFG =3D 0x09D */\n" "> +#define DA9062AA_BUCK2_PD_DIS_SHIFT\t5\n" "> +#define DA9062AA_BUCK2_PD_DIS_MASK\tBIT(5)\n" "> +#define DA9062AA_BUCK2_MODE_SHIFT\t6\n" "> +#define DA9062AA_BUCK2_MODE_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_BUCK1_CFG = 0x09E */\n" + "> +/* DA9062AA_BUCK1_CFG =3D 0x09E */\n" "> +#define DA9062AA_BUCK1_PD_DIS_SHIFT\t5\n" "> +#define DA9062AA_BUCK1_PD_DIS_MASK\tBIT(5)\n" "> +#define DA9062AA_BUCK1_MODE_SHIFT\t6\n" "> +#define DA9062AA_BUCK1_MODE_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_BUCK4_CFG = 0x09F */\n" + "> +/* DA9062AA_BUCK4_CFG =3D 0x09F */\n" "> +#define DA9062AA_BUCK4_VTTR_EN_SHIFT\t3\n" "> +#define DA9062AA_BUCK4_VTTR_EN_MASK\tBIT(3)\n" "> +#define DA9062AA_BUCK4_VTT_EN_SHIFT\t4\n" @@ -1474,119 +1481,119 @@ "> +#define DA9062AA_BUCK4_MODE_SHIFT\t6\n" "> +#define DA9062AA_BUCK4_MODE_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_BUCK3_CFG = 0x0A0 */\n" + "> +/* DA9062AA_BUCK3_CFG =3D 0x0A0 */\n" "> +#define DA9062AA_BUCK3_PD_DIS_SHIFT\t5\n" "> +#define DA9062AA_BUCK3_PD_DIS_MASK\tBIT(5)\n" "> +#define DA9062AA_BUCK3_MODE_SHIFT\t6\n" "> +#define DA9062AA_BUCK3_MODE_MASK\t(0x03 << 6)\n" "> +\n" - "> +/* DA9062AA_VBUCK2_A = 0x0A3 */\n" + "> +/* DA9062AA_VBUCK2_A =3D 0x0A3 */\n" "> +#define DA9062AA_VBUCK2_A_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK2_A_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK2_SL_A_SHIFT\t7\n" "> +#define DA9062AA_BUCK2_SL_A_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK1_A = 0x0A4 */\n" + "> +/* DA9062AA_VBUCK1_A =3D 0x0A4 */\n" "> +#define DA9062AA_VBUCK1_A_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK1_A_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK1_SL_A_SHIFT\t7\n" "> +#define DA9062AA_BUCK1_SL_A_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK4_A = 0x0A5 */\n" + "> +/* DA9062AA_VBUCK4_A =3D 0x0A5 */\n" "> +#define DA9062AA_VBUCK4_A_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK4_A_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK4_SL_A_SHIFT\t7\n" "> +#define DA9062AA_BUCK4_SL_A_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK3_A = 0x0A7 */\n" + "> +/* DA9062AA_VBUCK3_A =3D 0x0A7 */\n" "> +#define DA9062AA_VBUCK3_A_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK3_A_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK3_SL_A_SHIFT\t7\n" "> +#define DA9062AA_BUCK3_SL_A_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO1_A = 0x0A9 */\n" + "> +/* DA9062AA_VLDO1_A =3D 0x0A9 */\n" "> +#define DA9062AA_VLDO1_A_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO1_A_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO1_SL_A_SHIFT\t7\n" "> +#define DA9062AA_LDO1_SL_A_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO2_A = 0x0AA */\n" + "> +/* DA9062AA_VLDO2_A =3D 0x0AA */\n" "> +#define DA9062AA_VLDO2_A_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO2_A_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO2_SL_A_SHIFT\t7\n" "> +#define DA9062AA_LDO2_SL_A_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO3_A = 0x0AB */\n" + "> +/* DA9062AA_VLDO3_A =3D 0x0AB */\n" "> +#define DA9062AA_VLDO3_A_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO3_A_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO3_SL_A_SHIFT\t7\n" "> +#define DA9062AA_LDO3_SL_A_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO4_A = 0x0AC */\n" + "> +/* DA9062AA_VLDO4_A =3D 0x0AC */\n" "> +#define DA9062AA_VLDO4_A_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO4_A_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO4_SL_A_SHIFT\t7\n" "> +#define DA9062AA_LDO4_SL_A_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK2_B = 0x0B4 */\n" + "> +/* DA9062AA_VBUCK2_B =3D 0x0B4 */\n" "> +#define DA9062AA_VBUCK2_B_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK2_B_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK2_SL_B_SHIFT\t7\n" "> +#define DA9062AA_BUCK2_SL_B_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK1_B = 0x0B5 */\n" + "> +/* DA9062AA_VBUCK1_B =3D 0x0B5 */\n" "> +#define DA9062AA_VBUCK1_B_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK1_B_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK1_SL_B_SHIFT\t7\n" "> +#define DA9062AA_BUCK1_SL_B_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK4_B = 0x0B6 */\n" + "> +/* DA9062AA_VBUCK4_B =3D 0x0B6 */\n" "> +#define DA9062AA_VBUCK4_B_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK4_B_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK4_SL_B_SHIFT\t7\n" "> +#define DA9062AA_BUCK4_SL_B_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VBUCK3_B = 0x0B8 */\n" + "> +/* DA9062AA_VBUCK3_B =3D 0x0B8 */\n" "> +#define DA9062AA_VBUCK3_B_SHIFT\t\t0\n" "> +#define DA9062AA_VBUCK3_B_MASK\t\t0x7f\n" "> +#define DA9062AA_BUCK3_SL_B_SHIFT\t7\n" "> +#define DA9062AA_BUCK3_SL_B_MASK\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO1_B = 0x0BA */\n" + "> +/* DA9062AA_VLDO1_B =3D 0x0BA */\n" "> +#define DA9062AA_VLDO1_B_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO1_B_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO1_SL_B_SHIFT\t7\n" "> +#define DA9062AA_LDO1_SL_B_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO2_B = 0x0BB */\n" + "> +/* DA9062AA_VLDO2_B =3D 0x0BB */\n" "> +#define DA9062AA_VLDO2_B_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO2_B_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO2_SL_B_SHIFT\t7\n" "> +#define DA9062AA_LDO2_SL_B_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO3_B = 0x0BC */\n" + "> +/* DA9062AA_VLDO3_B =3D 0x0BC */\n" "> +#define DA9062AA_VLDO3_B_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO3_B_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO3_SL_B_SHIFT\t7\n" "> +#define DA9062AA_LDO3_SL_B_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_VLDO4_B = 0x0BD */\n" + "> +/* DA9062AA_VLDO4_B =3D 0x0BD */\n" "> +#define DA9062AA_VLDO4_B_SHIFT\t\t0\n" "> +#define DA9062AA_VLDO4_B_MASK\t\t0x3f\n" "> +#define DA9062AA_LDO4_SL_B_SHIFT\t7\n" "> +#define DA9062AA_LDO4_SL_B_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_BBAT_CONT = 0x0C5 */\n" + "> +/* DA9062AA_BBAT_CONT =3D 0x0C5 */\n" "> +#define DA9062AA_BCHG_VSET_SHIFT\t0\n" "> +#define DA9062AA_BCHG_VSET_MASK\t\t0x0f\n" "> +#define DA9062AA_BCHG_ISET_SHIFT\t4\n" "> +#define DA9062AA_BCHG_ISET_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_INTERFACE = 0x105 */\n" + "> +/* DA9062AA_INTERFACE =3D 0x105 */\n" "> +#define DA9062AA_IF_BASE_ADDR_SHIFT\t4\n" "> +#define DA9062AA_IF_BASE_ADDR_MASK\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_CONFIG_A = 0x106 */\n" + "> +/* DA9062AA_CONFIG_A =3D 0x106 */\n" "> +#define DA9062AA_PM_I_V_SHIFT\t\t0\n" "> +#define DA9062AA_PM_I_V_MASK\t\t0x01\n" "> +#define DA9062AA_PM_O_TYPE_SHIFT\t2\n" @@ -1600,13 +1607,13 @@ "> +#define DA9062AA_PM_IF_HSM_SHIFT\t6\n" "> +#define DA9062AA_PM_IF_HSM_MASK\t\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_CONFIG_B = 0x107 */\n" + "> +/* DA9062AA_CONFIG_B =3D 0x107 */\n" "> +#define DA9062AA_VDD_FAULT_ADJ_SHIFT\t0\n" "> +#define DA9062AA_VDD_FAULT_ADJ_MASK\t0x0f\n" "> +#define DA9062AA_VDD_HYST_ADJ_SHIFT\t4\n" "> +#define DA9062AA_VDD_HYST_ADJ_MASK\t(0x07 << 4)\n" "> +\n" - "> +/* DA9062AA_CONFIG_C = 0x108 */\n" + "> +/* DA9062AA_CONFIG_C =3D 0x108 */\n" "> +#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT\t2\n" "> +#define DA9062AA_BUCK_ACTV_DISCHRG_MASK\t\tBIT(2)\n" "> +#define DA9062AA_BUCK1_CLK_INV_SHIFT\t\t3\n" @@ -1616,7 +1623,7 @@ "> +#define DA9062AA_BUCK3_CLK_INV_SHIFT\t\t6\n" "> +#define DA9062AA_BUCK3_CLK_INV_MASK\t\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_CONFIG_D = 0x109 */\n" + "> +/* DA9062AA_CONFIG_D =3D 0x109 */\n" "> +#define DA9062AA_GPI_V_SHIFT\t\t0\n" "> +#define DA9062AA_GPI_V_MASK\t\t0x01\n" "> +#define DA9062AA_NIRQ_MODE_SHIFT\t1\n" @@ -1626,7 +1633,7 @@ "> +#define DA9062AA_FORCE_RESET_SHIFT\t5\n" "> +#define DA9062AA_FORCE_RESET_MASK\tBIT(5)\n" "> +\n" - "> +/* DA9062AA_CONFIG_E = 0x10A */\n" + "> +/* DA9062AA_CONFIG_E =3D 0x10A */\n" "> +#define DA9062AA_BUCK1_AUTO_SHIFT\t0\n" "> +#define DA9062AA_BUCK1_AUTO_MASK\t0x01\n" "> +#define DA9062AA_BUCK2_AUTO_SHIFT\t1\n" @@ -1636,7 +1643,7 @@ "> +#define DA9062AA_BUCK3_AUTO_SHIFT\t4\n" "> +#define DA9062AA_BUCK3_AUTO_MASK\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_CONFIG_G = 0x10C */\n" + "> +/* DA9062AA_CONFIG_G =3D 0x10C */\n" "> +#define DA9062AA_LDO1_AUTO_SHIFT\t0\n" "> +#define DA9062AA_LDO1_AUTO_MASK\t\t0x01\n" "> +#define DA9062AA_LDO2_AUTO_SHIFT\t1\n" @@ -1646,7 +1653,7 @@ "> +#define DA9062AA_LDO4_AUTO_SHIFT\t3\n" "> +#define DA9062AA_LDO4_AUTO_MASK\t\tBIT(3)\n" "> +\n" - "> +/* DA9062AA_CONFIG_H = 0x10D */\n" + "> +/* DA9062AA_CONFIG_H =3D 0x10D */\n" "> +#define DA9062AA_BUCK1_2_MERGE_SHIFT\t3\n" "> +#define DA9062AA_BUCK1_2_MERGE_MASK\tBIT(3)\n" "> +#define DA9062AA_BUCK2_OD_SHIFT\t\t5\n" @@ -1654,7 +1661,7 @@ "> +#define DA9062AA_BUCK1_OD_SHIFT\t\t6\n" "> +#define DA9062AA_BUCK1_OD_MASK\t\tBIT(6)\n" "> +\n" - "> +/* DA9062AA_CONFIG_I = 0x10E */\n" + "> +/* DA9062AA_CONFIG_I =3D 0x10E */\n" "> +#define DA9062AA_NONKEY_PIN_SHIFT\t0\n" "> +#define DA9062AA_NONKEY_PIN_MASK\t0x03\n" "> +#define DA9062AA_nONKEY_SD_SHIFT\t2\n" @@ -1670,7 +1677,7 @@ "> +#define DA9062AA_LDO_SD_SHIFT\t\t7\n" "> +#define DA9062AA_LDO_SD_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_CONFIG_J = 0x10F */\n" + "> +/* DA9062AA_CONFIG_J =3D 0x10F */\n" "> +#define DA9062AA_KEY_DELAY_SHIFT\t0\n" "> +#define DA9062AA_KEY_DELAY_MASK\t\t0x03\n" "> +#define DA9062AA_SHUT_DELAY_SHIFT\t2\n" @@ -1682,7 +1689,7 @@ "> +#define DA9062AA_IF_RESET_SHIFT\t\t7\n" "> +#define DA9062AA_IF_RESET_MASK\t\tBIT(7)\n" "> +\n" - "> +/* DA9062AA_CONFIG_K = 0x110 */\n" + "> +/* DA9062AA_CONFIG_K =3D 0x110 */\n" "> +#define DA9062AA_GPIO0_PUPD_SHIFT\t0\n" "> +#define DA9062AA_GPIO0_PUPD_MASK\t0x01\n" "> +#define DA9062AA_GPIO1_PUPD_SHIFT\t1\n" @@ -1694,7 +1701,7 @@ "> +#define DA9062AA_GPIO4_PUPD_SHIFT\t4\n" "> +#define DA9062AA_GPIO4_PUPD_MASK\tBIT(4)\n" "> +\n" - "> +/* DA9062AA_CONFIG_M = 0x112 */\n" + "> +/* DA9062AA_CONFIG_M =3D 0x112 */\n" "> +#define DA9062AA_NSHUTDOWN_PU_SHIFT\t1\n" "> +#define DA9062AA_NSHUTDOWN_PU_MASK\tBIT(1)\n" "> +#define DA9062AA_WDG_MODE_SHIFT\t\t3\n" @@ -1702,118 +1709,127 @@ "> +#define DA9062AA_OSC_FRQ_SHIFT\t\t4\n" "> +#define DA9062AA_OSC_FRQ_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_TRIM_CLDR = 0x120 */\n" + "> +/* DA9062AA_TRIM_CLDR =3D 0x120 */\n" "> +#define DA9062AA_TRIM_CLDR_SHIFT\t0\n" "> +#define DA9062AA_TRIM_CLDR_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_0 = 0x121 */\n" + "> +/* DA9062AA_GP_ID_0 =3D 0x121 */\n" "> +#define DA9062AA_GP_0_SHIFT\t\t0\n" "> +#define DA9062AA_GP_0_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_1 = 0x122 */\n" + "> +/* DA9062AA_GP_ID_1 =3D 0x122 */\n" "> +#define DA9062AA_GP_1_SHIFT\t\t0\n" "> +#define DA9062AA_GP_1_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_2 = 0x123 */\n" + "> +/* DA9062AA_GP_ID_2 =3D 0x123 */\n" "> +#define DA9062AA_GP_2_SHIFT\t\t0\n" "> +#define DA9062AA_GP_2_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_3 = 0x124 */\n" + "> +/* DA9062AA_GP_ID_3 =3D 0x124 */\n" "> +#define DA9062AA_GP_3_SHIFT\t\t0\n" "> +#define DA9062AA_GP_3_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_4 = 0x125 */\n" + "> +/* DA9062AA_GP_ID_4 =3D 0x125 */\n" "> +#define DA9062AA_GP_4_SHIFT\t\t0\n" "> +#define DA9062AA_GP_4_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_5 = 0x126 */\n" + "> +/* DA9062AA_GP_ID_5 =3D 0x126 */\n" "> +#define DA9062AA_GP_5_SHIFT\t\t0\n" "> +#define DA9062AA_GP_5_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_6 = 0x127 */\n" + "> +/* DA9062AA_GP_ID_6 =3D 0x127 */\n" "> +#define DA9062AA_GP_6_SHIFT\t\t0\n" "> +#define DA9062AA_GP_6_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_7 = 0x128 */\n" + "> +/* DA9062AA_GP_ID_7 =3D 0x128 */\n" "> +#define DA9062AA_GP_7_SHIFT\t\t0\n" "> +#define DA9062AA_GP_7_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_8 = 0x129 */\n" + "> +/* DA9062AA_GP_ID_8 =3D 0x129 */\n" "> +#define DA9062AA_GP_8_SHIFT\t\t0\n" "> +#define DA9062AA_GP_8_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_9 = 0x12A */\n" + "> +/* DA9062AA_GP_ID_9 =3D 0x12A */\n" "> +#define DA9062AA_GP_9_SHIFT\t\t0\n" "> +#define DA9062AA_GP_9_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_10 = 0x12B */\n" + "> +/* DA9062AA_GP_ID_10 =3D 0x12B */\n" "> +#define DA9062AA_GP_10_SHIFT\t\t0\n" "> +#define DA9062AA_GP_10_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_11 = 0x12C */\n" + "> +/* DA9062AA_GP_ID_11 =3D 0x12C */\n" "> +#define DA9062AA_GP_11_SHIFT\t\t0\n" "> +#define DA9062AA_GP_11_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_12 = 0x12D */\n" + "> +/* DA9062AA_GP_ID_12 =3D 0x12D */\n" "> +#define DA9062AA_GP_12_SHIFT\t\t0\n" "> +#define DA9062AA_GP_12_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_13 = 0x12E */\n" + "> +/* DA9062AA_GP_ID_13 =3D 0x12E */\n" "> +#define DA9062AA_GP_13_SHIFT\t\t0\n" "> +#define DA9062AA_GP_13_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_14 = 0x12F */\n" + "> +/* DA9062AA_GP_ID_14 =3D 0x12F */\n" "> +#define DA9062AA_GP_14_SHIFT\t\t0\n" "> +#define DA9062AA_GP_14_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_15 = 0x130 */\n" + "> +/* DA9062AA_GP_ID_15 =3D 0x130 */\n" "> +#define DA9062AA_GP_15_SHIFT\t\t0\n" "> +#define DA9062AA_GP_15_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_16 = 0x131 */\n" + "> +/* DA9062AA_GP_ID_16 =3D 0x131 */\n" "> +#define DA9062AA_GP_16_SHIFT\t\t0\n" "> +#define DA9062AA_GP_16_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_17 = 0x132 */\n" + "> +/* DA9062AA_GP_ID_17 =3D 0x132 */\n" "> +#define DA9062AA_GP_17_SHIFT\t\t0\n" "> +#define DA9062AA_GP_17_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_18 = 0x133 */\n" + "> +/* DA9062AA_GP_ID_18 =3D 0x133 */\n" "> +#define DA9062AA_GP_18_SHIFT\t\t0\n" "> +#define DA9062AA_GP_18_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_GP_ID_19 = 0x134 */\n" + "> +/* DA9062AA_GP_ID_19 =3D 0x134 */\n" "> +#define DA9062AA_GP_19_SHIFT\t\t0\n" "> +#define DA9062AA_GP_19_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_DEVICE_ID = 0x181 */\n" + "> +/* DA9062AA_DEVICE_ID =3D 0x181 */\n" "> +#define DA9062AA_DEV_ID_SHIFT\t\t0\n" "> +#define DA9062AA_DEV_ID_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_VARIANT_ID = 0x182 */\n" + "> +/* DA9062AA_VARIANT_ID =3D 0x182 */\n" "> +#define DA9062AA_VRC_SHIFT\t\t0\n" "> +#define DA9062AA_VRC_MASK\t\t0x0f\n" "> +#define DA9062AA_MRC_SHIFT\t\t4\n" "> +#define DA9062AA_MRC_MASK\t\t(0x0f << 4)\n" "> +\n" - "> +/* DA9062AA_CUSTOMER_ID = 0x183 */\n" + "> +/* DA9062AA_CUSTOMER_ID =3D 0x183 */\n" "> +#define DA9062AA_CUST_ID_SHIFT\t\t0\n" "> +#define DA9062AA_CUST_ID_MASK\t\t0xff\n" "> +\n" - "> +/* DA9062AA_CONFIG_ID = 0x184 */\n" + "> +/* DA9062AA_CONFIG_ID =3D 0x184 */\n" "> +#define DA9062AA_CONFIG_REV_SHIFT\t0\n" "> +#define DA9062AA_CONFIG_REV_MASK\t0xff\n" "> +\n" "> +#endif /* __DA9062_H__ */\n" "\n" - "-- \n" + "--=20\n" "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" - "Linaro.org \342\224\202 Open source software for ARM SoCs\n" + "Linaro.org =E2=94=82 Open source software for ARM SoCs\n" "Follow Linaro: Facebook | Twitter | Blog\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe linux-watchdog\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + "\n" + "--=20\n" + "--=20\n" + "You received this message because you are subscribed to \"rtc-linux\".\n" + "Membership options at http://groups.google.com/group/rtc-linux .\n" + "Please read http://groups.google.com/group/rtc-linux/web/checklist\n" + "before submitting a driver.\n" + "---=20\n" + "You received this message because you are subscribed to the Google Groups \"=\n" + "rtc-linux\" group.\n" + "To unsubscribe from this group and stop receiving emails from it, send an e=\n" + "mail to rtc-linux+unsubscribe@googlegroups.com.\n" + For more options, visit https://groups.google.com/d/optout. -7f1e90ef39b83aa845c046eb6ffa4370da75f47a40d8c65a88965463f9a9974d +92bc7d1c2b1e70abca1ad760ebde2879b4537060c9d5eda34ba754b9dfa7feba
diff --git a/a/1.txt b/N2/1.txt index 81e9992..73d8266 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,10 +1,10 @@ On Wed, 01 Jul 2015, S Twiss wrote: -> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> +> From: S Twiss <stwiss.opensource@diasemi.com> > > Add MFD core driver support for DA9062 > -> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> +> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> > > --- > Changes in V5: @@ -606,7 +606,7 @@ Applied, thanks. > +module_i2c_driver(da9062_i2c_driver); > + > +MODULE_DESCRIPTION("Core device driver for Dialog DA9062"); -> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>"); +> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>"); > +MODULE_LICENSE("GPL"); > diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h > new file mode 100644 @@ -1786,5 +1786,5 @@ Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index ff8f283..ac11227 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,37 +1,36 @@ "ref\0cover.1435756293.git.stwiss.opensource@diasemi.com\0" "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource@diasemi.com\0" - "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org\0" - "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "From\0Lee Jones <lee.jones@linaro.org>\0" "Subject\0Re: [PATCH V5 1/2] mfd: da9062: DA9062 MFD core driver\0" "Date\0Tue, 7 Jul 2015 12:42:17 +0100\0" - "To\0S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\0" - "Cc\0LINUXKERNEL <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> - Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org> - DEVICETREE <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - David Dajun Chen <david.chen-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - LINUXINPUT <linux-input-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - LINUXWATCHDOG <linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Liam Girdwood <lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - RTCLINUX <rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Support Opensource <support.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - " Wim Van Sebroeck <wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org>\0" + "To\0S Twiss <stwiss.opensource@diasemi.com>\0" + "Cc\0LINUXKERNEL <linux-kernel@vger.kernel.org>" + Samuel Ortiz <sameo@linux.intel.com> + Alessandro Zummo <a.zummo@towertech.it> + DEVICETREE <devicetree@vger.kernel.org> + David Dajun Chen <david.chen@diasemi.com> + Dmitry Torokhov <dmitry.torokhov@gmail.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + LINUXINPUT <linux-input@vger.kernel.org> + LINUXWATCHDOG <linux-watchdog@vger.kernel.org> + Liam Girdwood <lgirdwood@gmail.com> + Mark Brown <broonie@kernel.org> + Mark Rutland <mark.rutland@arm.com> + Pawel Moll <pawel.moll@arm.com> + RTCLINUX <rtc-linux@googlegroups.com> + Rob Herring <robh+dt@kernel.org> + Support Opensource <support.opensource@diasemi.com> + " Wim Van Sebroeck <wim@iguana.be>\0" "\00:1\0" "b\0" "On Wed, 01 Jul 2015, S Twiss wrote:\n" "\n" - "> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" + "> From: S Twiss <stwiss.opensource@diasemi.com>\n" "> \n" "> Add MFD core driver support for DA9062\n" "> \n" - "> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" + "> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>\n" "> \n" "> ---\n" "> Changes in V5:\n" @@ -633,7 +632,7 @@ "> +module_i2c_driver(da9062_i2c_driver);\n" "> +\n" "> +MODULE_DESCRIPTION(\"Core device driver for Dialog DA9062\");\n" - "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\");\n" + "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource@diasemi.com>\");\n" "> +MODULE_LICENSE(\"GPL\");\n" "> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h\n" "> new file mode 100644\n" @@ -1813,7 +1812,7 @@ "Follow Linaro: Facebook | Twitter | Blog\n" "--\n" "To unsubscribe from this list: send the line \"unsubscribe linux-watchdog\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + "the body of a message to majordomo@vger.kernel.org\n" More majordomo info at http://vger.kernel.org/majordomo-info.html -7f1e90ef39b83aa845c046eb6ffa4370da75f47a40d8c65a88965463f9a9974d +ba86a256893dc2d03b81d60577fc253934e43f73128c804de9d52c2d582251be
diff --git a/a/1.txt b/N3/1.txt index 81e9992..d191a16 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,10 +1,10 @@ On Wed, 01 Jul 2015, S Twiss wrote: -> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> +> From: S Twiss <stwiss.opensource@diasemi.com> > > Add MFD core driver support for DA9062 > -> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> +> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> > > --- > Changes in V5: @@ -606,7 +606,7 @@ Applied, thanks. > +module_i2c_driver(da9062_i2c_driver); > + > +MODULE_DESCRIPTION("Core device driver for Dialog DA9062"); -> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>"); +> +MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>"); > +MODULE_LICENSE("GPL"); > diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h > new file mode 100644 @@ -1784,7 +1784,3 @@ Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog --- -To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N3/content_digest index ff8f283..7bdfeb9 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,37 +1,36 @@ "ref\0cover.1435756293.git.stwiss.opensource@diasemi.com\0" "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource@diasemi.com\0" - "ref\08ada7382e08b0fc2a444c1df7b5a5c1502580816.1435756293.git.stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org\0" - "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "From\0Lee Jones <lee.jones@linaro.org>\0" "Subject\0Re: [PATCH V5 1/2] mfd: da9062: DA9062 MFD core driver\0" "Date\0Tue, 7 Jul 2015 12:42:17 +0100\0" - "To\0S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\0" - "Cc\0LINUXKERNEL <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> - Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org> - DEVICETREE <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - David Dajun Chen <david.chen-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - LINUXINPUT <linux-input-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - LINUXWATCHDOG <linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - Liam Girdwood <lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - RTCLINUX <rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Support Opensource <support.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org> - " Wim Van Sebroeck <wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org>\0" + "To\0S Twiss <stwiss.opensource@diasemi.com>\0" + "Cc\0LINUXKERNEL <linux-kernel@vger.kernel.org>" + Samuel Ortiz <sameo@linux.intel.com> + Alessandro Zummo <a.zummo@towertech.it> + DEVICETREE <devicetree@vger.kernel.org> + David Dajun Chen <david.chen@diasemi.com> + Dmitry Torokhov <dmitry.torokhov@gmail.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + LINUXINPUT <linux-input@vger.kernel.org> + LINUXWATCHDOG <linux-watchdog@vger.kernel.org> + Liam Girdwood <lgirdwood@gmail.com> + Mark Brown <broonie@kernel.org> + Mark Rutland <mark.rutland@arm.com> + Pawel Moll <pawel.moll@arm.com> + RTCLINUX <rtc-linux@googlegroups.com> + Rob Herring <robh+dt@kernel.org> + Support Opensource <support.opensource@diasemi.com> + " Wim Van Sebroeck <wim@iguana.be>\0" "\00:1\0" "b\0" "On Wed, 01 Jul 2015, S Twiss wrote:\n" "\n" - "> From: S Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" + "> From: S Twiss <stwiss.opensource@diasemi.com>\n" "> \n" "> Add MFD core driver support for DA9062\n" "> \n" - "> Signed-off-by: Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\n" + "> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>\n" "> \n" "> ---\n" "> Changes in V5:\n" @@ -633,7 +632,7 @@ "> +module_i2c_driver(da9062_i2c_driver);\n" "> +\n" "> +MODULE_DESCRIPTION(\"Core device driver for Dialog DA9062\");\n" - "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource-WBD+wuPFNBhBDgjK7y7TUQ@public.gmane.org>\");\n" + "> +MODULE_AUTHOR(\"Steve Twiss <stwiss.opensource@diasemi.com>\");\n" "> +MODULE_LICENSE(\"GPL\");\n" "> diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h\n" "> new file mode 100644\n" @@ -1810,10 +1809,6 @@ "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" "Linaro.org \342\224\202 Open source software for ARM SoCs\n" - "Follow Linaro: Facebook | Twitter | Blog\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe linux-watchdog\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + Follow Linaro: Facebook | Twitter | Blog -7f1e90ef39b83aa845c046eb6ffa4370da75f47a40d8c65a88965463f9a9974d +971ef5488c77127854ebe6d86178dcab366b437a592ef228d44890f95216d087
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