From: Shengjiu Wang <shengjiu.wang@freescale.com>
To: Vinod Koul <vinod.koul@intel.com>
Cc: <dan.j.williams@intel.com>, <dmaengine@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] dmaengine: imx-sdma: Add device to device support
Date: Fri, 10 Jul 2015 15:58:38 +0800 [thread overview]
Message-ID: <20150710075836.GB14762@shlinux2> (raw)
In-Reply-To: <20150710075807.GB836@localhost>
On Fri, Jul 10, 2015 at 01:28:07PM +0530, Vinod Koul wrote:
> On Tue, Jul 07, 2015 at 05:20:04PM +0800, Shengjiu Wang wrote:
>
> > +/*
> > + * p_2_p watermark_level description
> > + * Bits Name Description
> > + * 0-7 Lower WML Lower watermark level
> > + * 8 PS 1: Pad Swallowing
> > + * 0: No Pad Swallowing
> > + * 9 PA 1: Pad Adding
> > + * 0: No Pad Adding
> > + * 10 SPDIF If this bit is set both source
> > + * and destination are on SPBA
> > + * 11 Source Bit(SP) 1: Source on SPBA
> > + * 0: Source on AIPS
> > + * 12 Destination Bit(DP) 1: Destination on SPBA
> > + * 0: Destination on AIPS
> > + * 13-15 --------- MUST BE 0
> > + * 16-23 Higher WML HWML
> > + * 24-27 N Total number of samples after
> > + * which Pad adding/Swallowing
> > + * must be done. It must be odd.
> > + * 28 Lower WML Event(LWE) SDMA events reg to check for
> > + * LWML event mask
> > + * 0: LWE in EVENTS register
> > + * 1: LWE in EVENTS2 register
> > + * 29 Higher WML Event(HWE) SDMA events reg to check for
> > + * HWML event mask
> > + * 0: HWE in EVENTS register
> > + * 1: HWE in EVENTS2 register
> > + * 30 --------- MUST BE 0
> > + * 31 CONT 1: Amount of samples to be
> > + * transferred is unknown and
> > + * script will keep on
> > + * transferring samples as long as
> > + * both events are detected and
> > + * script must be manually stopped
> > + * by the application
> > + * 0: The amount of samples to be
> > + * transferred is equal to the
> > + * count field of mode word
> > + */
> > +static void sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac)
> > +{
> > + struct sdma_engine *sdma = sdmac->sdma;
> > +
> > + int lwml = sdmac->watermark_level & 0xff;
> > + int hwml = (sdmac->watermark_level >> 16) & 0xff;
> > +
> > + __set_bit(sdmac->event_id0 % 32, &sdmac->event_mask[1]);
> > + __set_bit(sdmac->event_id1 % 32, &sdmac->event_mask[0]);
> > +
> > + if (sdmac->event_id0 > 31)
> > + __set_bit(28, &sdmac->watermark_level);
> > +
> > + if (sdmac->event_id1 > 31)
> > + __set_bit(29, &sdmac->watermark_level);
> > +
> > + /*
> > + * If LWML(src_maxburst) > HWML(dst_maxburst), we need
> > + * swap LWML and HWML of INFO(A.3.2.5.1), also need swap
> > + * r0(event_mask[1]) and r1(event_mask[0]).
> > + */
> > + if (lwml > hwml) {
> > + sdmac->watermark_level &= ~0xff00ff;
> > + sdmac->watermark_level |= hwml;
> > + sdmac->watermark_level |= lwml << 16;
> > + swap(sdmac->event_mask[0], sdmac->event_mask[1]);
> so typical practice is to define macros for these. For example above can be
> defined as
> #define SDMA_WATERMARK_LWML BIT(X)
> #define SDMA_WATERMARK_PA BIT(Y)
>
> Then here you can say
> sdmac->watermark_level &= SDMA_WATERMARK_PA | ....
>
> That way it is easier to read, review and maintain
>
>
> > + }
> > +
> > + if (sdmac->per_address2 >= sdma->spba_start_addr &&
> > + sdmac->per_address2 <= sdma->spba_end_addr)
> > + __set_bit(11, &sdmac->watermark_level);
> > +
> > + if (sdmac->per_address >= sdma->spba_start_addr &&
> > + sdmac->per_address <= sdma->spba_end_addr)
> > + __set_bit(12, &sdmac->watermark_level);
> > +
> > + __set_bit(31, &sdmac->watermark_level);
> All these and few more below will look much better by have defines above
>
> > @@ -1221,6 +1311,14 @@ static int sdma_config(struct dma_chan *chan,
> > sdmac->watermark_level = dmaengine_cfg->src_maxburst *
> > dmaengine_cfg->src_addr_width;
> > sdmac->word_size = dmaengine_cfg->src_addr_width;
> > + } else if (dmaengine_cfg->direction == DMA_DEV_TO_DEV) {
> > + sdmac->per_address2 = dmaengine_cfg->src_addr;
> > + sdmac->per_address = dmaengine_cfg->dst_addr;
> > + sdmac->watermark_level =
> > + dmaengine_cfg->src_maxburst & 0xff;
> > + sdmac->watermark_level |=
> > + (dmaengine_cfg->dst_maxburst & 0xff) << 16;
> > + sdmac->word_size = dmaengine_cfg->dst_addr_width;
> Please fix this as well
>
I will refine this patch and send V3 for review. Thanks
best regards
wang shengjiu
> --
> ~Vinod
next prev parent reply other threads:[~2015-07-10 9:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-07 9:20 [PATCH V2] dmaengine: imx-sdma: Add device to device support Shengjiu Wang
2015-07-10 7:58 ` Vinod Koul
2015-07-10 7:58 ` Shengjiu Wang [this message]
2015-07-17 6:07 ` Shengjiu Wang
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