From: Andi Kleen <ak@linux.intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Andi Kleen <andi@firstfloor.org>,
Peter Zijlstra <peterz@infradead.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake
Date: Fri, 17 Jul 2015 16:31:00 -0700 [thread overview]
Message-ID: <20150717233100.GN7380@tassilo.jf.intel.com> (raw)
In-Reply-To: <CABPqkBQH4bO6DpVfTQc3bR7vxpdr=kQoPT6VvzdMa+jqMRrLNg@mail.gmail.com>
On Fri, Jul 17, 2015 at 03:00:18PM -0700, Stephane Eranian wrote:
> Andi,
>
> On Fri, Jul 17, 2015 at 2:19 PM, Andi Kleen <ak@linux.intel.com> wrote:
> >> But then, the SDM is misleading. It is not describing what's
> >> implemented for SKL.
> >
> > Actually it has a list of valid values you can put into the various fields.
> > None of them have the bits set you're trying to set.
> >
> You are talking about the events (bit 0-7). I am talking about the bubble
> thresholds. I am okay with the event list for bits 0-7.
Fair enough. There's a one-off in the MSR table and table 18-54. The IDQ
bubble width is only 21:20. I'll ask for that to be fixed in both places
that document them.
Thanks.
-Andi
next prev parent reply other threads:[~2015-07-17 23:31 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-29 21:22 [PATCH 1/3] x86, perf: Make merge_attr global to use from perf_event_intel Andi Kleen
2015-06-29 21:22 ` [PATCH 2/3] x86, perf: Support custom test values for extra_regs Andi Kleen
2015-06-30 11:19 ` Peter Zijlstra
2015-06-30 15:44 ` Andi Kleen
2015-06-29 21:22 ` [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake Andi Kleen
2015-07-17 19:47 ` Stephane Eranian
2015-07-17 20:09 ` Andi Kleen
2015-07-17 20:11 ` Thomas Gleixner
2015-07-17 20:33 ` Andi Kleen
2015-07-17 21:01 ` Stephane Eranian
2015-07-17 21:19 ` Andi Kleen
2015-07-17 22:00 ` Stephane Eranian
2015-07-17 23:31 ` Andi Kleen [this message]
2015-07-17 23:52 ` Stephane Eranian
2015-07-18 14:23 ` Andi Kleen
2015-07-17 22:16 ` Thomas Gleixner
2015-07-17 20:41 ` Stephane Eranian
2015-07-17 20:52 ` Andi Kleen
2015-07-17 21:05 ` Peter Zijlstra
2015-07-17 21:18 ` Andi Kleen
2015-07-17 22:23 ` Thomas Gleixner
2015-08-04 9:00 ` [tip:perf/core] perf/x86: Make merge_attr() global to use from perf_event_intel tip-bot for Andi Kleen
-- strict thread matches above, loose matches on Subject: below --
2015-06-30 23:33 Updated Skylake Frontend profiling patchkit Andi Kleen
2015-06-30 23:33 ` [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake Andi Kleen
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