From: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
To: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] kprobes: Mark OPTPROBES n/a for powerpc
Date: Mon, 20 Jul 2015 16:08:59 +0530 [thread overview]
Message-ID: <20150720103859.GH2196@in.ibm.com> (raw)
In-Reply-To: <55AB09BE.5040506@hitachi.com>
On Sun, Jul 19, 2015 at 11:21:50AM +0900, Masami Hiramatsu wrote:
> On 2015/07/16 19:56, Ananth N Mavinakayanahalli wrote:
> > Kprobes uses a breakpoint instruction to trap into execution flow
> > and the probed instruction is single-stepped from an alternate location.
> >
> > On some architectures like x86, under certain conditions, the OPTPROBES
> > feature enables replacing the probed instruction with a jump instead,
> > resulting in a significant perfomance boost (one single-step exception
> > is bypassed for each kprobe).
>
> The OPTPROBE is not only for bypassing the single-step exception, but also
> the breakpoint exception.
> Please see commit 0dc016dbd820260b (ARM: kprobes: enable OPTPROBES for ARM 32) too,
> which shows how it is done on RISC processor.
Yes, will fix and send.
> > Powerpc has an in-kernel instruction emulator. Kprobes on powerpc uses
> > this emulator already and bypasses the single-step exception, with a
> > lot less complexity.
>
> So, this might miss the point. Since it is impossible to do on some RISC
> processor, I agree with this change, but it should be committed with
> correct comments.
Sure, thanks!
Ananth
next prev parent reply other threads:[~2015-07-20 10:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-16 10:56 [PATCH] kprobes: Mark OPTPROBES n/a for powerpc Ananth N Mavinakayanahalli
2015-07-19 2:21 ` Masami Hiramatsu
2015-07-20 10:38 ` Ananth N Mavinakayanahalli [this message]
2015-07-21 2:53 ` Michael Ellerman
2015-07-21 4:34 ` Ananth N Mavinakayanahalli
2015-07-21 10:26 ` Masami Hiramatsu
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