From: Dan Carpenter <dan.carpenter@oracle.com>
To: Chanwoo Choi <cw00.choi@samsung.com>
Cc: myungjoo.ham@samsung.com, kyungmin.park@samsung.com,
kgene@kernel.org, k.kozlowski@samsung.com,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] PM / devfreq: exynos-ppmu: Add the support of PPMUv2 for Exynos5433
Date: Thu, 23 Jul 2015 12:43:24 +0300 [thread overview]
Message-ID: <20150723094324.GP5422@mwanda> (raw)
In-Reply-To: <1437616639-7448-2-git-send-email-cw00.choi@samsung.com>
On Thu, Jul 23, 2015 at 10:57:18AM +0900, Chanwoo Choi wrote:
> +static int exynos_ppmu_v2_disable(struct devfreq_event_dev *edev)
> +{
> + struct exynos_ppmu *info = devfreq_event_get_drvdata(edev);
> + u32 pmnc, clear;
> +
> + /* Disable all counters */
> + clear = (PPMU_CCNT_MASK | PPMU_PMCNT0_MASK | PPMU_PMCNT1_MASK
> + | PPMU_PMCNT2_MASK | PPMU_PMCNT3_MASK);
> +
> + __raw_writel(clear, info->ppmu.base + PPMUv2_FLAG);
Why aren't you using normal readl()/writel()? What are the endiannesses
here?
regards,
dan carpenter
next prev parent reply other threads:[~2015-07-23 9:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-23 1:57 [PATCH 0/2] PM / devfreq: exynos-ppmu: Add the support of PPMUv2 Chanwoo Choi
2015-07-23 1:57 ` [PATCH 1/2] PM / devfreq: exynos-ppmu: Add the support of PPMUv2 for Exynos5433 Chanwoo Choi
2015-07-23 7:28 ` Krzysztof Kozlowski
2015-07-23 8:14 ` Chanwoo Choi
2015-07-23 14:03 ` Chanwoo Choi
2015-07-23 9:43 ` Dan Carpenter [this message]
2015-07-23 14:17 ` Chanwoo Choi
2015-07-23 1:57 ` [PATCH 2/2] PM / devfreq: exynos-ppmu: Update documentation to support PPMUv2 Chanwoo Choi
2015-07-23 7:37 ` Krzysztof Kozlowski
2015-07-23 7:48 ` Chanwoo Choi
2015-07-23 7:58 ` Krzysztof Kozlowski
2015-07-23 8:02 ` Chanwoo Choi
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