Re: [Qemu-devel] [PATCH for 2.4 2/3] net/dp8393x: specify memory operations for PROM PROM

[Aurelien Jarno <aurelien@aurel32.net>]

On 2015-07-26 22:35, Hervé Poussineau wrote:
> >How does it crashes in that case? I would have guess that write access
> >to ROM are ignored by default. Looking at other code, it seems they call
> >memory_region_set_readonly() instead of providing an accepts function.
> >Maybe readonly should be the default for a rom device?
> 
> The stack trace is:
> 0x000055555563a758 in memory_region_access_valid (mr=mr@entry=0x55555adb0d50, addr=addr@entry=0, size=size@entry=1, is_write=is_write@entry=true) at memory.c:1075
> 1075	    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
> (gdb) bt
> #0  0x000055555563a758 in memory_region_access_valid (mr=mr@entry=0x55555adb0d50, addr=addr@entry=0, size=size@entry=1, is_write=is_write@entry=true) at memory.c:1075
> #1  0x000055555563a968 in memory_region_dispatch_write (mr=0x55555adb0d50, addr=0, data=82, size=1, attrs=...) at memory.c:1155
> #2  0x00007fffe6516f35 in code_gen_buffer ()
> #3  0x000055555560e4f3 in cpu_tb_exec (tb_ptr=0x7fffe6516ec0 <code_gen_buffer+8625856> "A\213n\374\205\355\017\205\220", cpu=0x55555703f1c0) at cpu-exec.c:200
> #4  cpu_mips_exec (cpu=cpu@entry=0x55555703f1c0) at cpu-exec.c:518
> #5  0x000055555562aec6 in tcg_cpu_exec (cpu=0x55555703f1c0) at cpus.c:1402
> #6  tcg_exec_all () at cpus.c:1434
> #7  qemu_tcg_cpu_thread_fn (arg=<optimized out>) at cpus.c:1068
> #8  0x00007ffff1dbd0a4 in start_thread (arg=0x7fffdf8f8700) at pthread_create.c:309
> #9  0x00007ffff1af204d in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
> 
> With mr being the dp8393x prom.
> 
> 
> I tested with memory_region_set_readonly() and a NULL operations, and the stack trace is the same.
> Only pflash devices use memory_region_init_rom_device. Other devices use memory_region_init_ram + memory_region_set_readonly, which work.
> Do you prefer the attached patch?
> 

I have to say I am not sure what is the best, I don't know this part of
the code enough. I have added Paolo in Cc:, I guess he might have an
idea about that.

Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net