From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 28 Jul 2015 11:51:34 +0200 (CEST) Received: from localhost.localdomain ([127.0.0.1]:34345 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S27010509AbbG1JvcSYAcL (ORCPT ); Tue, 28 Jul 2015 11:51:32 +0200 Received: from scotty.linux-mips.net (localhost.localdomain [127.0.0.1]) by scotty.linux-mips.net (8.15.1/8.14.8) with ESMTP id t6S9pUgJ023907; Tue, 28 Jul 2015 11:51:30 +0200 Received: (from ralf@localhost) by scotty.linux-mips.net (8.15.1/8.15.1/Submit) id t6S9pSAr023906; Tue, 28 Jul 2015 11:51:28 +0200 Date: Tue, 28 Jul 2015 11:51:28 +0200 From: Ralf Baechle To: Daniel Lezcano Cc: Govindraj Raja , linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Daniel Lezcano , devicetree@vger.kernel.org, Thomas Gleixner , Andrew Bresticker , James Hartley , Damien Horsley , James Hogan , Ezequiel Garcia , Ezequiel Garcia Subject: Re: [PATCH v4 0/7] Clocksource changes for Pistachio CPUFreq. Message-ID: <20150728095128.GA23771@linux-mips.org> References: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> User-Agent: Mutt/1.5.23 (2014-03-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 48481 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Daniel, On Mon, Jul 27, 2015 at 03:00:11PM +0100, Govindraj Raja wrote: > From: Ezequiel Garcia > > The purpose of this patchset is to support CPUFreq on Pistachio SoC. > However, given Pistachio uses the MIPS GIC clocksource and clockevent drivers > (clocked from the CPU), adding CPUFreq support needs some work. > > This patchset changes the MIPS GIC clockevent driver to update the frequency of > the per-cpu clockevents using a clock notifier. > > Then, we add a clocksource driver for IMG Pistachio SoC, based on the > general purpose timers. The SoC only provides four timers, so we can't > use them to implement the four clockevents and the clocksource. > > However, we can use one of these timers to provide a clocksource and a > sched clock. Given the general purpose timers are clocked from the peripheral > system clock tree, they are not affected by CPU rate changes. > > Patches 1 to 3 are just style cleaning and preparation work. > Patch 4 adds the clockevent frequency update. > Patches 5 and 6 add the new clocksource driver. > Patch 7 introduces an option to enable the timer based clocksource on Pistachio. if you're happy with this series feel free to add my ack to patch 7/7 which is the only one that touches arch/mips. Alternatively I can carry this in the MIPS tree which would have tbe benefit of better testing. Ralf From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from localhost.localdomain ([127.0.0.1]:34345 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S27010509AbbG1JvcSYAcL (ORCPT ); Tue, 28 Jul 2015 11:51:32 +0200 Date: Tue, 28 Jul 2015 11:51:28 +0200 From: Ralf Baechle Subject: Re: [PATCH v4 0/7] Clocksource changes for Pistachio CPUFreq. Message-ID: <20150728095128.GA23771@linux-mips.org> References: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Daniel Lezcano Cc: Govindraj Raja , linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, devicetree@vger.kernel.org, Thomas Gleixner , Andrew Bresticker , James Hartley , Damien Horsley , James Hogan , Ezequiel Garcia , Ezequiel Garcia Message-ID: <20150728095128.kJpZ-F56cXjWkFQvNE9VEYqNZeMQg56S0EEncAOxh2g@z> Daniel, On Mon, Jul 27, 2015 at 03:00:11PM +0100, Govindraj Raja wrote: > From: Ezequiel Garcia > > The purpose of this patchset is to support CPUFreq on Pistachio SoC. > However, given Pistachio uses the MIPS GIC clocksource and clockevent drivers > (clocked from the CPU), adding CPUFreq support needs some work. > > This patchset changes the MIPS GIC clockevent driver to update the frequency of > the per-cpu clockevents using a clock notifier. > > Then, we add a clocksource driver for IMG Pistachio SoC, based on the > general purpose timers. The SoC only provides four timers, so we can't > use them to implement the four clockevents and the clocksource. > > However, we can use one of these timers to provide a clocksource and a > sched clock. Given the general purpose timers are clocked from the peripheral > system clock tree, they are not affected by CPU rate changes. > > Patches 1 to 3 are just style cleaning and preparation work. > Patch 4 adds the clockevent frequency update. > Patches 5 and 6 add the new clocksource driver. > Patch 7 introduces an option to enable the timer based clocksource on Pistachio. if you're happy with this series feel free to add my ack to patch 7/7 which is the only one that touches arch/mips. Alternatively I can carry this in the MIPS tree which would have tbe benefit of better testing. Ralf From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ralf Baechle Subject: Re: [PATCH v4 0/7] Clocksource changes for Pistachio CPUFreq. Date: Tue, 28 Jul 2015 11:51:28 +0200 Message-ID: <20150728095128.GA23771@linux-mips.org> References: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from localhost.localdomain ([127.0.0.1]:34348 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S27010972AbbG1JvdAqy4L (ORCPT + 1 other); Tue, 28 Jul 2015 11:51:33 +0200 Content-Disposition: inline In-Reply-To: <1438005618-27003-1-git-send-email-govindraj.raja@imgtec.com> Sender: linux-kernel-owner@vger.kernel.org Cc: Govindraj Raja , linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Daniel Lezcano , devicetree@vger.kernel.org, Thomas Gleixner , Andrew Bresticker , James Hartley , Damien Horsley , James Hogan , Ezequiel Garcia , Ezequiel Garcia List-Id: devicetree@vger.kernel.org Daniel, On Mon, Jul 27, 2015 at 03:00:11PM +0100, Govindraj Raja wrote: > From: Ezequiel Garcia > > The purpose of this patchset is to support CPUFreq on Pistachio SoC. > However, given Pistachio uses the MIPS GIC clocksource and clockevent drivers > (clocked from the CPU), adding CPUFreq support needs some work. > > This patchset changes the MIPS GIC clockevent driver to update the frequency of > the per-cpu clockevents using a clock notifier. > > Then, we add a clocksource driver for IMG Pistachio SoC, based on the > general purpose timers. The SoC only provides four timers, so we can't > use them to implement the four clockevents and the clocksource. > > However, we can use one of these timers to provide a clocksource and a > sched clock. Given the general purpose timers are clocked from the peripheral > system clock tree, they are not affected by CPU rate changes. > > Patches 1 to 3 are just style cleaning and preparation work. > Patch 4 adds the clockevent frequency update. > Patches 5 and 6 add the new clocksource driver. > Patch 7 introduces an option to enable the timer based clocksource on Pistachio. if you're happy with this series feel free to add my ack to patch 7/7 which is the only one that touches arch/mips. Alternatively I can carry this in the MIPS tree which would have tbe benefit of better testing. Ralf