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From: Wolfram Sang <wsa@the-dreams.de>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: swarren@wwwdotorg.org, thierry.reding@gmail.com,
	andrewc@nvidia.com, gnurou@gmail.com, linux-i2c@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	Chaitanya Bandi <bandik@nvidia.com>
Subject: Re: [RFT PATCH 1/2] i2c: tegra: update CONFIG_LOAD for new conifiguration
Date: Fri, 31 Jul 2015 12:42:59 +0200	[thread overview]
Message-ID: <20150731104259.GD1522@katana> (raw)
In-Reply-To: <1435661667-11554-1-git-send-email-ldewangan@nvidia.com>

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On Tue, Jun 30, 2015 at 04:24:26PM +0530, Laxman Dewangan wrote:
> Once the new configuration is set on the conifg register of
> I2C controller, it is require to update the CONFIG_LOAD register
> to transfer the new SW configuration to actual HW internal
> registers that would be used in the actual logic.
> 
> It is like, SW is programming only shadow registers through
> regular configuration and when these load_config bit fields
> are set to 1, it causes the regular/shadows registers
> configuration transferred to the HW internal active registers.
> So SW has to set these bit fields at the end of all regular
> registers configuration. And these config_load bits are HW
> auto-clear bits. HW clears these bit fields once the register
> configuration is moved to HW internal active registers. So SW
> has to wait until these bits are auto-cleared before going
> for any further programming
> 
> This mechanism is supported on T124 and after this SoCs.
> 
> This is based on change done by
> 	Chaitanya Bandi <bandik@nvidia.com>
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>

Applied to for-next, thanks!


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      parent reply	other threads:[~2015-07-31 10:42 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-30 10:54 [RFT PATCH 1/2] i2c: tegra: update CONFIG_LOAD for new conifiguration Laxman Dewangan
2015-06-30 10:54 ` Laxman Dewangan
     [not found] ` <1435661667-11554-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-06-30 10:54   ` [RFT PATCH 2/2] i2c: tegra: add support for fast plus (FM+) mode clock rate Laxman Dewangan
2015-06-30 10:54     ` Laxman Dewangan
2015-07-31 10:43     ` Wolfram Sang
2015-07-08 20:36   ` [RFT PATCH 1/2] i2c: tegra: update CONFIG_LOAD for new conifiguration Stephen Warren
2015-07-08 20:36     ` Stephen Warren
     [not found]     ` <559D89D8.50500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-07-09  5:40       ` Laxman Dewangan
2015-07-09  5:40         ` Laxman Dewangan
2015-07-16 10:16       ` Laxman Dewangan
2015-07-16 10:16         ` Laxman Dewangan
2015-07-31 10:42 ` Wolfram Sang [this message]

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