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From: Richard Cochran <richardcochran@gmail.com>
To: Christopher Hall <christopher.s.hall@intel.com>
Cc: john.stultz@linaro.org, tglx@linutronix.de, mingo@redhat.com,
	jeffrey.t.kirsher@intel.com, john.ronciak@intel.com,
	hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org
Subject: Re: [PATCH v2 4/4] Added getsynctime64() callback
Date: Mon, 10 Aug 2015 10:49:49 +0200	[thread overview]
Message-ID: <20150810084949.GA18566@localhost.localdomain> (raw)
In-Reply-To: <1438988495-9942-5-git-send-email-christopher.s.hall@intel.com>

On Fri, Aug 07, 2015 at 04:01:35PM -0700, Christopher Hall wrote:
> --- a/drivers/net/ethernet/intel/e1000e/defines.h
> +++ b/drivers/net/ethernet/intel/e1000e/defines.h
> @@ -527,6 +527,13 @@
>  #define E1000_RXCW_C          0x20000000        /* Receive config */
>  #define E1000_RXCW_SYNCH      0x40000000        /* Receive config synch */
>  
> +/* HH Time Sync */
> +#define E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK   0x0000F000      /* max delay */
> +#define E1000_TSYNCTXCTL_SYNC_COMP              0x40000000      /* sync complete
> + */
> +#define E1000_TSYNCTXCTL_START_SYNC             0x80000000      /* initiate sync
> + */

Split comment looks bad.  Trim this leading space instead.   ^^^^^^

> @@ -98,6 +100,91 @@ static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
>  	return 0;
>  }
>  
> +#define HW_WAIT_COUNT (2)
> +#define HW_RETRY_COUNT (2)

A busy wait, plus a retry, ...

> +#define SYNCTIME_RETRY_COUNT (2)

plus another retry!

Seems a bit heavy handed to me.  Is the HW really that flakey?

I would expect that a reasonably long polling loop should be
sufficient.  If not, then the HW ignores certain requests, and that is
worth a comment.

In any case, I don't understand why you have two nested retry loops.

> +static int e1000e_phc_getsynctime(struct ptp_clock_info *ptp,
> +				  struct timespec64 *devts,
> +				  struct timespec64 *systs)
> +{
> +	struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
> +						     ptp_clock_info);
> +	unsigned long flags;
> +	u32 remainder;
> +	struct correlated_ts art_correlated_ts;
> +	u64 device_time;
> +	int i, ret;
> +
> +	if (!cpu_has_art)
> +		return -EOPNOTSUPP;

Perform this check before registration, setting .getsynctime64
accordingly.

Thanks,
Richard

  reply	other threads:[~2015-08-10  8:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-07 23:01 [PATCH v2 0/4] Patchset enabling hardware based cross-timestamps for next gen Intel platforms Christopher Hall
2015-08-07 23:01 ` [PATCH v2 1/4] Add generic correlated clocksource code and ART to TSC conversion code Christopher Hall
2015-08-07 23:44   ` Andy Lutomirski
2015-08-07 23:01 ` [PATCH v2 2/4] Add ART initialization code Christopher Hall
2015-08-07 23:01 ` [PATCH v2 3/4] Add support for driver cross-timestamp to PTP_SYS_OFFSET ioctl Christopher Hall
2015-08-10  8:53   ` Richard Cochran
2015-08-07 23:01 ` [PATCH v2 4/4] Added getsynctime64() callback Christopher Hall
2015-08-10  8:49   ` Richard Cochran [this message]
2015-08-13 21:10     ` Hall, Christopher S
2015-08-14  6:32       ` Richard Cochran

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