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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 10/11] drm/i915: DVO pixel clock check
Date: Wed, 12 Aug 2015 21:41:00 +0300	[thread overview]
Message-ID: <20150812184100.GI5176@intel.com> (raw)
In-Reply-To: <1438344840-3490-11-git-send-email-mika.kahola@intel.com>

On Fri, Jul 31, 2015 at 03:13:59PM +0300, Mika Kahola wrote:
> It is possible the we request to have a mode that has
> higher pixel clock than our HW can support. This patch
> checks if requested pixel clock is lower than the one
> supported by the HW. The requested mode is discarded
> if we cannot support the requested pixel clock.
> 
> This patch applies to DVO.
> 
> V2:
> - removed computation for max pixel clock
> 
> V3:
> - cleanup by removing unnecessary lines
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dvo.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
> index fd5e522..2bfc51c 100644
> --- a/drivers/gpu/drm/i915/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/intel_dvo.c
> @@ -247,6 +247,7 @@ intel_dvo_mode_valid(struct drm_connector *connector,
>  		     struct drm_display_mode *mode)
>  {
>  	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
> +	int max_pixclk = to_i915(connector->dev)->max_dotclk;
>  
>  	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
>  		return MODE_NO_DBLESCAN;
> @@ -260,6 +261,9 @@ intel_dvo_mode_valid(struct drm_connector *connector,
>  			return MODE_PANEL;
>  	}
>  
> +	if (mode->clock > max_pixclk)
> +		return MODE_CLOCK_HIGH;

I think we'd need to check against the fixed_mode like you did for DP,
when it's present that is.

> +
>  	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
>  }
>  
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-08-12 18:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-31 12:13 [PATCH v3 00/11] Check pixel clock when setting mode Mika Kahola
2015-07-31 12:13 ` [PATCH v3 01/11] drm/i915: Store max dotclock Mika Kahola
2015-08-12 17:30   ` Ville Syrjälä
2015-08-12 19:01     ` Ville Syrjälä
2015-08-13  8:21       ` Mika Kahola
2015-07-31 12:13 ` [PATCH v3 02/11] drm/i915: DisplayPort pixel clock check Mika Kahola
2015-08-12 18:50   ` Ville Syrjälä
2015-07-31 12:13 ` [PATCH v3 03/11] drm/i915: HDMI " Mika Kahola
2015-08-12 18:34   ` Ville Syrjälä
2015-08-14  8:30     ` Daniel Vetter
2015-08-14 13:03       ` Ville Syrjälä
2015-08-14 13:11         ` Daniel Vetter
2015-07-31 12:13 ` [PATCH v3 04/11] drm/i915: LVDS " Mika Kahola
2015-08-12 17:40   ` Ville Syrjälä
2015-07-31 12:13 ` [PATCH v3 05/11] drm/i915: SDVO " Mika Kahola
2015-08-12 17:46   ` Ville Syrjälä
2015-07-31 12:13 ` [PATCH v3 06/11] drm/i915: DSI " Mika Kahola
2015-08-12 18:15   ` Ville Syrjälä
2015-07-31 12:13 ` [PATCH v3 07/11] drm/i915: CRT " Mika Kahola
2015-08-12 18:59   ` Ville Syrjälä
2015-07-31 12:13 ` [PATCH v3 08/11] drm/i915: TV " Mika Kahola
2015-08-12 18:24   ` Ville Syrjälä
2015-08-14  8:33     ` Daniel Vetter
2015-07-31 12:13 ` [PATCH v3 09/11] drm/i915: DisplayPort-MST " Mika Kahola
2015-08-12 18:49   ` Ville Syrjälä
2015-08-14  8:36     ` Daniel Vetter
2015-07-31 12:13 ` [PATCH v3 10/11] drm/i915: DVO " Mika Kahola
2015-08-12 18:41   ` Ville Syrjälä [this message]
2015-07-31 12:14 ` [PATCH v3 11/11] drm/i915: Max DOT clock frequency to debugfs Mika Kahola
2015-08-10 13:25   ` shuang.he

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