From: Marcelo Tosatti <mtosatti@redhat.com>
To: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>,
Tejun Heo <tj@kernel.org>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
linux-kernel@vger.kernel.org, x86@kernel.org, hpa@zytor.com,
tglx@linutronix.de, mingo@kernel.org, peterz@infradead.org,
matt.fleming@intel.com, will.auld@intel.com,
glenn.p.williamson@intel.com, kanaka.d.juvva@intel.com,
Karen Noel <knoel@redhat.com>
Subject: Re: [PATCH 5/9] x86/intel_rdt: Add new cgroup and Class of service management
Date: Mon, 17 Aug 2015 21:20:50 -0300 [thread overview]
Message-ID: <20150818002050.GA3744@amt.cnet> (raw)
In-Reply-To: <20150807131506.GA6649@amt.cnet>
Vikas, Tejun,
This is an updated interface. It addresses all comments made
so far and also covers all use-cases the cgroup interface
covers.
Let me know what you think. I'll proceed to writing
the test applications.
Usage model:
------------
This document details how CAT technology is
exposed to userspace.
Each task has a list of task cache reservation entries (TCRE list).
The init process is created with empty TCRE list.
There is a system-wide unique ID space, each TCRE is assigned
an ID from this space. ID's can be reused (but no two TCREs
have the same ID at one time).
The interface accomodates transient and independent cache allocation
adjustments from applications, as well as static cache partitioning
schemes.
Allocation:
Usage of the system calls require CAP_SYS_CACHE_RESERVATION capability.
A configurable percentage is reserved to tasks with empty TCRE list.
On fork, the child inherits the TCR from its parent.
Semantics:
Once a TCRE is created and assigned to a task, that task has
guaranteed reservation on any CPU where its scheduled in,
for the lifetime of the TCRE.
A task can have its TCR list modified without notification.
FIXME: Add a per-task flag to not copy the TCR list of a task but delete
all TCR's on fork.
Interface:
enum cache_rsvt_flags {
CACHE_RSVT_ROUND_DOWN = (1 << 0), /* round "kbytes" down */
};
enum cache_rsvt_type {
CACHE_RSVT_TYPE_CODE = 0, /* cache reservation is for code */
CACHE_RSVT_TYPE_DATA, /* cache reservation is for data */
CACHE_RSVT_TYPE_BOTH, /* cache reservation is for code and data */
};
struct cache_reservation {
unsigned long kbytes;
int type;
int flags;
int trcid;
};
The following syscalls modify the TCR of a task:
* int sys_create_cache_reservation(struct cache_reservation *rsvt);
DESCRIPTION: Creates a cache reservation entry, and assigns
it to the current task.
returns -ENOMEM if not enough space, -EPERM if no permission.
returns 0 if reservation has been successful, copying actual
number of kbytes reserved to "kbytes", type to type, and tcrid.
* int sys_delete_cache_reservation(struct cache_reservation *rsvt);
DESCRIPTION: Deletes a cache reservation entry, deassigning it
from any task.
Backward compatibility for processors with no support for code/data
differentiation: by default code and data cache allocation types
fallback to CACHE_RSVT_TYPE_BOTH on older processors (and return the
information that they done so via "flags").
* int sys_attach_cache_reservation(pid_t pid, unsigned int tcrid);
DESCRIPTION: Attaches cache reservation identified by "tcrid" to
task by identified by pid.
returns 0 if successful.
* int sys_detach_cache_reservation(pid_t pid, unsigned int tcrid);
DESCRIPTION: Detaches cache reservation identified by "tcrid" to
task by identified pid.
The following syscalls list the TCRs:
* int sys_get_cache_reservations(size_t size, struct cache_reservation list[]);
DESCRIPTION: Return all cache reservations in the system.
Size should be set to the maximum number of items that can be stored
in the buffer pointed to by list.
* int sys_get_tcrid_tasks(unsigned int tcrid, size_t size, pid_t list[]);
DESCRIPTION: Return which pids are associated to tcrid.
* sys_get_pid_cache_reservations(pid_t pid, size_t size,
struct cache_reservation list[]);
DESCRIPTION: Return all cache reservations associated with "pid".
Size should be set to the maximum number of items that can be stored
in the buffer pointed to by list.
* sys_get_cache_reservation_info()
DESCRIPTION: ioctl to retrieve hardware info: cache round size, whether
code/data separation is supported.
next prev parent reply other threads:[~2015-08-18 0:22 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-01 22:21 [PATCH V12 0/9] Hot cpu handling changes to cqm, rapl and Intel Cache Allocation support Vikas Shivappa
2015-07-01 22:21 ` [PATCH 1/9] x86/intel_cqm: Modify hot cpu notification handling Vikas Shivappa
2015-07-29 16:44 ` Peter Zijlstra
2015-07-31 23:19 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 2/9] x86/intel_rapl: Modify hot cpu notification handling for RAPL Vikas Shivappa
2015-07-01 22:21 ` [PATCH 3/9] x86/intel_rdt: Cache Allocation documentation and cgroup usage guide Vikas Shivappa
2015-07-28 14:54 ` Peter Zijlstra
2015-08-04 20:41 ` Vikas Shivappa
2015-07-28 23:15 ` Marcelo Tosatti
2015-07-29 0:06 ` Vikas Shivappa
2015-07-29 1:28 ` Auld, Will
2015-07-29 19:32 ` Marcelo Tosatti
2015-07-30 17:47 ` Vikas Shivappa
2015-07-30 20:08 ` Marcelo Tosatti
2015-07-31 15:34 ` Marcelo Tosatti
2015-08-02 15:48 ` Martin Kletzander
2015-08-03 15:13 ` Marcelo Tosatti
2015-08-03 18:22 ` Vikas Shivappa
2015-07-30 20:22 ` Marcelo Tosatti
2015-07-30 23:03 ` Vikas Shivappa
2015-07-31 14:45 ` Marcelo Tosatti
2015-07-31 16:41 ` [summary] " Vikas Shivappa
2015-07-31 18:38 ` Marcelo Tosatti
2015-07-29 20:07 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 4/9] x86/intel_rdt: Add support for Cache Allocation detection Vikas Shivappa
2015-07-28 16:25 ` Peter Zijlstra
2015-07-28 22:07 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 5/9] x86/intel_rdt: Add new cgroup and Class of service management Vikas Shivappa
2015-07-28 17:06 ` Peter Zijlstra
2015-07-30 18:01 ` Vikas Shivappa
2015-07-28 17:17 ` Peter Zijlstra
2015-07-30 18:10 ` Vikas Shivappa
2015-07-30 19:44 ` Tejun Heo
2015-07-31 15:12 ` Marcelo Tosatti
2015-08-02 16:23 ` Tejun Heo
2015-08-03 20:32 ` Marcelo Tosatti
2015-08-04 12:55 ` Marcelo Tosatti
2015-08-04 18:36 ` Tejun Heo
2015-08-04 18:32 ` Tejun Heo
2015-07-31 16:24 ` Vikas Shivappa
2015-08-02 16:31 ` Tejun Heo
2015-08-04 18:50 ` Vikas Shivappa
2015-08-04 19:03 ` Tejun Heo
2015-08-05 2:21 ` Vikas Shivappa
2015-08-05 15:46 ` Tejun Heo
2015-08-06 20:58 ` Vikas Shivappa
2015-08-07 14:48 ` Tejun Heo
2015-08-05 12:22 ` Matt Fleming
2015-08-05 16:10 ` Tejun Heo
2015-08-06 0:24 ` Marcelo Tosatti
2015-08-06 20:46 ` Vikas Shivappa
2015-08-07 13:15 ` Marcelo Tosatti
2015-08-18 0:20 ` Marcelo Tosatti [this message]
2015-08-21 0:06 ` Vikas Shivappa
2015-08-21 0:13 ` Vikas Shivappa
2015-08-22 2:28 ` Marcelo Tosatti
2015-08-23 18:47 ` Vikas Shivappa
2015-08-24 13:06 ` Marcelo Tosatti
2015-07-01 22:21 ` [PATCH 6/9] x86/intel_rdt: Add support for cache bit mask management Vikas Shivappa
2015-07-28 16:35 ` Peter Zijlstra
2015-07-28 22:08 ` Vikas Shivappa
2015-07-28 16:37 ` Peter Zijlstra
2015-07-30 17:54 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 7/9] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-07-29 13:49 ` Peter Zijlstra
2015-07-30 18:16 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 8/9] x86/intel_rdt: Hot cpu support for Cache Allocation Vikas Shivappa
2015-07-29 15:53 ` Peter Zijlstra
2015-07-31 23:21 ` Vikas Shivappa
2015-07-01 22:21 ` [PATCH 9/9] x86/intel_rdt: Intel haswell Cache Allocation enumeration Vikas Shivappa
2015-07-29 16:35 ` Peter Zijlstra
2015-08-03 20:49 ` Vikas Shivappa
2015-07-29 16:36 ` Peter Zijlstra
2015-07-30 18:45 ` Vikas Shivappa
2015-07-13 17:13 ` [PATCH V12 0/9] Hot cpu handling changes to cqm, rapl and Intel Cache Allocation support Vikas Shivappa
2015-07-16 12:55 ` Thomas Gleixner
2015-07-24 16:52 ` Thomas Gleixner
2015-07-24 18:28 ` Vikas Shivappa
2015-07-24 18:39 ` Thomas Gleixner
2015-07-24 18:45 ` Vikas Shivappa
2015-07-29 16:47 ` Peter Zijlstra
2015-07-29 22:53 ` Vikas Shivappa
2015-07-24 18:32 ` Vikas Shivappa
-- strict thread matches above, loose matches on Subject: below --
2015-08-06 21:55 [PATCH V13 0/9] Intel cache allocation and Hot cpu handling changes to cqm, rapl Vikas Shivappa
2015-08-06 21:55 ` [PATCH 5/9] x86/intel_rdt: Add new cgroup and Class of service management Vikas Shivappa
2015-06-25 19:25 [PATCH V11 0/9] Hot cpu handling changes to cqm,rapl and Intel Cache Allocation support Vikas Shivappa
2015-06-25 19:25 ` [PATCH 5/9] x86/intel_rdt: Add new cgroup and Class of service management Vikas Shivappa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150818002050.GA3744@amt.cnet \
--to=mtosatti@redhat.com \
--cc=glenn.p.williamson@intel.com \
--cc=hpa@zytor.com \
--cc=kanaka.d.juvva@intel.com \
--cc=knoel@redhat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=matt.fleming@intel.com \
--cc=matt@codeblueprint.co.uk \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=tj@kernel.org \
--cc=vikas.shivappa@intel.com \
--cc=vikas.shivappa@linux.intel.com \
--cc=will.auld@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.