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diff for duplicates of <20150820150057.GY30520@lukather>

diff --git a/a/1.txt b/N1/1.txt
index 167c31d..2291731 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@ On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:
 > According to datasheet some pins are available on A10s only while others
 > are shared with A13.
 > 
-> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
 > ---
 > This time add all spi pins and make the CS pins separate as is seen with
 > current sun4i DTs
@@ -20,21 +20,21 @@ On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:
 >  		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 >  	};
 > +
-> +	spi1_cs1_pins_a: spi1_cs1@0 {
+> +	spi1_cs1_pins_a: spi1_cs1 at 0 {
 > +		allwinner,pins = "PG13";
 > +		allwinner,function = "spi1";
 > +		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +	};
 > +
-> +	spi2_pins_a: spi2@0 {
+> +	spi2_pins_a: spi2 at 0 {
 > +		allwinner,pins = "PB12", "PB13", "PB14";
 > +		allwinner,function = "spi1";
 > +		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +	};
 > +
-> +	spi2_cs0_pins_a: spi2_cs0@0 {
+> +	spi2_cs0_pins_a: spi2_cs0 at 0 {
 > +		allwinner,pins = "PB11";
 > +		allwinner,function = "spi1";
 > +		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
@@ -55,49 +55,49 @@ spi2 nodes with spi1 function ??? How can that even work?
 >  				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 >  			};
 > +
-> +			spi0_pins_a: spi0@0 {
+> +			spi0_pins_a: spi0 at 0 {
 > +				allwinner,pins = "PC00", "PC01", "PC02";
 > +				allwinner,function = "spi0";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi0_cs0_pins_a: spi0_cs0@0 {
+> +			spi0_cs0_pins_a: spi0_cs0 at 0 {
 > +				allwinner,pins = "PC03";
 > +				allwinner,function = "spi0";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi1_pins_a: spi1@0 {
+> +			spi1_pins_a: spi1 at 0 {
 > +				allwinner,pins = "PG10", "PG11", "PG12";
 > +				allwinner,function = "spi1";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi1_cs0_pins_a: spi1_cs0@0 {
+> +			spi1_cs0_pins_a: spi1_cs0 at 0 {
 > +				allwinner,pins = "PG09";
 > +				allwinner,function = "spi1";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi2_pins_b: spi2@1 {
+> +			spi2_pins_b: spi2 at 1 {
 > +				allwinner,pins = "PE01", "PE02", "PE03";
 > +				allwinner,function = "spi2";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi2_cs0_pins_b: spi2_cs1@1 {
+> +			spi2_cs0_pins_b: spi2_cs1 at 1 {
 > +				allwinner,pins = "PE00";
 > +				allwinner,function = "spi2";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 > +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 > +			};
 > +
-> +			spi2_cs1_pins_a: spi2_cs1@0 {
+> +			spi2_cs1_pins_a: spi2_cs1 at 0 {
 > +				allwinner,pins = "PB10";
 > +				allwinner,function = "spi2";
 > +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
@@ -112,3 +112,10 @@ Maxime
 Maxime Ripard, Free Electrons
 Embedded Linux, Kernel and Android engineering
 http://free-electrons.com
+-------------- next part --------------
+A non-text attachment was scrubbed...
+Name: signature.asc
+Type: application/pgp-signature
+Size: 819 bytes
+Desc: Digital signature
+URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150820/04bcd02f/attachment.sig>
diff --git a/a/content_digest b/N1/content_digest
index 3f92805..d4a110c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,29 +1,16 @@
  "ref\0cover.1440080122.git.hramrach@gmail.com\0"
  "ref\090730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach@gmail.com\0"
- "ref\090730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
- "From\0Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>\0"
- "Subject\0Re: [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s\0"
+ "From\0maxime.ripard@free-electrons.com (Maxime Ripard)\0"
+ "Subject\0[PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s\0"
  "Date\0Thu, 20 Aug 2015 17:00:57 +0200\0"
- "To\0Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org"
-  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
-  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
-  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
-  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
-  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
-  Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
- "\01:1\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
+ "\00:1\0"
  "b\0"
  "On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:\n"
  "> According to datasheet some pins are available on A10s only while others\n"
  "> are shared with A13.\n"
  "> \n"
- "> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "> Signed-off-by: Michal Suchanek <hramrach@gmail.com>\n"
  "> ---\n"
  "> This time add all spi pins and make the CS pins separate as is seen with\n"
  "> current sun4i DTs\n"
@@ -41,21 +28,21 @@
  ">  \t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  ">  \t};\n"
  "> +\n"
- "> +\tspi1_cs1_pins_a: spi1_cs1@0 {\n"
+ "> +\tspi1_cs1_pins_a: spi1_cs1 at 0 {\n"
  "> +\t\tallwinner,pins = \"PG13\";\n"
  "> +\t\tallwinner,function = \"spi1\";\n"
  "> +\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tspi2_pins_a: spi2@0 {\n"
+ "> +\tspi2_pins_a: spi2 at 0 {\n"
  "> +\t\tallwinner,pins = \"PB12\", \"PB13\", \"PB14\";\n"
  "> +\t\tallwinner,function = \"spi1\";\n"
  "> +\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tspi2_cs0_pins_a: spi2_cs0@0 {\n"
+ "> +\tspi2_cs0_pins_a: spi2_cs0 at 0 {\n"
  "> +\t\tallwinner,pins = \"PB11\";\n"
  "> +\t\tallwinner,function = \"spi1\";\n"
  "> +\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
@@ -76,49 +63,49 @@
  ">  \t\t\t\tallwinner,pull = <SUN4I_PINCTRL_PULL_UP>;\n"
  ">  \t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi0_pins_a: spi0@0 {\n"
+ "> +\t\t\tspi0_pins_a: spi0 at 0 {\n"
  "> +\t\t\t\tallwinner,pins = \"PC00\", \"PC01\", \"PC02\";\n"
  "> +\t\t\t\tallwinner,function = \"spi0\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi0_cs0_pins_a: spi0_cs0@0 {\n"
+ "> +\t\t\tspi0_cs0_pins_a: spi0_cs0 at 0 {\n"
  "> +\t\t\t\tallwinner,pins = \"PC03\";\n"
  "> +\t\t\t\tallwinner,function = \"spi0\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi1_pins_a: spi1@0 {\n"
+ "> +\t\t\tspi1_pins_a: spi1 at 0 {\n"
  "> +\t\t\t\tallwinner,pins = \"PG10\", \"PG11\", \"PG12\";\n"
  "> +\t\t\t\tallwinner,function = \"spi1\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi1_cs0_pins_a: spi1_cs0@0 {\n"
+ "> +\t\t\tspi1_cs0_pins_a: spi1_cs0 at 0 {\n"
  "> +\t\t\t\tallwinner,pins = \"PG09\";\n"
  "> +\t\t\t\tallwinner,function = \"spi1\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi2_pins_b: spi2@1 {\n"
+ "> +\t\t\tspi2_pins_b: spi2 at 1 {\n"
  "> +\t\t\t\tallwinner,pins = \"PE01\", \"PE02\", \"PE03\";\n"
  "> +\t\t\t\tallwinner,function = \"spi2\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi2_cs0_pins_b: spi2_cs1@1 {\n"
+ "> +\t\t\tspi2_cs0_pins_b: spi2_cs1 at 1 {\n"
  "> +\t\t\t\tallwinner,pins = \"PE00\";\n"
  "> +\t\t\t\tallwinner,function = \"spi2\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
  "> +\t\t\t\tallwinner,pull = <SUN4I_PINCTRL_NO_PULL>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tspi2_cs1_pins_a: spi2_cs1@0 {\n"
+ "> +\t\t\tspi2_cs1_pins_a: spi2_cs1 at 0 {\n"
  "> +\t\t\t\tallwinner,pins = \"PB10\";\n"
  "> +\t\t\t\tallwinner,function = \"spi2\";\n"
  "> +\t\t\t\tallwinner,drive = <SUN4I_PINCTRL_10_MA>;\n"
@@ -132,6 +119,13 @@
  "-- \n"
  "Maxime Ripard, Free Electrons\n"
  "Embedded Linux, Kernel and Android engineering\n"
- http://free-electrons.com
+ "http://free-electrons.com\n"
+ "-------------- next part --------------\n"
+ "A non-text attachment was scrubbed...\n"
+ "Name: signature.asc\n"
+ "Type: application/pgp-signature\n"
+ "Size: 819 bytes\n"
+ "Desc: Digital signature\n"
+ URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150820/04bcd02f/attachment.sig>
 
-8b46b1774bc749a12f1087a5eeeea62bda277bb4e5479a99635cbf0cbbae3dc8
+b73d4c5859fb683a4dd3f9baab40ad087b5836efbe29a81e9fac9efcf57753ef

diff --git a/a/1.txt b/N2/1.txt
index 167c31d..c1e532d 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -2,7 +2,7 @@ On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:
 > According to datasheet some pins are available on A10s only while others
 > are shared with A13.
 > 
-> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
 > ---
 > This time add all spi pins and make the CS pins separate as is seen with
 > current sun4i DTs
diff --git a/N2/2.bin b/N2/2.bin
new file mode 100644
index 0000000..2d86731
--- /dev/null
+++ b/N2/2.bin
@@ -0,0 +1,17 @@
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+Version: GnuPG v1
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+-----END PGP SIGNATURE-----
diff --git a/N2/2.hdr b/N2/2.hdr
new file mode 100644
index 0000000..3237378
--- /dev/null
+++ b/N2/2.hdr
@@ -0,0 +1,2 @@
+Content-Type: application/pgp-signature; name="signature.asc"
+Content-Description: Digital signature
diff --git a/a/content_digest b/N2/content_digest
index 3f92805..ed34eb6 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,29 +1,28 @@
  "ref\0cover.1440080122.git.hramrach@gmail.com\0"
  "ref\090730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach@gmail.com\0"
- "ref\090730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
- "From\0Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>\0"
+ "From\0Maxime Ripard <maxime.ripard@free-electrons.com>\0"
  "Subject\0Re: [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s\0"
  "Date\0Thu, 20 Aug 2015 17:00:57 +0200\0"
- "To\0Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org"
-  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
-  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
-  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
-  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
-  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
-  Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0Michal Suchanek <hramrach@gmail.com>\0"
+ "Cc\0linux-sunxi@googlegroups.com"
+  Rob Herring <robh+dt@kernel.org>
+  Pawel Moll <pawel.moll@arm.com>
+  Mark Rutland <mark.rutland@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Kumar Gala <galak@codeaurora.org>
+  Russell King <linux@arm.linux.org.uk>
+  Mark Brown <broonie@kernel.org>
+  devicetree@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+  linux-kernel@vger.kernel.org
+ " linux-spi@vger.kernel.org\0"
  "\01:1\0"
  "b\0"
  "On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:\n"
  "> According to datasheet some pins are available on A10s only while others\n"
  "> are shared with A13.\n"
  "> \n"
- "> Signed-off-by: Michal Suchanek <hramrach-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "> Signed-off-by: Michal Suchanek <hramrach@gmail.com>\n"
  "> ---\n"
  "> This time add all spi pins and make the CS pins separate as is seen with\n"
  "> current sun4i DTs\n"
@@ -133,5 +132,26 @@
  "Maxime Ripard, Free Electrons\n"
  "Embedded Linux, Kernel and Android engineering\n"
  http://free-electrons.com
+ "\01:2\0"
+ "fn\0signature.asc\0"
+ "d\0Digital signature\0"
+ "b\0"
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