diff for duplicates of <20150822150616.GC8624@rric.localhost>

diff --git a/a/1.txt b/N1/1.txt
index d7235c1..15fa7f1 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -96,14 +96,14 @@ Many thanks,
 > +
 > +	arm,associativity-reference-points = <0>;
 > +
-> +	memory at 00c00000 {
+> +	memory@00c00000 {
 > +		device_type = "memory";
 > +		reg = <0x0 0x00c00000 0x0 0x80000000>;
 > +		/* board 0, socket 0, no specific core */
 > +		arm,associativity = <0 0 0xffff>;
 > +	};
 > +
-> +	memory at 10000000000 {
+> +	memory@10000000000 {
 > +		device_type = "memory";
 > +		reg = <0x100 0x00000000 0x0 0x80000000>;
 > +		/* board 1, socket 0, no specific core */
@@ -114,7 +114,7 @@ Many thanks,
 > +		#address-cells = <2>;
 > +		#size-cells = <0>;
 > +
-> +		cpu at 000 {
+> +		cpu@000 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x000>;
@@ -122,56 +122,56 @@ Many thanks,
 > +			/* board 0, socket 0, core 0*/
 > +			arm,associativity = <0 0 0>;
 > +		};
-> +		cpu at 001 {
+> +		cpu@001 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x001>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 1>;
 > +		};
-> +		cpu at 002 {
+> +		cpu@002 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x002>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 2>;
 > +		};
-> +		cpu at 003 {
+> +		cpu@003 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x003>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 3>;
 > +		};
-> +		cpu at 004 {
+> +		cpu@004 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x004>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 4>;
 > +		};
-> +		cpu at 005 {
+> +		cpu@005 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x005>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 5>;
 > +		};
-> +		cpu at 006 {
+> +		cpu@006 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x006>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 6>;
 > +		};
-> +		cpu at 007 {
+> +		cpu@007 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x007>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 7>;
 > +		};
-> +		cpu at 008 {
+> +		cpu@008 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x008>;
@@ -179,49 +179,49 @@ Many thanks,
 > +			/* board 1, socket 0, core 0*/
 > +			arm,associativity = <1 0 0>;
 > +		};
-> +		cpu at 009 {
+> +		cpu@009 {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x009>;
 > +			enable-method = "psci";
 > +			arm,associativity = <1 0 1>;
 > +		};
-> +		cpu at 00a {
+> +		cpu@00a {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00a>;
 > +			enable-method = "psci";
 > +			arm,associativity = <0 0 2>;
 > +		};
-> +		cpu at 00b {
+> +		cpu@00b {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00b>;
 > +			enable-method = "psci";
 > +			arm,associativity = <1 0 3>;
 > +		};
-> +		cpu at 00c {
+> +		cpu@00c {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00c>;
 > +			enable-method = "psci";
 > +			arm,associativity = <1 0 4>;
 > +		};
-> +		cpu at 00d {
+> +		cpu@00d {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00d>;
 > +			enable-method = "psci";
 > +			arm,associativity = <1 0 5>;
 > +		};
-> +		cpu at 00e {
+> +		cpu@00e {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00e>;
 > +			enable-method = "psci";
 > +			arm,associativity = <1 0 6>;
 > +		};
-> +		cpu at 00f {
+> +		cpu@00f {
 > +			device_type = "cpu";
 > +			compatible =  "arm,armv8";
 > +			reg = <0x0 0x00f>;
@@ -230,7 +230,7 @@ Many thanks,
 > +		};
 > +	};
 > +
-> +	pcie0: pcie0 at 0x8480,00000000 {
+> +	pcie0: pcie0@0x8480,00000000 {
 > +		compatible = "arm,armv8";
 > +		device_type = "pci";
 > +		bus-range = <0 255>;
@@ -247,5 +247,5 @@ Many thanks,
 > 
 > _______________________________________________
 > linux-arm-kernel mailing list
-> linux-arm-kernel at lists.infradead.org
+> linux-arm-kernel@lists.infradead.org
 > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 8eb769c..5924f6a 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,28 @@
  "ref\01439570374-4079-1-git-send-email-gkulkarni@caviumnetworks.com\0"
  "ref\01439570374-4079-3-git-send-email-gkulkarni@caviumnetworks.com\0"
- "From\0robert.richter@caviumnetworks.com (Robert Richter)\0"
- "Subject\0[PATCH v5 2/4] Documentation: arm64/arm: dt bindings for numa.\0"
+ "From\0Robert Richter <robert.richter@caviumnetworks.com>\0"
+ "Subject\0Re: [PATCH v5 2/4] Documentation: arm64/arm: dt bindings for numa.\0"
  "Date\0Sat, 22 Aug 2015 17:06:16 +0200\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Arnd Bergmann <arnd@arndb.de>"
+ " Rob Herring <robh+dt@kernel.org>\0"
+ "Cc\0mark.rutland@arm.com"
+  devicetree@vger.kernel.org
+  steve.capper@linaro.org
+  pawel.moll@arm.com
+  al.stone@linaro.org
+  ard.biesheuvel@linaro.org
+  catalin.marinas@arm.com
+  ijc+devicetree@hellion.org.uk
+  Will.Deacon@arm.com
+  leif.lindholm@linaro.org
+  rfranz@cavium.com
+  galak@codeaurora.org
+  hanjun.guo@linaro.org
+  msalter@redhat.com
+  grant.likely@linaro.org
+  Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
+  linux-arm-kernel@lists.infradead.org
+ " gpkulkarni@gmail.com\0"
  "\00:1\0"
  "b\0"
  "On 14.08.15 22:09:32, Ganapatrao Kulkarni wrote:\n"
@@ -104,14 +123,14 @@
  "> +\n"
  "> +\tarm,associativity-reference-points = <0>;\n"
  "> +\n"
- "> +\tmemory at 00c00000 {\n"
+ "> +\tmemory@00c00000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x0 0x00c00000 0x0 0x80000000>;\n"
  "> +\t\t/* board 0, socket 0, no specific core */\n"
  "> +\t\tarm,associativity = <0 0 0xffff>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tmemory at 10000000000 {\n"
+ "> +\tmemory@10000000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x100 0x00000000 0x0 0x80000000>;\n"
  "> +\t\t/* board 1, socket 0, no specific core */\n"
@@ -122,7 +141,7 @@
  "> +\t\t#address-cells = <2>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tcpu at 000 {\n"
+ "> +\t\tcpu@000 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x000>;\n"
@@ -130,56 +149,56 @@
  "> +\t\t\t/* board 0, socket 0, core 0*/\n"
  "> +\t\t\tarm,associativity = <0 0 0>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 001 {\n"
+ "> +\t\tcpu@001 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x001>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 1>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 002 {\n"
+ "> +\t\tcpu@002 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x002>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 2>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 003 {\n"
+ "> +\t\tcpu@003 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x003>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 3>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 004 {\n"
+ "> +\t\tcpu@004 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x004>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 4>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 005 {\n"
+ "> +\t\tcpu@005 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x005>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 5>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 006 {\n"
+ "> +\t\tcpu@006 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x006>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 6>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 007 {\n"
+ "> +\t\tcpu@007 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x007>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 7>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 008 {\n"
+ "> +\t\tcpu@008 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x008>;\n"
@@ -187,49 +206,49 @@
  "> +\t\t\t/* board 1, socket 0, core 0*/\n"
  "> +\t\t\tarm,associativity = <1 0 0>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 009 {\n"
+ "> +\t\tcpu@009 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x009>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <1 0 1>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00a {\n"
+ "> +\t\tcpu@00a {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00a>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <0 0 2>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00b {\n"
+ "> +\t\tcpu@00b {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00b>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <1 0 3>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00c {\n"
+ "> +\t\tcpu@00c {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00c>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <1 0 4>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00d {\n"
+ "> +\t\tcpu@00d {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00d>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <1 0 5>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00e {\n"
+ "> +\t\tcpu@00e {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00e>;\n"
  "> +\t\t\tenable-method = \"psci\";\n"
  "> +\t\t\tarm,associativity = <1 0 6>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 00f {\n"
+ "> +\t\tcpu@00f {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible =  \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x00f>;\n"
@@ -238,7 +257,7 @@
  "> +\t\t};\n"
  "> +\t};\n"
  "> +\n"
- "> +\tpcie0: pcie0 at 0x8480,00000000 {\n"
+ "> +\tpcie0: pcie0@0x8480,00000000 {\n"
  "> +\t\tcompatible = \"arm,armv8\";\n"
  "> +\t\tdevice_type = \"pci\";\n"
  "> +\t\tbus-range = <0 255>;\n"
@@ -255,7 +274,7 @@
  "> \n"
  "> _______________________________________________\n"
  "> linux-arm-kernel mailing list\n"
- "> linux-arm-kernel at lists.infradead.org\n"
+ "> linux-arm-kernel@lists.infradead.org\n"
  > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-50577a6c35378cac496ed48cd2c741b91fc5f9f0756dc3891b40ac5f8f2e1310
+b01fc2c510a0af29adfa68beacf5d48225a406e2b8e7b8bc7a5a4d031e95fd32
