diff for duplicates of <20150831022417.GA27066@broadcom.com> diff --git a/a/1.txt b/N1/1.txt index 5af7ceb..751b540 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -12,8 +12,8 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > PL310 L2 Cache > > ARM A9 Global timer > > -> > Signed-off-by: Kapil Hali <kapilh@broadcom.com> -> > Signed-off-by: Jon Mason <jonmason@broadcom.com> +> > Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> +> > Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > > --- > > arch/arm/boot/dts/Makefile | 2 + > > arch/arm/boot/dts/bcm-nsp.dtsi | 120 +++++++++++++++++++++++++++++++++++++++ @@ -93,7 +93,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + #address-cells = <1>; > > + #size-cells = <0>; > > + -> > + cpu at 0 { +> > + cpu@0 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a9"; > > + next-level-cache = <&L2>; @@ -108,7 +108,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + cache-level = <2>; > > + }; > > + -> > + gic: interrupt-controller at 19021000 { +> > + gic: interrupt-controller@19021000 { > > + compatible = "arm,cortex-a9-gic"; > > + #interrupt-cells = <3>; > > + #address-cells = <0>; @@ -117,7 +117,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + <0x0100 0x100>; > > + }; > > + -> > + timer at 19020200 { +> > + timer@19020200 { > > + compatible = "arm,cortex-a9-global-timer"; > > + reg = <0x0200 0x100>; > > + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -169,7 +169,7 @@ Jon > > + #address-cells = <1>; > > + #size-cells = <1>; > > + -> > + uart0: serial at 18000300 { +> > + uart0: serial@18000300 { > > + compatible = "ns16550a"; > > + reg = <0x0300 0x100>; > > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -177,7 +177,7 @@ Jon > > + status = "disabled"; > > + }; > > + -> > + uart1: serial at 18000400 { +> > + uart1: serial@18000400 { > > + compatible = "ns16550a"; > > + reg = <0x0400 0x100>; > > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -249,4 +249,8 @@ Jon > > +&uart1 { > > + status = "okay"; > > +}; -> > +> > +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 9174cba..be82780 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,24 @@ "ref\01440805644-18241-1-git-send-email-jonmason@broadcom.com\0" "ref\055E0FAC4.2040108@broadcom.com\0" - "From\0jonmason@broadcom.com (Jon Mason)\0" - "Subject\0[PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" + "ref\055E0FAC4.2040108-dY08KVG/lbpWk0Htik3J/w@public.gmane.org\0" + "From\0Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" + "Subject\0Re: [PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" "Date\0Sun, 30 Aug 2015 22:24:17 -0400\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" + "Cc\0Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>" + Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> + Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> + Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" "\00:1\0" "b\0" "On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote:\n" @@ -20,8 +35,8 @@ "> > PL310 L2 Cache\n" "> > ARM A9 Global timer\n" "> > \n" - "> > Signed-off-by: Kapil Hali <kapilh@broadcom.com>\n" - "> > Signed-off-by: Jon Mason <jonmason@broadcom.com>\n" + "> > Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" + "> > Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" "> > ---\n" "> > arch/arm/boot/dts/Makefile | 2 +\n" "> > arch/arm/boot/dts/bcm-nsp.dtsi | 120 +++++++++++++++++++++++++++++++++++++++\n" @@ -101,7 +116,7 @@ "> > +\t\t\t#address-cells = <1>;\n" "> > +\t\t\t#size-cells = <0>;\n" "> > +\n" - "> > +\t\t\tcpu at 0 {\n" + "> > +\t\t\tcpu@0 {\n" "> > +\t\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\t\tcompatible = \"arm,cortex-a9\";\n" "> > +\t\t\t\tnext-level-cache = <&L2>;\n" @@ -116,7 +131,7 @@ "> > +\t\t\tcache-level = <2>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tgic: interrupt-controller at 19021000 {\n" + "> > +\t\tgic: interrupt-controller@19021000 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> > +\t\t\t#interrupt-cells = <3>;\n" "> > +\t\t\t#address-cells = <0>;\n" @@ -125,7 +140,7 @@ "> > +\t\t\t <0x0100 0x100>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\ttimer at 19020200 {\n" + "> > +\t\ttimer@19020200 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> > +\t\t\treg = <0x0200 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -177,7 +192,7 @@ "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <1>;\n" "> > +\n" - "> > +\t\tuart0: serial at 18000300 {\n" + "> > +\t\tuart0: serial@18000300 {\n" "> > +\t\t\tcompatible = \"ns16550a\";\n" "> > +\t\t\treg = <0x0300 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -185,7 +200,7 @@ "> > +\t\t\tstatus = \"disabled\";\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tuart1: serial at 18000400 {\n" + "> > +\t\tuart1: serial@18000400 {\n" "> > +\t\t\tcompatible = \"ns16550a\";\n" "> > +\t\t\treg = <0x0400 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -257,6 +272,10 @@ "> > +&uart1 {\n" "> > +\tstatus = \"okay\";\n" "> > +};\n" - > > + "> > \n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -6266e74ff542caae0f8ca192687240caf19ba791830454a9dfcd74f4dc42c8ae +7051ca6345d7109178e834f02355e4c86334dec266fcddbafbfab955019cccde
diff --git a/a/1.txt b/N2/1.txt index 5af7ceb..bc09512 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -93,7 +93,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + #address-cells = <1>; > > + #size-cells = <0>; > > + -> > + cpu at 0 { +> > + cpu@0 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a9"; > > + next-level-cache = <&L2>; @@ -108,7 +108,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + cache-level = <2>; > > + }; > > + -> > + gic: interrupt-controller at 19021000 { +> > + gic: interrupt-controller@19021000 { > > + compatible = "arm,cortex-a9-gic"; > > + #interrupt-cells = <3>; > > + #address-cells = <0>; @@ -117,7 +117,7 @@ On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote: > > + <0x0100 0x100>; > > + }; > > + -> > + timer at 19020200 { +> > + timer@19020200 { > > + compatible = "arm,cortex-a9-global-timer"; > > + reg = <0x0200 0x100>; > > + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -169,7 +169,7 @@ Jon > > + #address-cells = <1>; > > + #size-cells = <1>; > > + -> > + uart0: serial at 18000300 { +> > + uart0: serial@18000300 { > > + compatible = "ns16550a"; > > + reg = <0x0300 0x100>; > > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -177,7 +177,7 @@ Jon > > + status = "disabled"; > > + }; > > + -> > + uart1: serial at 18000400 { +> > + uart1: serial@18000400 { > > + compatible = "ns16550a"; > > + reg = <0x0400 0x100>; > > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N2/content_digest index 9174cba..9394d46 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,23 @@ "ref\01440805644-18241-1-git-send-email-jonmason@broadcom.com\0" "ref\055E0FAC4.2040108@broadcom.com\0" - "From\0jonmason@broadcom.com (Jon Mason)\0" - "Subject\0[PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" + "From\0Jon Mason <jonmason@broadcom.com>\0" + "Subject\0Re: [PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" "Date\0Sun, 30 Aug 2015 22:24:17 -0400\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Ray Jui <rjui@broadcom.com>\0" + "Cc\0Olof Johansson <olof@lixom.net>" + Arnd Bergmann <arnd@arndb.de> + Kevin Hilman <khilman@linaro.org> + Rob Herring <robh+dt@kernel.org> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Florian Fainelli <f.fainelli@gmail.com> + <devicetree@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + <bcm-kernel-feedback-list@broadcom.com> + <linux-kernel@vger.kernel.org> + " Kapil Hali <kapilh@broadcom.com>\0" "\00:1\0" "b\0" "On Fri, Aug 28, 2015 at 05:20:20PM -0700, Ray Jui wrote:\n" @@ -101,7 +115,7 @@ "> > +\t\t\t#address-cells = <1>;\n" "> > +\t\t\t#size-cells = <0>;\n" "> > +\n" - "> > +\t\t\tcpu at 0 {\n" + "> > +\t\t\tcpu@0 {\n" "> > +\t\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\t\tcompatible = \"arm,cortex-a9\";\n" "> > +\t\t\t\tnext-level-cache = <&L2>;\n" @@ -116,7 +130,7 @@ "> > +\t\t\tcache-level = <2>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tgic: interrupt-controller at 19021000 {\n" + "> > +\t\tgic: interrupt-controller@19021000 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> > +\t\t\t#interrupt-cells = <3>;\n" "> > +\t\t\t#address-cells = <0>;\n" @@ -125,7 +139,7 @@ "> > +\t\t\t <0x0100 0x100>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\ttimer at 19020200 {\n" + "> > +\t\ttimer@19020200 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> > +\t\t\treg = <0x0200 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -177,7 +191,7 @@ "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <1>;\n" "> > +\n" - "> > +\t\tuart0: serial at 18000300 {\n" + "> > +\t\tuart0: serial@18000300 {\n" "> > +\t\t\tcompatible = \"ns16550a\";\n" "> > +\t\t\treg = <0x0300 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -185,7 +199,7 @@ "> > +\t\t\tstatus = \"disabled\";\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tuart1: serial at 18000400 {\n" + "> > +\t\tuart1: serial@18000400 {\n" "> > +\t\t\tcompatible = \"ns16550a\";\n" "> > +\t\t\treg = <0x0400 0x100>;\n" "> > +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -259,4 +273,4 @@ "> > +};\n" > > -6266e74ff542caae0f8ca192687240caf19ba791830454a9dfcd74f4dc42c8ae +c427b0d9a723901eb838e786c78dcf040c095481b0c4db3253b7116668b06426
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