From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chao Peng Subject: Re: Question about the CAT and CMT in Xen Date: Wed, 2 Sep 2015 09:47:56 +0800 Message-ID: <20150902014756.GC19417@pengc-linux.bj.intel.com> References: <55E49C11.40303@citrix.com> <20150901054716.GA19417@pengc-linux.bj.intel.com> <55E5A263.5050708@citrix.com> <55E5B675.7020607@citrix.com> Reply-To: Chao Peng Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Meng Xu Cc: Andrew Cooper , "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org On Tue, Sep 01, 2015 at 10:42:57AM -0400, Meng Xu wrote: > 2015-09-01 10:30 GMT-04:00 Andrew Cooper : > > On 01/09/15 15:20, Meng Xu wrote: > >> 2015-09-01 9:04 GMT-04:00 Andrew Cooper : > >>> On 01/09/15 13:55, Meng Xu wrote: > >>>> 2015-09-01 1:47 GMT-04:00 Chao Peng : > >>>>> On Mon, Aug 31, 2015 at 04:09:31PM -0400, Meng Xu wrote: > >>>>>> I looked into the xen/arch/x86/psr.c and found that the function > >>>>>> cat_cpu_init() just returned without initializing the variable > >>>>>> "cat_socket_enable". > >>>>>> > >>>>>> Both !cpu_has(c, X86_FEATURE_CAT) and c->cpuid_level < > >>>>>> PSR_CPUID_LEVEL_CAT are evaluated as 1 inside the function > >>>>>> cat_cpu_init(). > >>>>>> > >>>>>> OK. I understand that the cpuid info shows that the CPU does not > >>>>>> support CAT. However, according to the table at > >>>>>> http://www.intel.com/content/www/us/en/communications/cache-monitoring-cache-allocation-technologies.html, > >>>>>> Intel(R) Xeon(R) CPU E5-2618L v3 should support CAT. > >>>>>> > >>>>>> I'm not sure which part is incorrect: the hardware or the software? > >>>>>> (Hope Chao could give some insight about this.) > >>>>>> > >>>>> Hmmm, from cpuid info it looks like this model does not support CAT. I'm > >>>>> not sure which microarchitecture it is. > >>>> According to http://www.cpu-world.com/CPUs/Xeon/Intel-Xeon%20E5-2618L%20v3.html, > >>>> 2618L v3 is Haswell. :-( > >>> Wikipedia agrees. > >>> > >>> Haswell only has plain L3 cache usage information. > >>> > >>> It is Broadwell which adds memory bandwidth monitoring, and Cache > >>> Allocation. > >> Ah, then the Intel's website [1] that lists the CAT-enabled processor > >> is quite misleading. I checked several processors (2618Lv3, 2608Lv3, > >> 2658v3) listed in [1] that is claimed to have CAT, and all of them > >> belong to Haswell... I think "v3" actually represents Haswell. > >> > >> Andrew, is it possible to know which processor XenServer is currently > >> using that is confirmed to have the CAT mechanism? > > > > I cant be much help, unfortunately, > > Thank you very much for your trying to help! :-) > > Hope Chao could give more information about which Intel processors > support the CAT. Until now what I can tell you is: All Broadwell Server support CAT and some models of Haswell Server may also support it. And the good news is the information @ Intel's website [1] is accurate so your purchased "E5-2618L v3" should have it. But you definitely need to ask your vendor for the firmware update. Chao