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diff for duplicates of <20150905102807.18941767@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index c35d539..57880bb 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,13 +1,13 @@
 On Sat, 5 Sep 2015 10:58:59 +0800
-Ding Tianhong <dingtianhong@huawei.com> wrote:
+Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> wrote:
 
 > Add initial dtsi file to support Hisilicon Hip05-D02 Board with
 > support of CPUs in four clusters and each cluster has quard Cortex-A57.
 > 
 > Also add dts file to support Hip05-D02 development board.
 > 
-> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
-> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
+> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
+> Signed-off-by: Kefeng Wang <wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
 > ---
 >  arch/arm64/boot/dts/hisilicon/Makefile      |   2 +-
 >  arch/arm64/boot/dts/hisilicon/hip05-d02.dts |  36 ++++
@@ -51,7 +51,7 @@ Ding Tianhong <dingtianhong@huawei.com> wrote:
 > +	model = "Hisilicon Hip05 D02 Development Board";
 > +	compatible = "hisilicon,hip05-d02";
 > +
-> +	memory at 00000000 {
+> +	memory@00000000 {
 > +		device_type = "memory";
 > +		reg = <0x0 0x00000000 0x0 0x80000000>;
 > +	};
@@ -161,7 +161,7 @@ Ding Tianhong <dingtianhong@huawei.com> wrote:
 > +			};
 > +		};
 > +
-> +		cpu0: cpu at 20000 {
+> +		cpu0: cpu@20000 {
 > +			device_type = "cpu";
 > +			compatible = "hisilicon,hip05", "arm,armv8";
 
@@ -174,7 +174,7 @@ address this in your next version.
 
 [...]
 
-> +	gic: interrupt-controller at 8d000000 {
+> +	gic: interrupt-controller@8d000000 {
 > +		compatible = "arm,gic-v3";
 > +                #interrupt-cells = <3>;
 > +                #address-cells = <2>;
@@ -193,7 +193,7 @@ Really? You redistributors are 192kB apart?
 > +		      <0x0 0xfe020000 0 0x10000>;       /* GICV */
 > +		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 > +
-> +		its_totems: interrupt-controller at 8c000000 {
+> +		its_totems: interrupt-controller@8c000000 {
 > +			compatible = "arm,gic-v3-its";
 > +			msi-controller;
 > +			reg = <0x0 0x8c000000 0x0 0x1000000>;
@@ -205,3 +205,7 @@ Thanks,
 	M.
 -- 
 Jazz is not dead. It just smells funny.
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index d35064e..c3b3495 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,21 +1,39 @@
  "ref\01441421939-6236-1-git-send-email-dingtianhong@huawei.com\0"
  "ref\01441421939-6236-3-git-send-email-dingtianhong@huawei.com\0"
- "From\0marc.zyngier@arm.com (Marc Zyngier)\0"
- "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
+ "ref\01441421939-6236-3-git-send-email-dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org\0"
+ "From\0Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
  "Date\0Sat, 5 Sep 2015 10:28:07 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0"
+ "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  catalin.marinas-5wv7dgnIgG8@public.gmane.org
+  will.deacon-5wv7dgnIgG8@public.gmane.org
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  pawel.moll-5wv7dgnIgG8@public.gmane.org
+  mark.rutland-5wv7dgnIgG8@public.gmane.org
+  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
+  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
+  rob.herring-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
+  haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
+  zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
+  xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
+  leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
+  zhizhou.zh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+ " linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "On Sat, 5 Sep 2015 10:58:59 +0800\n"
- "Ding Tianhong <dingtianhong@huawei.com> wrote:\n"
+ "Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> wrote:\n"
  "\n"
  "> Add initial dtsi file to support Hisilicon Hip05-D02 Board with\n"
  "> support of CPUs in four clusters and each cluster has quard Cortex-A57.\n"
  "> \n"
  "> Also add dts file to support Hip05-D02 development board.\n"
  "> \n"
- "> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>\n"
- "> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>\n"
+ "> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n"
+ "> Signed-off-by: Kefeng Wang <wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm64/boot/dts/hisilicon/Makefile      |   2 +-\n"
  ">  arch/arm64/boot/dts/hisilicon/hip05-d02.dts |  36 ++++\n"
@@ -59,7 +77,7 @@
  "> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n"
  "> +\tcompatible = \"hisilicon,hip05-d02\";\n"
  "> +\n"
- "> +\tmemory at 00000000 {\n"
+ "> +\tmemory@00000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  "> +\t};\n"
@@ -169,7 +187,7 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tcpu0: cpu at 20000 {\n"
+ "> +\t\tcpu0: cpu@20000 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"hisilicon,hip05\", \"arm,armv8\";\n"
  "\n"
@@ -182,7 +200,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +\tgic: interrupt-controller at 8d000000 {\n"
+ "> +\tgic: interrupt-controller@8d000000 {\n"
  "> +\t\tcompatible = \"arm,gic-v3\";\n"
  "> +                #interrupt-cells = <3>;\n"
  "> +                #address-cells = <2>;\n"
@@ -201,7 +219,7 @@
  "> +\t\t      <0x0 0xfe020000 0 0x10000>;       /* GICV */\n"
  "> +\t\tinterrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\n"
- "> +\t\tits_totems: interrupt-controller at 8c000000 {\n"
+ "> +\t\tits_totems: interrupt-controller@8c000000 {\n"
  "> +\t\t\tcompatible = \"arm,gic-v3-its\";\n"
  "> +\t\t\tmsi-controller;\n"
  "> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n"
@@ -212,6 +230,10 @@
  "\n"
  "\tM.\n"
  "-- \n"
- Jazz is not dead. It just smells funny.
+ "Jazz is not dead. It just smells funny.\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-09cb3c73ba415790e93a2a237f5a33f1f510baf32b8a055b257721d93e21a1dc
+e3047d69283f0e18000413cd68b6a3964fc3a2db9b5b6fff5de61956d0b0633b

diff --git a/a/1.txt b/N2/1.txt
index c35d539..0752d4d 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -51,7 +51,7 @@ Ding Tianhong <dingtianhong@huawei.com> wrote:
 > +	model = "Hisilicon Hip05 D02 Development Board";
 > +	compatible = "hisilicon,hip05-d02";
 > +
-> +	memory at 00000000 {
+> +	memory@00000000 {
 > +		device_type = "memory";
 > +		reg = <0x0 0x00000000 0x0 0x80000000>;
 > +	};
@@ -161,7 +161,7 @@ Ding Tianhong <dingtianhong@huawei.com> wrote:
 > +			};
 > +		};
 > +
-> +		cpu0: cpu at 20000 {
+> +		cpu0: cpu@20000 {
 > +			device_type = "cpu";
 > +			compatible = "hisilicon,hip05", "arm,armv8";
 
@@ -174,7 +174,7 @@ address this in your next version.
 
 [...]
 
-> +	gic: interrupt-controller at 8d000000 {
+> +	gic: interrupt-controller@8d000000 {
 > +		compatible = "arm,gic-v3";
 > +                #interrupt-cells = <3>;
 > +                #address-cells = <2>;
@@ -193,7 +193,7 @@ Really? You redistributors are 192kB apart?
 > +		      <0x0 0xfe020000 0 0x10000>;       /* GICV */
 > +		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 > +
-> +		its_totems: interrupt-controller at 8c000000 {
+> +		its_totems: interrupt-controller@8c000000 {
 > +			compatible = "arm,gic-v3-its";
 > +			msi-controller;
 > +			reg = <0x0 0x8c000000 0x0 0x1000000>;
diff --git a/a/content_digest b/N2/content_digest
index d35064e..6a226ec 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,26 @@
  "ref\01441421939-6236-1-git-send-email-dingtianhong@huawei.com\0"
  "ref\01441421939-6236-3-git-send-email-dingtianhong@huawei.com\0"
- "From\0marc.zyngier@arm.com (Marc Zyngier)\0"
- "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
+ "From\0Marc Zyngier <marc.zyngier@arm.com>\0"
+ "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
  "Date\0Sat, 5 Sep 2015 10:28:07 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Ding Tianhong <dingtianhong@huawei.com>\0"
+ "Cc\0<linux-arm-kernel@lists.infradead.org>"
+  <linux-kernel@vger.kernel.org>
+  <catalin.marinas@arm.com>
+  <will.deacon@arm.com>
+  <devicetree@vger.kernel.org>
+  <robh+dt@kernel.org>
+  <pawel.moll@arm.com>
+  <mark.rutland@arm.com>
+  <ijc+devicetree@hellion.org.uk>
+  <galak@codeaurora.org>
+  <rob.herring@linaro.org>
+  <haojian.zhuang@linaro.org>
+  <zhangfei.gao@linaro.org>
+  <xuwei5@hisilicon.com>
+  <leo.yan@linaro.org>
+  <zhizhou.zh@gmail.com>
+ " <linuxarm@huawei.com>\0"
  "\00:1\0"
  "b\0"
  "On Sat, 5 Sep 2015 10:58:59 +0800\n"
@@ -59,7 +76,7 @@
  "> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n"
  "> +\tcompatible = \"hisilicon,hip05-d02\";\n"
  "> +\n"
- "> +\tmemory at 00000000 {\n"
+ "> +\tmemory@00000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  "> +\t};\n"
@@ -169,7 +186,7 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tcpu0: cpu at 20000 {\n"
+ "> +\t\tcpu0: cpu@20000 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"hisilicon,hip05\", \"arm,armv8\";\n"
  "\n"
@@ -182,7 +199,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +\tgic: interrupt-controller at 8d000000 {\n"
+ "> +\tgic: interrupt-controller@8d000000 {\n"
  "> +\t\tcompatible = \"arm,gic-v3\";\n"
  "> +                #interrupt-cells = <3>;\n"
  "> +                #address-cells = <2>;\n"
@@ -201,7 +218,7 @@
  "> +\t\t      <0x0 0xfe020000 0 0x10000>;       /* GICV */\n"
  "> +\t\tinterrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\n"
- "> +\t\tits_totems: interrupt-controller at 8c000000 {\n"
+ "> +\t\tits_totems: interrupt-controller@8c000000 {\n"
  "> +\t\t\tcompatible = \"arm,gic-v3-its\";\n"
  "> +\t\t\tmsi-controller;\n"
  "> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n"
@@ -214,4 +231,4 @@
  "-- \n"
  Jazz is not dead. It just smells funny.
 
-09cb3c73ba415790e93a2a237f5a33f1f510baf32b8a055b257721d93e21a1dc
+0b77ee68440750173a860316c3914acf40aef48be4bb90bb23b05a335585557b

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