From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sat, 5 Sep 2015 15:15:43 +0200
Subject: [U-Boot] [PATCH v4 1/2] usb: zynqmp: Add XHCI driver support
In-Reply-To: <1441348268-18547-1-git-send-email-sivadur@xilinx.com>
References: <1441348268-18547-1-git-send-email-sivadur@xilinx.com>
Message-ID: <201509051515.43650.marex@denx.de>
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To: u-boot@lists.denx.de

On Friday, September 04, 2015 at 08:31:07 AM, Siva Durga Prasad Paladugu wrote:
> Added USB XHCI driver support for zynqmp.
> 
> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

Hi,

looks like in the meantime, some xhci implementations switches to OF (see
for example xhci-exynos5.c), which I believe is also already used on Zynq.
Maybe you should consider that as well, given that this patch is scheduled
after 2015.10 release anyway.

> +struct zynqmp_xhci {
> +	struct xhci_hccr *hcd;
> +	struct dwc3 *dwc3_reg;
> +};
> +
> +static struct zynqmp_xhci zynqmp_xhci;
>
> +unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
> +
> +__weak int __board_usb_init(int index, enum usb_init_type init)

Please, no functions starting with underscores.

> +{
> +	return 0;

This function is not used, remove it?

> +}
> +
> +void usb_phy_reset(struct dwc3 *dwc3_reg)
> +{
> +	/* Assert USB3 PHY reset */
> +	setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
> +
> +	/* Assert USB2 PHY reset */
> +	setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
> +
> +	udelay(10);
> +
> +	/* Clear USB3 PHY reset */
> +	clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
> +
> +	/* Clear USB2 PHY reset */
> +	clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
> +}
[...]
Best regards,
Marek Vasut