All of lore.kernel.org
 help / color / mirror / Atom feed
From: mingo@kernel.org (Ingo Molnar)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf
Date: Sat, 19 Sep 2015 12:09:34 +0200	[thread overview]
Message-ID: <20150919100934.GA31274@gmail.com> (raw)
In-Reply-To: <1442593594-10665-21-git-send-email-mathieu.poirier@linaro.org>


Looks like a pretty useful feature all around. While reading the description I 
noticed a few typos:

* Mathieu Poirier <mathieu.poirier@linaro.org> wrote:

> +Regardless of the amnout ETM/PTM IP block in a system (usually equal to the
> +amount of processor core), the "cs_etm" PMU will be listed only once.

s/amnout/amount

> +Tracing limited to user and kernel space can also be used to narrow the amount
> +of collected tracers:

s/tracers/traces

> +The Coresight PMUs can be configured to work in "full trace" or "snapshot" mode.
> +In full trace mode trade acquisition is enable from beginning to end with trace
> +data being recorded continuously:

s/trade acquisition/trace acquisition
s/is enable from/is enabled from

> +Since this can lead to a significant amount of data and that some device are
> +limited in disk space snapshot mode can be used instead.

s/and that some device are limited in disk space/
  and because some devices are limited in disk space

> +Trace data collected during trace runs end up in the centennial "perf.data"
> +file.

hey, perf isn't 100 years old! :-)

s/centennial/central ?

Also, 'data' is singular in this context, so I think:

s/data collected during trace runs end up in the
 /data collected during trace runs ends up in the


> [...] Trace configuration information necessary for trace decoding are also
> +embedded in the "perf.data" file.

s/are/is

>  Two new headers, 'PERF_RECORD_AUXTRACE_INFO'
> +and 'PERF_RECORD_AUXTRACE' have been added to list of event types in order to
> +find out where the different sections start.

s/to list of event types
 /to the list of event types

> +
> +It is worth nothing that a set of metadata information exists for each tracer
> +that participated in a trace run. [...]

s/nothing
 /noting

  As such if 5 processors have been engaged,
> +5 set of metadata will be found in the perf.data file.

s/5 set of metadata
 /5 sets of metadata

> +Metadata information is collected directly from the ETM/PTM management registers
> +using the sysFS interface.  Since there is not way for the perf command line
> +tool to associate a CPU with a tracer, a symbolic link has been created between
> +the cs_etm sysFS event directory and each Coresight tracer:

s/there is not way
 /there is no way

> +As with the perf method described above, a coresight sink needs to be identify
> +before trace collection can commence.

Btw., 'Coresight' is spelled in two different ways throughout this document: 
capitalized and non-capitalized. Please pick one variant and use it consistently.

>  any given moment.  As a generic operation, all device pertaining to the sink
> -class will have an "active" entry in sysfs:

s/all device pertaining to
 /all devices pertaining to

Thanks,

	Ingo

WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@kernel.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
	alexander.shishkin@linux.intel.com, acme@kernel.org,
	mingo@redhat.com, corbet@lwn.net, adrian.hunter@intel.com,
	zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com,
	al.grant@arm.com, pawel.moll@arm.com,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf
Date: Sat, 19 Sep 2015 12:09:34 +0200	[thread overview]
Message-ID: <20150919100934.GA31274@gmail.com> (raw)
In-Reply-To: <1442593594-10665-21-git-send-email-mathieu.poirier@linaro.org>


Looks like a pretty useful feature all around. While reading the description I 
noticed a few typos:

* Mathieu Poirier <mathieu.poirier@linaro.org> wrote:

> +Regardless of the amnout ETM/PTM IP block in a system (usually equal to the
> +amount of processor core), the "cs_etm" PMU will be listed only once.

s/amnout/amount

> +Tracing limited to user and kernel space can also be used to narrow the amount
> +of collected tracers:

s/tracers/traces

> +The Coresight PMUs can be configured to work in "full trace" or "snapshot" mode.
> +In full trace mode trade acquisition is enable from beginning to end with trace
> +data being recorded continuously:

s/trade acquisition/trace acquisition
s/is enable from/is enabled from

> +Since this can lead to a significant amount of data and that some device are
> +limited in disk space snapshot mode can be used instead.

s/and that some device are limited in disk space/
  and because some devices are limited in disk space

> +Trace data collected during trace runs end up in the centennial "perf.data"
> +file.

hey, perf isn't 100 years old! :-)

s/centennial/central ?

Also, 'data' is singular in this context, so I think:

s/data collected during trace runs end up in the
 /data collected during trace runs ends up in the


> [...] Trace configuration information necessary for trace decoding are also
> +embedded in the "perf.data" file.

s/are/is

>  Two new headers, 'PERF_RECORD_AUXTRACE_INFO'
> +and 'PERF_RECORD_AUXTRACE' have been added to list of event types in order to
> +find out where the different sections start.

s/to list of event types
 /to the list of event types

> +
> +It is worth nothing that a set of metadata information exists for each tracer
> +that participated in a trace run. [...]

s/nothing
 /noting

  As such if 5 processors have been engaged,
> +5 set of metadata will be found in the perf.data file.

s/5 set of metadata
 /5 sets of metadata

> +Metadata information is collected directly from the ETM/PTM management registers
> +using the sysFS interface.  Since there is not way for the perf command line
> +tool to associate a CPU with a tracer, a symbolic link has been created between
> +the cs_etm sysFS event directory and each Coresight tracer:

s/there is not way
 /there is no way

> +As with the perf method described above, a coresight sink needs to be identify
> +before trace collection can commence.

Btw., 'Coresight' is spelled in two different ways throughout this document: 
capitalized and non-capitalized. Please pick one variant and use it consistently.

>  any given moment.  As a generic operation, all device pertaining to the sink
> -class will have an "active" entry in sysfs:

s/all device pertaining to
 /all devices pertaining to

Thanks,

	Ingo

  reply	other threads:[~2015-09-19 10:09 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 16:26 [RFC PATCH 00/20] Coresight integration with perf Mathieu Poirier
2015-09-18 16:26 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30  9:58   ` Alexander Shishkin
2015-09-30  9:58     ` Alexander Shishkin
2015-10-01 22:26     ` Mathieu Poirier
2015-10-01 22:26       ` Mathieu Poirier
2015-10-02  4:40       ` Alexander Shishkin
2015-10-02  4:40         ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 02/20] coresight: etm3x: implementing 'is_enabled()' API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 03/20] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30 11:16   ` Alexander Shishkin
2015-09-30 11:16     ` Alexander Shishkin
2015-10-01 22:43     ` Mathieu Poirier
2015-10-01 22:43       ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 04/20] coresight: etm3x: using chip logic to start/stop traces Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 05/20] coresight: etm3x: adapting default tracer setting for perf Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 06/20] coresight: etm3x: unlocking tracer in default arch init Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30 11:33   ` Alexander Shishkin
2015-09-30 11:33     ` Alexander Shishkin
2015-10-01 22:42     ` Mathieu Poirier
2015-10-01 22:42       ` Mathieu Poirier
2015-10-02  4:47       ` Alexander Shishkin
2015-10-02  4:47         ` Alexander Shishkin
2015-10-02 17:17         ` Mathieu Poirier
2015-10-02 17:17           ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 07/20] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 08/20] coresight: etb10: implementing buffer set and unset APIs Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 09/20] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 10/20] coresight: etb10: adding snapshot mode feature Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 11/20] coresight: making coresight_build_paths() public Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 12/20] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 13/20] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 14/20] coresight: etm-perf: implementing 'event_init()' API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-22 14:29   ` Alexander Shishkin
2015-09-22 14:29     ` Alexander Shishkin
2015-09-28 21:22     ` Mathieu Poirier
2015-09-28 21:22       ` Mathieu Poirier
2015-09-30  9:43       ` Alexander Shishkin
2015-09-30  9:43         ` Alexander Shishkin
2015-10-02 16:52         ` Mathieu Poirier
2015-10-02 16:52           ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 15/20] coresight: etm-perf: implementing 'setup_aux()' API Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30 11:50   ` Alexander Shishkin
2015-09-30 11:50     ` Alexander Shishkin
2015-10-01 22:49     ` Mathieu Poirier
2015-10-01 22:49       ` Mathieu Poirier
2015-10-02  4:50       ` Alexander Shishkin
2015-10-02  4:50         ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 16/20] coresight: etm-perf: implementing trace related APIs Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 18/20] coresight: etm3x: pushing down perf configuration to tracer Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30 12:45   ` Alexander Shishkin
2015-09-30 12:45     ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 19/20] coresight: etm3x: implementing perf's user/kernel mode Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-30 10:16   ` Alexander Shishkin
2015-09-30 10:16     ` Alexander Shishkin
2015-10-01 23:16     ` Mathieu Poirier
2015-10-01 23:16       ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-09-18 16:26   ` Mathieu Poirier
2015-09-19 10:09   ` Ingo Molnar [this message]
2015-09-19 10:09     ` Ingo Molnar
2015-09-30  8:52 ` [RFC PATCH 00/20] Coresight " Alexander Shishkin
2015-09-30  8:52   ` Alexander Shishkin
2015-10-01 22:07   ` Mathieu Poirier
2015-10-01 22:07     ` Mathieu Poirier
2015-10-02  4:53     ` Alexander Shishkin
2015-10-02  4:53       ` Alexander Shishkin
2015-10-02 15:27       ` Mathieu Poirier
2015-10-02 15:27         ` Mathieu Poirier
2015-09-30  9:01 ` Alexander Shishkin
2015-09-30  9:01   ` Alexander Shishkin
2015-10-01 22:12   ` Mathieu Poirier
2015-10-01 22:12     ` Mathieu Poirier
2015-09-30 10:18 ` Alexander Shishkin
2015-09-30 10:18   ` Alexander Shishkin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150919100934.GA31274@gmail.com \
    --to=mingo@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.