From: Aurelien Jarno <aurelien@aurel32.net>
To: Thomas Huth <thuth@redhat.com>
Cc: Tom Musta <tommusta@gmail.com>,
qemu-stable@nongnu.org, qemu-devel@nongnu.org,
Alexander Graf <agraf@suse.de>,
qemu-ppc@nongnu.org, David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [Qemu-devel] [PATCH 2/2] target-ppc: fix xscmpodp and xscmpudp decoding
Date: Tue, 22 Sep 2015 23:28:04 +0200 [thread overview]
Message-ID: <20150922212804.GC10573@aurel32.net> (raw)
In-Reply-To: <56012CC8.8070801@redhat.com>
On 2015-09-22 12:26, Thomas Huth wrote:
> On 13/09/15 23:03, Aurelien Jarno wrote:
> > The xscmpodp and xscmpudp instructions only have the AX, BX bits in
> > there encoding, the lowest bit (usually TX) is marked as an invalid
> > bit. We therefore can't decode them with GEN_XX2FORM, which decodes
> > the two lowest bit.
> >
> > Introduce a new form GEN_XX2FORM, which decodes AX and BX and mark
> > the lowest bit as invalid.
> >
> > Cc: Tom Musta <tommusta@gmail.com>
> > Cc: Alexander Graf <agraf@suse.de>
> > Cc: qemu-stable@nongnu.org
> > Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> > ---
> > target-ppc/translate.c | 11 +++++++++--
> > 1 file changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> > index 84c5cea..c0eed13 100644
> > --- a/target-ppc/translate.c
> > +++ b/target-ppc/translate.c
> > @@ -10670,6 +10670,13 @@ GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2), \
> > GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 0, PPC_NONE, fl2), \
> > GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 0, PPC_NONE, fl2)
> >
> > +#undef GEN_XX2IFORM
> > +#define GEN_XX2IFORM(name, opc2, opc3, fl2) \
> > +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 1, PPC_NONE, fl2), \
> > +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 1, PPC_NONE, fl2), \
> > +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 1, PPC_NONE, fl2), \
> > +GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 1, PPC_NONE, fl2)
> > +
> > #undef GEN_XX3_RC_FORM
> > #define GEN_XX3_RC_FORM(name, opc2, opc3, fl2) \
> > GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x00, opc3 | 0x00, 0, PPC_NONE, fl2), \
> > @@ -10731,8 +10738,8 @@ GEN_XX3FORM(xsnmaddadp, 0x04, 0x14, PPC2_VSX),
> > GEN_XX3FORM(xsnmaddmdp, 0x04, 0x15, PPC2_VSX),
> > GEN_XX3FORM(xsnmsubadp, 0x04, 0x16, PPC2_VSX),
> > GEN_XX3FORM(xsnmsubmdp, 0x04, 0x17, PPC2_VSX),
> > -GEN_XX2FORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
> > -GEN_XX2FORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
> > +GEN_XX2IFORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
> > +GEN_XX2IFORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
>
> According to PowerISA 2.07, xscmpodp and xscmpudp are of type XX3, not
> of type XX2 ... so should this macro maybe rather be named XX3IFORM instead?
Indeed, I have chosen the name without actually realizing the manual
also give names. Then I do wonder if the lower bit is really decoded as
invalid, I wouldn't be surprised it is actually just ignored.
I'll try to do some tests on real hardware and come up with a fixup
patch.
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2015-09-22 21:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-13 21:03 [Qemu-devel] [PATCH 0/2] target-ppc: vector instruction fixes Aurelien Jarno
2015-09-13 21:03 ` [Qemu-devel] [PATCH 1/2] target-ppc: fix vcipher, vcipherlast, vncipherlast and vpermxor Aurelien Jarno
2015-09-22 10:11 ` Thomas Huth
2015-09-13 21:03 ` [Qemu-devel] [PATCH 2/2] target-ppc: fix xscmpodp and xscmpudp decoding Aurelien Jarno
2015-09-20 14:46 ` Richard W.M. Jones
2015-09-22 10:26 ` Thomas Huth
2015-09-22 21:28 ` Aurelien Jarno [this message]
2015-09-23 11:12 ` Tom Musta
2015-09-17 4:58 ` [Qemu-devel] [PATCH 0/2] target-ppc: vector instruction fixes Richard Henderson
2015-09-20 20:29 ` Alexander Graf
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