From: Brian Norris <computersforpeace@gmail.com>
To: Anup Patel <anup.patel@broadcom.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Scott Branden <sbranden@broadcom.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
David Woodhouse <dwmw2@infradead.org>,
Ray Jui <rjui@broadcom.com>, Pramod Kumar <pramodku@broadcom.com>,
Vikram Prakash <vikramp@broadcom.com>,
Sandeep Tripathy <tripathy@broadcom.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
Rafal Milecki <zajec5@gmail.com>
Subject: Re: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller
Date: Mon, 12 Oct 2015 14:27:42 -0700 [thread overview]
Message-ID: <20151012212742.GQ107187@google.com> (raw)
In-Reply-To: <39063E8F96E11742B35A201CC5D095B7AD8ADD@SJEXCHMB10.corp.ad.broadcom.com>
Hi Anup,
On Wed, Oct 07, 2015 at 03:33:50AM +0000, Anup Patel wrote:
> > -----Original Message-----
> > From: Florian Fainelli [mailto:f.fainelli@gmail.com]
> >
> > On 06/10/15 15:25, Scott Branden wrote:
> >
> > Then instead of adding a "reset flag" to Device Tree, another approach could be
> > to put the desired or currently configured exhaustive list of NAND timings in
> > Device Tree, and based on that you could have this:
> >
> > - the NAND controller driver finds that these timings match the current
> > configuration, you are good to go
> >
> > - the NAND controller drivers finds a difference in how current timings are
> > configured vs. desired timings, and issues a controller reset, prior to applying
> > new timing configuration
>
> To add to this ...
>
> The mechanism to reset is BRCM NAND controller is SOC specific so the
> SoC independent BRCM NAND driver (i.e. brcmnand.c) does not know how
> to reset the NAND controller.
>
> For iProc SoC family, the NAND controller reset is through IDM register
> space which is only iomap'ed by iproc_nand.c.
>
> We might end-up having one more SoC specific callback which will be
> Provided by iproc_nand.c to brcmnand.c.
>
> >
> > - no timings are configured, reset the controller and use existing auto-detection
> > capabilities like ONFI modes
> >
> > Typically you would put the desired timings instead of the currently configured
> > timings though..
>
> Overall, it would good to support timing parameters through DT or ONFI but
> for now have we can rely on reset and auto-devid configuration.
I don't want to support a DT property that is only used as a workaround
for the right solution. That means the property may quickly become
obsolete, yet we have to support it forever.
> > >> compatible = "brcm,iproc-nand-ns2", ...;
> > >>
> > > As described above - the option is not SoC specific. It is system
> > > specific. In some systems we may wish to reset the NAND controller in
> > > linux. In some we may wish to rely on initialization that has already
> > > been done to speed up boot times.
> >
> > It seems to me like having this property is fine as long as you are describing that
> > the controller *needs* a reset to operate properly, it does not strike me as a
> > particularly well suited property if its side effect and main usage is to keep or
> > wipe-out existing NAND timings.
>
> IMHO, having SoC specific compatible string for NS2 is like saying
> NAND controller on NS2 is different from other iProc SoCs whereas
> Having optional DT flags for quirks/work-arounds (e.g. NAND controller
> reset) is like saying NAND controller on NS2 same as other iProc SoCs
> but some additional programming is required.
OK... so what is the reason that you have to reset the controller on NS2
and not Cygnus? Is it a SoC difference (i.e., compatible string)?
Firmware/bootloader difference? So far, all statements have been
non-specific, AFAICT.
Brian
WARNING: multiple messages have this Message-ID (diff)
From: computersforpeace@gmail.com (Brian Norris)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller
Date: Mon, 12 Oct 2015 14:27:42 -0700 [thread overview]
Message-ID: <20151012212742.GQ107187@google.com> (raw)
In-Reply-To: <39063E8F96E11742B35A201CC5D095B7AD8ADD@SJEXCHMB10.corp.ad.broadcom.com>
Hi Anup,
On Wed, Oct 07, 2015 at 03:33:50AM +0000, Anup Patel wrote:
> > -----Original Message-----
> > From: Florian Fainelli [mailto:f.fainelli at gmail.com]
> >
> > On 06/10/15 15:25, Scott Branden wrote:
> >
> > Then instead of adding a "reset flag" to Device Tree, another approach could be
> > to put the desired or currently configured exhaustive list of NAND timings in
> > Device Tree, and based on that you could have this:
> >
> > - the NAND controller driver finds that these timings match the current
> > configuration, you are good to go
> >
> > - the NAND controller drivers finds a difference in how current timings are
> > configured vs. desired timings, and issues a controller reset, prior to applying
> > new timing configuration
>
> To add to this ...
>
> The mechanism to reset is BRCM NAND controller is SOC specific so the
> SoC independent BRCM NAND driver (i.e. brcmnand.c) does not know how
> to reset the NAND controller.
>
> For iProc SoC family, the NAND controller reset is through IDM register
> space which is only iomap'ed by iproc_nand.c.
>
> We might end-up having one more SoC specific callback which will be
> Provided by iproc_nand.c to brcmnand.c.
>
> >
> > - no timings are configured, reset the controller and use existing auto-detection
> > capabilities like ONFI modes
> >
> > Typically you would put the desired timings instead of the currently configured
> > timings though..
>
> Overall, it would good to support timing parameters through DT or ONFI but
> for now have we can rely on reset and auto-devid configuration.
I don't want to support a DT property that is only used as a workaround
for the right solution. That means the property may quickly become
obsolete, yet we have to support it forever.
> > >> compatible = "brcm,iproc-nand-ns2", ...;
> > >>
> > > As described above - the option is not SoC specific. It is system
> > > specific. In some systems we may wish to reset the NAND controller in
> > > linux. In some we may wish to rely on initialization that has already
> > > been done to speed up boot times.
> >
> > It seems to me like having this property is fine as long as you are describing that
> > the controller *needs* a reset to operate properly, it does not strike me as a
> > particularly well suited property if its side effect and main usage is to keep or
> > wipe-out existing NAND timings.
>
> IMHO, having SoC specific compatible string for NS2 is like saying
> NAND controller on NS2 is different from other iProc SoCs whereas
> Having optional DT flags for quirks/work-arounds (e.g. NAND controller
> reset) is like saying NAND controller on NS2 same as other iProc SoCs
> but some additional programming is required.
OK... so what is the reason that you have to reset the controller on NS2
and not Cygnus? Is it a SoC difference (i.e., compatible string)?
Firmware/bootloader difference? So far, all statements have been
non-specific, AFAICT.
Brian
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Cc: Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Pramod Kumar <pramodku-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Vikram Prakash <vikramp-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Sandeep Tripathy
<tripathy-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
bcm-kernel-feedback-list
<bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Rafal
Subject: Re: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller
Date: Mon, 12 Oct 2015 14:27:42 -0700 [thread overview]
Message-ID: <20151012212742.GQ107187@google.com> (raw)
In-Reply-To: <39063E8F96E11742B35A201CC5D095B7AD8ADD-HXj2mutaA2qau4nib9vn7Zr/X4hKkxxPpWgKQ6/u3Fg@public.gmane.org>
Hi Anup,
On Wed, Oct 07, 2015 at 03:33:50AM +0000, Anup Patel wrote:
> > -----Original Message-----
> > From: Florian Fainelli [mailto:f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org]
> >
> > On 06/10/15 15:25, Scott Branden wrote:
> >
> > Then instead of adding a "reset flag" to Device Tree, another approach could be
> > to put the desired or currently configured exhaustive list of NAND timings in
> > Device Tree, and based on that you could have this:
> >
> > - the NAND controller driver finds that these timings match the current
> > configuration, you are good to go
> >
> > - the NAND controller drivers finds a difference in how current timings are
> > configured vs. desired timings, and issues a controller reset, prior to applying
> > new timing configuration
>
> To add to this ...
>
> The mechanism to reset is BRCM NAND controller is SOC specific so the
> SoC independent BRCM NAND driver (i.e. brcmnand.c) does not know how
> to reset the NAND controller.
>
> For iProc SoC family, the NAND controller reset is through IDM register
> space which is only iomap'ed by iproc_nand.c.
>
> We might end-up having one more SoC specific callback which will be
> Provided by iproc_nand.c to brcmnand.c.
>
> >
> > - no timings are configured, reset the controller and use existing auto-detection
> > capabilities like ONFI modes
> >
> > Typically you would put the desired timings instead of the currently configured
> > timings though..
>
> Overall, it would good to support timing parameters through DT or ONFI but
> for now have we can rely on reset and auto-devid configuration.
I don't want to support a DT property that is only used as a workaround
for the right solution. That means the property may quickly become
obsolete, yet we have to support it forever.
> > >> compatible = "brcm,iproc-nand-ns2", ...;
> > >>
> > > As described above - the option is not SoC specific. It is system
> > > specific. In some systems we may wish to reset the NAND controller in
> > > linux. In some we may wish to rely on initialization that has already
> > > been done to speed up boot times.
> >
> > It seems to me like having this property is fine as long as you are describing that
> > the controller *needs* a reset to operate properly, it does not strike me as a
> > particularly well suited property if its side effect and main usage is to keep or
> > wipe-out existing NAND timings.
>
> IMHO, having SoC specific compatible string for NS2 is like saying
> NAND controller on NS2 is different from other iProc SoCs whereas
> Having optional DT flags for quirks/work-arounds (e.g. NAND controller
> reset) is like saying NAND controller on NS2 same as other iProc SoCs
> but some additional programming is required.
OK... so what is the reason that you have to reset the controller on NS2
and not Cygnus? Is it a SoC difference (i.e., compatible string)?
Firmware/bootloader difference? So far, all statements have been
non-specific, AFAICT.
Brian
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next prev parent reply other threads:[~2015-10-12 21:27 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 17:56 [PATCH 0/5] NAND support for Broadcom NS2 SoC Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` [PATCH 1/5] mtd: brcmnand: Fix pointer type-cast in brcmnand_write() Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-12 21:20 ` Brian Norris
2015-10-12 21:20 ` Brian Norris
2015-10-12 21:20 ` Brian Norris
2015-10-02 17:56 ` [PATCH 2/5] mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64 Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-12 21:20 ` Brian Norris
2015-10-12 21:20 ` Brian Norris
2015-10-02 17:56 ` [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-04 21:49 ` Brian Norris
2015-10-04 21:49 ` Brian Norris
2015-10-05 6:27 ` Anup Patel
2015-10-05 6:27 ` Anup Patel
2015-10-05 6:27 ` Anup Patel
2015-10-06 13:41 ` Brian Norris
2015-10-06 13:41 ` Brian Norris
2015-10-06 13:41 ` Brian Norris
2015-10-06 22:25 ` Scott Branden
2015-10-06 22:25 ` Scott Branden
2015-10-06 23:20 ` Florian Fainelli
2015-10-06 23:20 ` Florian Fainelli
2015-10-06 23:20 ` Florian Fainelli
2015-10-07 3:33 ` Anup Patel
2015-10-07 3:33 ` Anup Patel
2015-10-07 3:33 ` Anup Patel
2015-10-12 21:27 ` Brian Norris [this message]
2015-10-12 21:27 ` Brian Norris
2015-10-12 21:27 ` Brian Norris
2015-10-16 6:46 ` Anup Patel
2015-10-16 6:46 ` Anup Patel
2015-10-16 6:46 ` Anup Patel
2015-10-12 21:54 ` Josh Cartwright
2015-10-12 21:54 ` Josh Cartwright
2015-10-12 21:54 ` Josh Cartwright
2015-10-13 17:35 ` Florian Fainelli
2015-10-13 17:35 ` Florian Fainelli
2015-10-13 17:35 ` Florian Fainelli
2015-10-02 17:56 ` [PATCH 4/5] Documentation: dt-bindings: Add info about brcm, nand-iproc-reset DT flag Anup Patel
2015-10-02 17:56 ` [PATCH 4/5] Documentation: dt-bindings: Add info about brcm,nand-iproc-reset " Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` [PATCH 4/5] Documentation: dt-bindings: Add info about brcm, nand-iproc-reset " Anup Patel
2015-10-02 17:56 ` [PATCH 5/5] arm64: dts: Add BRCM IPROC NAND DT node for NS2 Anup Patel
2015-10-02 17:56 ` Anup Patel
2015-10-02 17:56 ` Anup Patel
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