From: "Lluís Vilanova" <vilanova@ac.upc.edu>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Guan Xuetao <gxt@mprc.pku.edu.cn>,
Eduardo Habkost <ehabkost@redhat.com>,
Stefan Hajnoczi <stefanha@gmail.com>,
Anthony Green <green@moxielogic.com>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Jia Liu <proljc@gmail.com>, Alexander Graf <agraf@suse.de>,
Blue Swirl <blauwirbel@gmail.com>,
Max Filippov <jcmvbkbc@gmail.com>,
Michael Walle <michael@walle.cc>,
"open list:PowerPC" <qemu-ppc@nongnu.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Leon Alrae <leon.alrae@imgtec.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCHv16/8] exec: [tcg] Track which vCPU is performing translation and execution
Date: Tue, 13 Oct 2015 19:10:55 +0200 [thread overview]
Message-ID: <20151013171055.21325.77814.stgit@localhost> (raw)
In-Reply-To: <20151013171020.21325.27626.stgit@localhost>
Information is tracked inside the TCGContext structure.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
---
target-alpha/translate.c | 1 +
target-arm/translate.c | 1 +
target-cris/translate.c | 1 +
target-cris/translate_v10.c | 1 +
target-i386/translate.c | 1 +
target-lm32/translate.c | 1 +
target-m68k/translate.c | 1 +
target-microblaze/translate.c | 1 +
target-mips/translate.c | 1 +
target-moxie/translate.c | 1 +
target-openrisc/translate.c | 1 +
target-ppc/translate.c | 1 +
target-s390x/translate.c | 1 +
target-sh4/translate.c | 1 +
target-sparc/translate.c | 1 +
target-tilegx/translate.c | 1 +
target-tricore/translate.c | 1 +
target-unicore32/translate.c | 1 +
target-xtensa/translate.c | 1 +
tcg/tcg.h | 4 ++++
translate-all.c | 2 ++
21 files changed, 25 insertions(+)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 6154519..9395813 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -148,6 +148,7 @@ void alpha_translate_init(void)
done_init = 1;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < 31; i++) {
cpu_std_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 7dc7862..61803ca 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -87,6 +87,7 @@ void arm_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < 16; i++) {
cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 9dd5c5f..576a5c6 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3355,6 +3355,7 @@ void cris_initialize_tcg(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cc_x = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_x), "cc_x");
cc_src = tcg_global_mem_new(TCG_AREG0,
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
index 3ab1c39..1ef8995 100644
--- a/target-cris/translate_v10.c
+++ b/target-cris/translate_v10.c
@@ -1249,6 +1249,7 @@ void cris_initialize_crisv10_tcg(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cc_x = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_x), "cc_x");
cc_src = tcg_global_mem_new(TCG_AREG0,
diff --git a/target-i386/translate.c b/target-i386/translate.c
index e191224..c304c87 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7818,6 +7818,7 @@ void optimize_flags_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUX86State, cc_op), "cc_op");
cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_dst),
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 45abe53..a74847d 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1184,6 +1184,7 @@ void lm32_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e3ee9e0..a3f03b7 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -91,6 +91,7 @@ void m68k_tcg_init(void)
"EXCEPTION");
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
p = cpu_reg_names;
for (i = 0; i < 8; i++) {
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 6b0915e..2d73b64 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1862,6 +1862,7 @@ void mb_tcg_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
env_debug = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUMBState, debug),
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 9ffb100..dc44458 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19783,6 +19783,7 @@ void mips_tcg_init(void)
return;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
TCGV_UNUSED(cpu_gpr[0]);
for (i = 1; i < 32; i++)
cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index f8c70cb..08acd07 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -109,6 +109,7 @@ void moxie_translate_init(void)
return;
}
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUMoxieState, pc), "$pc");
for (i = 0; i < 16; i++)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index c122c20..7cb352f 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -77,6 +77,7 @@ void openrisc_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_sr = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUOpenRISCState, sr), "sr");
env_flags = tcg_global_mem_new_i32(TCG_AREG0,
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ff40c6b..78e763f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -85,6 +85,7 @@ void ppc_translate_init(void)
return;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
p = cpu_reg_names;
cpu_reg_names_size = sizeof(cpu_reg_names);
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 7e549d8..76f4cef 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -166,6 +166,7 @@ void s390x_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
psw_addr = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUS390XState, psw.addr),
"psw_addr");
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 7fb4900..5d6c1ec 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -98,6 +98,7 @@ void sh4_translate_init(void)
return;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < 24; i++)
cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 3d5d150..5bdf285 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5344,6 +5344,7 @@ void gen_intermediate_code_init(CPUSPARCState *env)
inited = 1;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_regwptr = tcg_global_mem_new_ptr(TCG_AREG0,
offsetof(CPUSPARCState, regwptr),
"regwptr");
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 0cd6700..23e4d1a 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -2434,6 +2434,7 @@ void tilegx_tcg_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_pc = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUTLGState, pc), "pc");
for (i = 0; i < TILEGX_R_COUNT; i++) {
cpu_regs[i] = tcg_global_mem_new_i64(TCG_AREG0,
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 655db75..a56bf2c 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8366,6 +8366,7 @@ void tricore_tcg_init(void)
return;
}
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
/* reg init */
for (i = 0 ; i < 16 ; i++) {
cpu_gpr_a[i] = tcg_global_mem_new(TCG_AREG0,
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 6ba52c2..7d68232 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -72,6 +72,7 @@ void uc32_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
for (i = 0; i < 32; i++) {
cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index c6d7658..b4a00c1 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -217,6 +217,7 @@ void xtensa_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ tcg_ctx.tcg_env = cpu_env;
cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUXtensaState, pc), "pc");
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 1585551..92d4604 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -572,6 +572,10 @@ struct TCGContext {
TBContext tb_ctx;
+ /* Track vCPU triggering events */
+ CPUState *cpu; /* *_trans */
+ TCGv_cpu tcg_env; /* *_exec */
+
/* The TCGBackendData structure is private to tcg-target.c. */
struct TCGBackendData *be;
diff --git a/translate-all.c b/translate-all.c
index 5df7da5..5ae64d6 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1203,6 +1203,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
ti = profile_getclock();
#endif
+ tcg_ctx.cpu = ENV_GET_CPU(env);
+
tcg_func_start(&tcg_ctx);
gen_intermediate_code(env, tb);
next prev parent reply other threads:[~2015-10-13 17:11 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-13 17:10 [Qemu-devel] [RFC][PATCHv10/8] trace: Per-vCPU tracing states Lluís Vilanova
2015-10-13 17:10 ` [Qemu-devel] [PATCHv11/8] trace: Add support for vCPU pointers in trace events Lluís Vilanova
2015-10-16 9:13 ` Stefan Hajnoczi
2015-10-16 15:12 ` Eduardo Habkost
2015-10-16 15:44 ` Lluís Vilanova
2015-10-13 17:10 ` [Qemu-devel] [PATCHv12/8] trace: Add 'vcpu' event property Lluís Vilanova
2015-10-16 9:16 ` Stefan Hajnoczi
2015-10-16 15:45 ` Lluís Vilanova
2015-10-13 17:10 ` [Qemu-devel] [PATCHv13/8] trace: [tcg] Identify events with the 'vcpu' property Lluís Vilanova
2015-10-13 17:33 ` Eric Blake
2015-10-13 18:27 ` Lluís Vilanova
2015-10-13 18:57 ` Markus Armbruster
2015-10-13 17:10 ` [Qemu-devel] [PATCHv14/8] exec: [tcg] Refactor flush of per-CPU virtual TB cache Lluís Vilanova
2015-10-13 17:10 ` [Qemu-devel] [PATCHv15/8] exec: [ŧcg] Use multiple physical TB caches Lluís Vilanova
2015-10-13 17:10 ` Lluís Vilanova [this message]
2015-10-13 17:11 ` [Qemu-devel] [PATCHv17/8] [trivial] Track when QEMU has finished initialization Lluís Vilanova
2015-10-13 18:56 ` Markus Armbruster
2015-10-13 17:11 ` [Qemu-devel] [PATCHv18/8] trace: [tcg] Add per-vCPU tracing states for events with the 'vcpu' property Lluís Vilanova
2015-10-13 17:50 ` Eric Blake
2015-10-13 19:43 ` Lluís Vilanova
2015-10-16 9:19 ` Stefan Hajnoczi
2015-10-16 15:42 ` Lluís Vilanova
2015-10-13 17:26 ` [Qemu-devel] [RFC][PATCHv10/8] trace: Per-vCPU tracing states Lluís Vilanova
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151013171055.21325.77814.stgit@localhost \
--to=vilanova@ac.upc.edu \
--cc=agraf@suse.de \
--cc=aurelien@aurel32.net \
--cc=blauwirbel@gmail.com \
--cc=edgar.iglesias@gmail.com \
--cc=ehabkost@redhat.com \
--cc=green@moxielogic.com \
--cc=gxt@mprc.pku.edu.cn \
--cc=jcmvbkbc@gmail.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=leon.alrae@imgtec.com \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=michael@walle.cc \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=proljc@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=rth@twiddle.net \
--cc=stefanha@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.