diff for duplicates of <20151021092550.20687.52171@quantum> diff --git a/a/1.txt b/N1/1.txt index 8712b0a..a5395d0 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,39 +1,27 @@ Quoting Grygorii Strashko (2015-10-20 13:59:19) > Hi Mike, All, -> = - +> > [not for merge] -> = - +> > As we discussed I've prepared patch which introduces config option -> COMMON_CLK_USE_RAW_LOCKS which, once enabled, switches CCF to use raw loc= -ks -> for locking=E2=80=8B. This way it will be possible to call clk_enable()/c= -lk_disable() +> COMMON_CLK_USE_RAW_LOCKS which, once enabled, switches CCF to use raw locks +> for locking. This way it will be possible to call clk_enable()/clk_disable() > from atomic context on -RT [1]. -> Unfortunately (and as expected [2]), if COMMON_CLK_USE_RAW_LOCKS is enebl= -ed -> it starts raising issues with TI's clock drivers (and this is like a aval= -anche): -> - some TI drivers calls platform specific code which, in turn, uses spinl= -ocks; +> Unfortunately (and as expected [2]), if COMMON_CLK_USE_RAW_LOCKS is enebled +> it starts raising issues with TI's clock drivers (and this is like a avalanche): +> - some TI drivers calls platform specific code which, in turn, uses spinlocks; > - one driver is implemented using MMIO regmap which uses spinlocks. -> = - +> > As result, to get a complete solution I've had to make more patches: > regmap: use raw locks for locking > ARM: OMAP2+: powerdomain: use raw locks for locking > clk: ti: drop locking code from mux/divider drivers > clk: use raw locks for locking -> = - +> > This solution requires the use of raw locks in many places of kernel, -> and it's bad for the -RT. For example, regmap is used by only one TI's cl= -ock, -> but after switching to use raw locks it will affect also on all drivers w= -hich -> use 'syscon'. = - +> and it's bad for the -RT. For example, regmap is used by only one TI's clock, +> but after switching to use raw locks it will affect also on all drivers which +> use 'syscon'. Well that does sound like a clusterfuck. Out of curiosity, where do you need to call clk_enable/clk_disable from atomic context? @@ -48,54 +36,43 @@ different in the -rt world. So it would be helpful for me to get a better understanding of some examples of where things are going wrong for you. -> = - +> > So, it seems that in many cases it might be more simple to just move > clk_enable()/clk_disable() calls out of atomic context :) -> = - +> > FYI: Complete set of patches (based on v4.1.10-rt10) can be found at: > - git@git.ti.com:~gragst/ti-linux-kernel/gragsts-ti-linux-kernel.git > - branch: linux-4.1.y-rt-10-clk-raw-lock -> = - -> [1] http://marc.info/?l=3Dlinux-rt-users&m=3D143937432529680&w=3D2 -> [2] http://marc.info/?l=3Dlinux-rt-users&m=3D144284086804316&w=3D2 -> = - +> +> [1] http://marc.info/?l=linux-rt-users&m=143937432529680&w=2 +> [2] http://marc.info/?l=linux-rt-users&m=144284086804316&w=2 +> > --------------------------------------------------------------------- > This patch optionally allows CCF core to use raw locks in clk_enable()/ > clk_disable() path. Also, convert generic clock drivers in > the similar way (clk-divider, clk-fractional-divider, > clk-gate, clk-mux). -> = - +> > This patch introduces Kconfig option COMMON_CLK_USE_RAW_LOCKS. > Once enabled, COMMON_CLK_USE_RAW_LOCKS will switch the common clock > framework to use raw locks for locking and, this way, makes it > possible to call clk_enable()/clk_disable() from atomic context. -> = - +> > This fixes backtrace like: -> BUG: sleeping function called from invalid context at kernel/locking/rtmu= -tex.c:917 +> BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 > in_atomic(): 1, irqs_disabled(): 128, pid: 128, name: sh > 4 locks held by sh/128: > #0: (sb_writers#4){.+.+.+}, at: [<c019d44c>] vfs_write+0x13c/0x164 > #1: (&of->mutex){+.+.+.}, at: [<c0214bbc>] kernfs_fop_write+0x48/0x19c > #2: (s_active#33){.+.+.+}, at: [<c0214bc4>] kernfs_fop_write+0x50/0x19c -> #3: (&bank->lock){......}, at: [<c0405424>] omap_gpio_debounce+0x1c/0x1= -20 +> #3: (&bank->lock){......}, at: [<c0405424>] omap_gpio_debounce+0x1c/0x120 > irq event stamp: 3532 > hardirqs last enabled at (3531): [<c0186ffc>] kfree+0xf8/0x464 -> hardirqs last disabled at (3532): [<c06a0ef0>] _raw_spin_lock_irqsave+0x1= -c/0x54 -> softirqs last enabled at (0): [<c004572c>] copy_process.part.54+0x3f4/0x= -1930 +> hardirqs last disabled at (3532): [<c06a0ef0>] _raw_spin_lock_irqsave+0x1c/0x54 +> softirqs last enabled at (0): [<c004572c>] copy_process.part.54+0x3f4/0x1930 > softirqs last disabled at (0): [< (null)>] (null) > Preemption disabled at:[< (null)>] (null) -> = - +> > CPU: 1 PID: 128 Comm: sh Not tainted 4.1.9-rt8-01685-g0660ad10-dirty #39 > Hardware name: Generic DRA74X (Flattened Device Tree) > [<c0019148>] (unwind_backtrace) from [<c00144b0>] (show_stack+0x10/0x14) @@ -103,12 +80,9 @@ c/0x54 > [<c069b4dc>] (dump_stack) from [<c06a148c>] (rt_spin_lock+0x20/0x60) > [<c06a148c>] (rt_spin_lock) from [<c056cb6c>] (clk_enable_lock+0x14/0xb0) > [<c056cb6c>] (clk_enable_lock) from [<c056fed8>] (clk_enable+0xc/0x2c) -> [<c056fed8>] (clk_enable) from [<c0405474>] (omap_gpio_debounce+0x6c/0x12= -0) -> [<c0405474>] (omap_gpio_debounce) from [<c0404034>] (export_store+0x70/0x= -fc) -> [<c0404034>] (export_store) from [<c0214c2c>] (kernfs_fop_write+0xb8/0x19= -c) +> [<c056fed8>] (clk_enable) from [<c0405474>] (omap_gpio_debounce+0x6c/0x120) +> [<c0405474>] (omap_gpio_debounce) from [<c0404034>] (export_store+0x70/0xfc) +> [<c0404034>] (export_store) from [<c0214c2c>] (kernfs_fop_write+0xb8/0x19c) > [<c0214c2c>] (kernfs_fop_write) from [<c019cb00>] (__vfs_write+0x20/0xd8) > [<c019cb00>] (__vfs_write) from [<c019d3a0>] (vfs_write+0x90/0x164) > [<c019d3a0>] (vfs_write) from [<c019dbc4>] (SyS_write+0x44/0x9c) @@ -128,8 +102,7 @@ sure to ask some dumb questions. Regards, Mike -> = - +> > Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> > --- > drivers/clk/Kconfig | 11 +++++++++++ @@ -138,11 +111,9 @@ Mike > drivers/clk/clk-gate.c | 6 +++--- > drivers/clk/clk-mux.c | 8 ++++---- > drivers/clk/clk.c | 12 +++++++++--- -> include/linux/clk-provider.h | 38 ++++++++++++++++++++++++++----= ------- +> include/linux/clk-provider.h | 38 ++++++++++++++++++++++++++---------- > 7 files changed, 65 insertions(+), 30 deletions(-) -> = - +> > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index 9897f35..458489d 100644 > --- a/drivers/clk/Kconfig @@ -150,8 +121,7 @@ Mike > @@ -24,6 +24,17 @@ config COMMON_CLK > menu "Common Clock Framework" > depends on COMMON_CLK -> = - +> > +config COMMON_CLK_USE_RAW_LOCKS > + bool "Use raw locks for locking on -rt (EXPERIMENTAL)" > + default n @@ -160,8 +130,7 @@ Mike > + This option switches the common clock framework to use raw locks > + for locking and, this way, makes it possible to call > + clk_enable()/clk_disable() from atomic context. -> + If unsure, do not use as it may affect on overall system stabil= -ity +> + If unsure, do not use as it may affect on overall system stability > + and -RT latencies. > + > config COMMON_CLK_WM831X @@ -171,32 +140,25 @@ ity > index 25006a8..66ad38a 100644 > --- a/drivers/clk/clk-divider.c > +++ b/drivers/clk/clk-divider.c -> @@ -388,7 +388,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, un= -signed long rate, +> @@ -388,7 +388,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, > divider->width, divider->flags); -> = - +> > if (divider->lock) > - spin_lock_irqsave(divider->lock, flags); > + clk_spin_lock_irqsave(divider->lock, flags); -> = - +> > if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { -> val =3D div_mask(divider->width) << (divider->shift + 16); -> @@ -400,7 +400,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, un= -signed long rate, +> val = div_mask(divider->width) << (divider->shift + 16); +> @@ -400,7 +400,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, > clk_writel(val, divider->reg); -> = - +> > if (divider->lock) > - spin_unlock_irqrestore(divider->lock, flags); > + clk_spin_unlock_irqrestore(divider->lock, flags); -> = - +> > return 0; > } -> @@ -416,7 +416,7 @@ static struct clk *_register_divider(struct device *d= -ev, const char *name, +> @@ -416,7 +416,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, > const char *parent_name, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > u8 clk_divider_flags, const struct clk_div_table *table, @@ -205,83 +167,65 @@ ev, const char *name, > { > struct clk_divider *div; > struct clk *clk; -> @@ -475,7 +475,7 @@ static struct clk *_register_divider(struct device *d= -ev, const char *name, +> @@ -475,7 +475,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, > struct clk *clk_register_divider(struct device *dev, const char *name, > const char *parent_name, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > - u8 clk_divider_flags, spinlock_t *lock) > + u8 clk_divider_flags, clk_spinlock_t *lock) > { -> return _register_divider(dev, name, parent_name, flags, reg, shif= -t, +> return _register_divider(dev, name, parent_name, flags, reg, shift, > width, clk_divider_flags, NULL, lock); -> @@ -500,7 +500,7 @@ struct clk *clk_register_divider_table(struct device = -*dev, const char *name, +> @@ -500,7 +500,7 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, > const char *parent_name, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > u8 clk_divider_flags, const struct clk_div_table *table, > - spinlock_t *lock) > + clk_spinlock_t *lock) > { -> return _register_divider(dev, name, parent_name, flags, reg, shif= -t, +> return _register_divider(dev, name, parent_name, flags, reg, shift, > width, clk_divider_flags, table, lock); -> diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fract= -ional-divider.c +> diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c > index 6aa72d9..9e4e1a1 100644 > --- a/drivers/clk/clk-fractional-divider.c > +++ b/drivers/clk/clk-fractional-divider.c -> @@ -26,12 +26,12 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw= - *hw, +> @@ -26,12 +26,12 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, > u64 ret; -> = - +> > if (fd->lock) > - spin_lock_irqsave(fd->lock, flags); > + clk_spin_lock_irqsave(fd->lock, flags); -> = - -> val =3D clk_readl(fd->reg); -> = - +> +> val = clk_readl(fd->reg); +> > if (fd->lock) > - spin_unlock_irqrestore(fd->lock, flags); > + clk_spin_unlock_irqrestore(fd->lock, flags); -> = - -> m =3D (val & fd->mmask) >> fd->mshift; -> n =3D (val & fd->nmask) >> fd->nshift; -> @@ -79,7 +79,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned = -long rate, -> n =3D parent_rate / div; -> = - +> +> m = (val & fd->mmask) >> fd->mshift; +> n = (val & fd->nmask) >> fd->nshift; +> @@ -79,7 +79,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, +> n = parent_rate / div; +> > if (fd->lock) > - spin_lock_irqsave(fd->lock, flags); > + clk_spin_lock_irqsave(fd->lock, flags); -> = - -> val =3D clk_readl(fd->reg); -> val &=3D ~(fd->mmask | fd->nmask); -> @@ -87,7 +87,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned = -long rate, +> +> val = clk_readl(fd->reg); +> val &= ~(fd->mmask | fd->nmask); +> @@ -87,7 +87,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, > clk_writel(val, fd->reg); -> = - +> > if (fd->lock) > - spin_unlock_irqrestore(fd->lock, flags); > + clk_spin_unlock_irqrestore(fd->lock, flags); -> = - +> > return 0; > } > @@ -102,7 +102,7 @@ EXPORT_SYMBOL_GPL(clk_fractional_divider_ops); > struct clk *clk_register_fractional_divider(struct device *dev, -> const char *name, const char *parent_name, unsigned long = -flags, -> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nw= -idth, +> const char *name, const char *parent_name, unsigned long flags, +> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, > - u8 clk_divider_flags, spinlock_t *lock) > + u8 clk_divider_flags, clk_spinlock_t *lock) > { @@ -291,29 +235,23 @@ idth, > index 3f0e420..a77cce6 100644 > --- a/drivers/clk/clk-gate.c > +++ b/drivers/clk/clk-gate.c -> @@ -51,7 +51,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int e= -nable) -> set ^=3D enable; -> = - +> @@ -51,7 +51,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable) +> set ^= enable; +> > if (gate->lock) > - spin_lock_irqsave(gate->lock, flags); > + clk_spin_lock_irqsave(gate->lock, flags); -> = - +> > if (gate->flags & CLK_GATE_HIWORD_MASK) { -> reg =3D BIT(gate->bit_idx + 16); -> @@ -69,7 +69,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int e= -nable) +> reg = BIT(gate->bit_idx + 16); +> @@ -69,7 +69,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable) > clk_writel(reg, gate->reg); -> = - +> > if (gate->lock) > - spin_unlock_irqrestore(gate->lock, flags); > + clk_spin_unlock_irqrestore(gate->lock, flags); > } -> = - +> > static int clk_gate_enable(struct clk_hw *hw) > @@ -121,7 +121,7 @@ EXPORT_SYMBOL_GPL(clk_gate_ops); > struct clk *clk_register_gate(struct device *dev, const char *name, @@ -328,34 +266,27 @@ nable) > index 69a094c..c4acb55 100644 > --- a/drivers/clk/clk-mux.c > +++ b/drivers/clk/clk-mux.c -> @@ -84,7 +84,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 ind= -ex) +> @@ -84,7 +84,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) > } -> = - +> > if (mux->lock) > - spin_lock_irqsave(mux->lock, flags); > + clk_spin_lock_irqsave(mux->lock, flags); -> = - +> > if (mux->flags & CLK_MUX_HIWORD_MASK) { -> val =3D mux->mask << (mux->shift + 16); -> @@ -96,7 +96,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 ind= -ex) +> val = mux->mask << (mux->shift + 16); +> @@ -96,7 +96,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) > clk_writel(val, mux->reg); -> = - +> > if (mux->lock) > - spin_unlock_irqrestore(mux->lock, flags); > + clk_spin_unlock_irqrestore(mux->lock, flags); -> = - +> > return 0; > } > @@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(clk_mux_ro_ops); > struct clk *clk_register_mux_table(struct device *dev, const char *name, -> const char **parent_names, u8 num_parents, unsigned long = -flags, +> const char **parent_names, u8 num_parents, unsigned long flags, > void __iomem *reg, u8 shift, u32 mask, > - u8 clk_mux_flags, u32 *table, spinlock_t *lock) > + u8 clk_mux_flags, u32 *table, clk_spinlock_t *lock) @@ -364,25 +295,21 @@ flags, > struct clk *clk; > @@ -168,7 +168,7 @@ EXPORT_SYMBOL_GPL(clk_register_mux_table); > struct clk *clk_register_mux(struct device *dev, const char *name, -> const char **parent_names, u8 num_parents, unsigned long = -flags, +> const char **parent_names, u8 num_parents, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > - u8 clk_mux_flags, spinlock_t *lock) > + u8 clk_mux_flags, clk_spinlock_t *lock) > { -> u32 mask =3D BIT(width) - 1; -> = - +> u32 mask = BIT(width) - 1; +> > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c > index 9f9cadd..6eb7f8a 100644 > --- a/drivers/clk/clk.c > +++ b/drivers/clk/clk.c > @@ -24,7 +24,12 @@ -> = - +> > #include "clk.h" -> = - +> > +#if defined(CONFIG_COMMON_CLK_USE_RAW_LOCKS) > +static DEFINE_RAW_SPINLOCK(enable_lock); > +#else /* PREEMPT_RT_FULL */ @@ -390,17 +317,15 @@ flags, > +#endif > + > static DEFINE_MUTEX(prepare_lock); -> = - +> > static struct task_struct *prepare_owner; > @@ -120,13 +125,14 @@ static unsigned long clk_enable_lock(void) > { > unsigned long flags; -> = - +> > - if (!spin_trylock_irqsave(&enable_lock, flags)) { > + if (!clk_spin_trylock_irqsave(&enable_lock, flags)) { -> if (enable_owner =3D=3D current) { +> if (enable_owner == current) { > enable_refcnt++; > return flags; > } @@ -408,30 +333,26 @@ flags, > + clk_spin_lock_irqsave(&enable_lock, flags); > } > + -> WARN_ON_ONCE(enable_owner !=3D NULL); -> WARN_ON_ONCE(enable_refcnt !=3D 0); -> enable_owner =3D current; +> WARN_ON_ONCE(enable_owner != NULL); +> WARN_ON_ONCE(enable_refcnt != 0); +> enable_owner = current; > @@ -142,7 +148,7 @@ static void clk_enable_unlock(unsigned long flags) > if (--enable_refcnt) > return; -> enable_owner =3D NULL; +> enable_owner = NULL; > - spin_unlock_irqrestore(&enable_lock, flags); > + clk_spin_unlock_irqrestore(&enable_lock, flags); > } -> = - +> > /*** debugfs support ***/ > diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h > index df69531..a0f5d74 100644 > --- a/include/linux/clk-provider.h > +++ b/include/linux/clk-provider.h -> @@ -266,6 +266,24 @@ struct clk *clk_register_fixed_rate_with_accuracy(st= -ruct device *dev, -> = - +> @@ -266,6 +266,24 @@ struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev, +> > void of_fixed_clk_setup(struct device_node *np); -> = - +> > +#if defined(CONFIG_COMMON_CLK_USE_RAW_LOCKS) > +typedef raw_spinlock_t clk_spinlock_t; > +#define clk_spin_lock_irqsave(lock, flags) \ @@ -460,8 +381,7 @@ ruct device *dev, > - spinlock_t *lock; > + clk_spinlock_t *lock; > }; -> = - +> > #define CLK_GATE_SET_TO_DISABLE BIT(0) > @@ -301,7 +319,7 @@ extern const struct clk_ops clk_gate_ops; > struct clk *clk_register_gate(struct device *dev, const char *name, @@ -470,8 +390,7 @@ ruct device *dev, > - u8 clk_gate_flags, spinlock_t *lock); > + u8 clk_gate_flags, clk_spinlock_t *lock); > void clk_unregister_gate(struct clk *clk); -> = - +> > struct clk_div_table { > @@ -350,7 +368,7 @@ struct clk_divider { > u8 width; @@ -480,26 +399,22 @@ ruct device *dev, > - spinlock_t *lock; > + clk_spinlock_t *lock; > }; -> = - +> > #define CLK_DIVIDER_ONE_BASED BIT(0) -> @@ -375,12 +393,12 @@ int divider_get_val(unsigned long rate, unsigned lo= -ng parent_rate, +> @@ -375,12 +393,12 @@ int divider_get_val(unsigned long rate, unsigned long parent_rate, > struct clk *clk_register_divider(struct device *dev, const char *name, > const char *parent_name, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > - u8 clk_divider_flags, spinlock_t *lock); > + u8 clk_divider_flags, clk_spinlock_t *lock); -> struct clk *clk_register_divider_table(struct device *dev, const char *n= -ame, +> struct clk *clk_register_divider_table(struct device *dev, const char *name, > const char *parent_name, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > u8 clk_divider_flags, const struct clk_div_table *table, > - spinlock_t *lock); > + clk_spinlock_t *lock); > void clk_unregister_divider(struct clk *clk); -> = - +> > /** > @@ -413,7 +431,7 @@ struct clk_mux { > u32 mask; @@ -508,29 +423,23 @@ ame, > - spinlock_t *lock; > + clk_spinlock_t *lock; > }; -> = - +> > #define CLK_MUX_INDEX_ONE BIT(0) > @@ -428,12 +446,12 @@ extern const struct clk_ops clk_mux_ro_ops; > struct clk *clk_register_mux(struct device *dev, const char *name, -> const char **parent_names, u8 num_parents, unsigned long = -flags, +> const char **parent_names, u8 num_parents, unsigned long flags, > void __iomem *reg, u8 shift, u8 width, > - u8 clk_mux_flags, spinlock_t *lock); > + u8 clk_mux_flags, clk_spinlock_t *lock); -> = - +> > struct clk *clk_register_mux_table(struct device *dev, const char *name, -> const char **parent_names, u8 num_parents, unsigned long = -flags, +> const char **parent_names, u8 num_parents, unsigned long flags, > void __iomem *reg, u8 shift, u32 mask, > - u8 clk_mux_flags, u32 *table, spinlock_t *lock); > + u8 clk_mux_flags, u32 *table, clk_spinlock_t *lock); -> = - +> > void clk_unregister_mux(struct clk *clk); -> = - +> > @@ -484,14 +502,14 @@ struct clk_fractional_divider { > u8 nshift; > u32 nmask; @@ -538,21 +447,16 @@ flags, > - spinlock_t *lock; > + clk_spinlock_t *lock; > }; -> = - +> > extern const struct clk_ops clk_fractional_divider_ops; > struct clk *clk_register_fractional_divider(struct device *dev, -> const char *name, const char *parent_name, unsigned long = -flags, -> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nw= -idth, +> const char *name, const char *parent_name, unsigned long flags, +> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, > - u8 clk_divider_flags, spinlock_t *lock); > + u8 clk_divider_flags, clk_spinlock_t *lock); -> = - +> > /*** > * struct clk_composite - aggregate clock of mux, divider and gate clocks -> -- = - +> -- > 2.5.1 ->=20 +> diff --git a/a/content_digest b/N1/content_digest index f85e097..cdc3d50 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -15,40 +15,28 @@ "b\0" "Quoting Grygorii Strashko (2015-10-20 13:59:19)\n" "> Hi Mike, All,\n" - "> =\n" - "\n" + "> \n" "> [not for merge]\n" - "> =\n" - "\n" + "> \n" "> As we discussed I've prepared patch which introduces config option\n" - "> COMMON_CLK_USE_RAW_LOCKS which, once enabled, switches CCF to use raw loc=\n" - "ks\n" - "> for locking=E2=80=8B. This way it will be possible to call clk_enable()/c=\n" - "lk_disable()\n" + "> COMMON_CLK_USE_RAW_LOCKS which, once enabled, switches CCF to use raw locks\n" + "> for locking\342\200\213. This way it will be possible to call clk_enable()/clk_disable()\n" "> from atomic context on -RT [1].\n" - "> Unfortunately (and as expected [2]), if COMMON_CLK_USE_RAW_LOCKS is enebl=\n" - "ed\n" - "> it starts raising issues with TI's clock drivers (and this is like a aval=\n" - "anche):\n" - "> - some TI drivers calls platform specific code which, in turn, uses spinl=\n" - "ocks;\n" + "> Unfortunately (and as expected [2]), if COMMON_CLK_USE_RAW_LOCKS is enebled\n" + "> it starts raising issues with TI's clock drivers (and this is like a avalanche):\n" + "> - some TI drivers calls platform specific code which, in turn, uses spinlocks;\n" "> - one driver is implemented using MMIO regmap which uses spinlocks.\n" - "> =\n" - "\n" + "> \n" "> As result, to get a complete solution I've had to make more patches:\n" "> regmap: use raw locks for locking\n" "> ARM: OMAP2+: powerdomain: use raw locks for locking\n" "> clk: ti: drop locking code from mux/divider drivers\n" "> clk: use raw locks for locking\n" - "> =\n" - "\n" + "> \n" "> This solution requires the use of raw locks in many places of kernel,\n" - "> and it's bad for the -RT. For example, regmap is used by only one TI's cl=\n" - "ock,\n" - "> but after switching to use raw locks it will affect also on all drivers w=\n" - "hich\n" - "> use 'syscon'. =\n" - "\n" + "> and it's bad for the -RT. For example, regmap is used by only one TI's clock,\n" + "> but after switching to use raw locks it will affect also on all drivers which\n" + "> use 'syscon'. \n" "\n" "Well that does sound like a clusterfuck. Out of curiosity, where do you\n" "need to call clk_enable/clk_disable from atomic context?\n" @@ -63,54 +51,43 @@ "better understanding of some examples of where things are going wrong\n" "for you.\n" "\n" - "> =\n" - "\n" + "> \n" "> So, it seems that in many cases it might be more simple to just move\n" "> clk_enable()/clk_disable() calls out of atomic context :)\n" - "> =\n" - "\n" + "> \n" "> FYI: Complete set of patches (based on v4.1.10-rt10) can be found at:\n" "> - git@git.ti.com:~gragst/ti-linux-kernel/gragsts-ti-linux-kernel.git\n" "> - branch: linux-4.1.y-rt-10-clk-raw-lock\n" - "> =\n" - "\n" - "> [1] http://marc.info/?l=3Dlinux-rt-users&m=3D143937432529680&w=3D2\n" - "> [2] http://marc.info/?l=3Dlinux-rt-users&m=3D144284086804316&w=3D2\n" - "> =\n" - "\n" + "> \n" + "> [1] http://marc.info/?l=linux-rt-users&m=143937432529680&w=2\n" + "> [2] http://marc.info/?l=linux-rt-users&m=144284086804316&w=2\n" + "> \n" "> ---------------------------------------------------------------------\n" "> This patch optionally allows CCF core to use raw locks in clk_enable()/\n" "> clk_disable() path. Also, convert generic clock drivers in\n" "> the similar way (clk-divider, clk-fractional-divider,\n" "> clk-gate, clk-mux).\n" - "> =\n" - "\n" + "> \n" "> This patch introduces Kconfig option COMMON_CLK_USE_RAW_LOCKS.\n" "> Once enabled, COMMON_CLK_USE_RAW_LOCKS will switch the common clock\n" "> framework to use raw locks for locking and, this way, makes it\n" "> possible to call clk_enable()/clk_disable() from atomic context.\n" - "> =\n" - "\n" + "> \n" "> This fixes backtrace like:\n" - "> BUG: sleeping function called from invalid context at kernel/locking/rtmu=\n" - "tex.c:917\n" + "> BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917\n" "> in_atomic(): 1, irqs_disabled(): 128, pid: 128, name: sh\n" "> 4 locks held by sh/128:\n" "> #0: (sb_writers#4){.+.+.+}, at: [<c019d44c>] vfs_write+0x13c/0x164\n" "> #1: (&of->mutex){+.+.+.}, at: [<c0214bbc>] kernfs_fop_write+0x48/0x19c\n" "> #2: (s_active#33){.+.+.+}, at: [<c0214bc4>] kernfs_fop_write+0x50/0x19c\n" - "> #3: (&bank->lock){......}, at: [<c0405424>] omap_gpio_debounce+0x1c/0x1=\n" - "20\n" + "> #3: (&bank->lock){......}, at: [<c0405424>] omap_gpio_debounce+0x1c/0x120\n" "> irq event stamp: 3532\n" "> hardirqs last enabled at (3531): [<c0186ffc>] kfree+0xf8/0x464\n" - "> hardirqs last disabled at (3532): [<c06a0ef0>] _raw_spin_lock_irqsave+0x1=\n" - "c/0x54\n" - "> softirqs last enabled at (0): [<c004572c>] copy_process.part.54+0x3f4/0x=\n" - "1930\n" + "> hardirqs last disabled at (3532): [<c06a0ef0>] _raw_spin_lock_irqsave+0x1c/0x54\n" + "> softirqs last enabled at (0): [<c004572c>] copy_process.part.54+0x3f4/0x1930\n" "> softirqs last disabled at (0): [< (null)>] (null)\n" "> Preemption disabled at:[< (null)>] (null)\n" - "> =\n" - "\n" + "> \n" "> CPU: 1 PID: 128 Comm: sh Not tainted 4.1.9-rt8-01685-g0660ad10-dirty #39\n" "> Hardware name: Generic DRA74X (Flattened Device Tree)\n" "> [<c0019148>] (unwind_backtrace) from [<c00144b0>] (show_stack+0x10/0x14)\n" @@ -118,12 +95,9 @@ "> [<c069b4dc>] (dump_stack) from [<c06a148c>] (rt_spin_lock+0x20/0x60)\n" "> [<c06a148c>] (rt_spin_lock) from [<c056cb6c>] (clk_enable_lock+0x14/0xb0)\n" "> [<c056cb6c>] (clk_enable_lock) from [<c056fed8>] (clk_enable+0xc/0x2c)\n" - "> [<c056fed8>] (clk_enable) from [<c0405474>] (omap_gpio_debounce+0x6c/0x12=\n" - "0)\n" - "> [<c0405474>] (omap_gpio_debounce) from [<c0404034>] (export_store+0x70/0x=\n" - "fc)\n" - "> [<c0404034>] (export_store) from [<c0214c2c>] (kernfs_fop_write+0xb8/0x19=\n" - "c)\n" + "> [<c056fed8>] (clk_enable) from [<c0405474>] (omap_gpio_debounce+0x6c/0x120)\n" + "> [<c0405474>] (omap_gpio_debounce) from [<c0404034>] (export_store+0x70/0xfc)\n" + "> [<c0404034>] (export_store) from [<c0214c2c>] (kernfs_fop_write+0xb8/0x19c)\n" "> [<c0214c2c>] (kernfs_fop_write) from [<c019cb00>] (__vfs_write+0x20/0xd8)\n" "> [<c019cb00>] (__vfs_write) from [<c019d3a0>] (vfs_write+0x90/0x164)\n" "> [<c019d3a0>] (vfs_write) from [<c019dbc4>] (SyS_write+0x44/0x9c)\n" @@ -143,8 +117,7 @@ "Regards,\n" "Mike\n" "\n" - "> =\n" - "\n" + "> \n" "> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>\n" "> ---\n" "> drivers/clk/Kconfig | 11 +++++++++++\n" @@ -153,11 +126,9 @@ "> drivers/clk/clk-gate.c | 6 +++---\n" "> drivers/clk/clk-mux.c | 8 ++++----\n" "> drivers/clk/clk.c | 12 +++++++++---\n" - "> include/linux/clk-provider.h | 38 ++++++++++++++++++++++++++----=\n" - "------\n" + "> include/linux/clk-provider.h | 38 ++++++++++++++++++++++++++----------\n" "> 7 files changed, 65 insertions(+), 30 deletions(-)\n" - "> =\n" - "\n" + "> \n" "> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig\n" "> index 9897f35..458489d 100644\n" "> --- a/drivers/clk/Kconfig\n" @@ -165,8 +136,7 @@ "> @@ -24,6 +24,17 @@ config COMMON_CLK\n" "> menu \"Common Clock Framework\"\n" "> depends on COMMON_CLK\n" - "> =\n" - "\n" + "> \n" "> +config COMMON_CLK_USE_RAW_LOCKS\n" "> + bool \"Use raw locks for locking on -rt (EXPERIMENTAL)\"\n" "> + default n\n" @@ -175,8 +145,7 @@ "> + This option switches the common clock framework to use raw locks\n" "> + for locking and, this way, makes it possible to call\n" "> + clk_enable()/clk_disable() from atomic context.\n" - "> + If unsure, do not use as it may affect on overall system stabil=\n" - "ity\n" + "> + If unsure, do not use as it may affect on overall system stability\n" "> + and -RT latencies.\n" "> +\n" "> config COMMON_CLK_WM831X\n" @@ -186,32 +155,25 @@ "> index 25006a8..66ad38a 100644\n" "> --- a/drivers/clk/clk-divider.c\n" "> +++ b/drivers/clk/clk-divider.c\n" - "> @@ -388,7 +388,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, un=\n" - "signed long rate,\n" + "> @@ -388,7 +388,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,\n" "> divider->width, divider->flags);\n" - "> =\n" - "\n" + "> \n" "> if (divider->lock)\n" "> - spin_lock_irqsave(divider->lock, flags);\n" "> + clk_spin_lock_irqsave(divider->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {\n" - "> val =3D div_mask(divider->width) << (divider->shift + 16);\n" - "> @@ -400,7 +400,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, un=\n" - "signed long rate,\n" + "> val = div_mask(divider->width) << (divider->shift + 16);\n" + "> @@ -400,7 +400,7 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,\n" "> clk_writel(val, divider->reg);\n" - "> =\n" - "\n" + "> \n" "> if (divider->lock)\n" "> - spin_unlock_irqrestore(divider->lock, flags);\n" "> + clk_spin_unlock_irqrestore(divider->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> return 0;\n" "> }\n" - "> @@ -416,7 +416,7 @@ static struct clk *_register_divider(struct device *d=\n" - "ev, const char *name,\n" + "> @@ -416,7 +416,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,\n" "> const char *parent_name, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> u8 clk_divider_flags, const struct clk_div_table *table,\n" @@ -220,83 +182,65 @@ "> {\n" "> struct clk_divider *div;\n" "> struct clk *clk;\n" - "> @@ -475,7 +475,7 @@ static struct clk *_register_divider(struct device *d=\n" - "ev, const char *name,\n" + "> @@ -475,7 +475,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,\n" "> struct clk *clk_register_divider(struct device *dev, const char *name,\n" "> const char *parent_name, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> - u8 clk_divider_flags, spinlock_t *lock)\n" "> + u8 clk_divider_flags, clk_spinlock_t *lock)\n" "> {\n" - "> return _register_divider(dev, name, parent_name, flags, reg, shif=\n" - "t,\n" + "> return _register_divider(dev, name, parent_name, flags, reg, shift,\n" "> width, clk_divider_flags, NULL, lock);\n" - "> @@ -500,7 +500,7 @@ struct clk *clk_register_divider_table(struct device =\n" - "*dev, const char *name,\n" + "> @@ -500,7 +500,7 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,\n" "> const char *parent_name, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> u8 clk_divider_flags, const struct clk_div_table *table,\n" "> - spinlock_t *lock)\n" "> + clk_spinlock_t *lock)\n" "> {\n" - "> return _register_divider(dev, name, parent_name, flags, reg, shif=\n" - "t,\n" + "> return _register_divider(dev, name, parent_name, flags, reg, shift,\n" "> width, clk_divider_flags, table, lock);\n" - "> diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fract=\n" - "ional-divider.c\n" + "> diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c\n" "> index 6aa72d9..9e4e1a1 100644\n" "> --- a/drivers/clk/clk-fractional-divider.c\n" "> +++ b/drivers/clk/clk-fractional-divider.c\n" - "> @@ -26,12 +26,12 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw=\n" - " *hw,\n" + "> @@ -26,12 +26,12 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,\n" "> u64 ret;\n" - "> =\n" - "\n" + "> \n" "> if (fd->lock)\n" "> - spin_lock_irqsave(fd->lock, flags);\n" "> + clk_spin_lock_irqsave(fd->lock, flags);\n" - "> =\n" - "\n" - "> val =3D clk_readl(fd->reg);\n" - "> =\n" - "\n" + "> \n" + "> val = clk_readl(fd->reg);\n" + "> \n" "> if (fd->lock)\n" "> - spin_unlock_irqrestore(fd->lock, flags);\n" "> + clk_spin_unlock_irqrestore(fd->lock, flags);\n" - "> =\n" - "\n" - "> m =3D (val & fd->mmask) >> fd->mshift;\n" - "> n =3D (val & fd->nmask) >> fd->nshift;\n" - "> @@ -79,7 +79,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned =\n" - "long rate,\n" - "> n =3D parent_rate / div;\n" - "> =\n" - "\n" + "> \n" + "> m = (val & fd->mmask) >> fd->mshift;\n" + "> n = (val & fd->nmask) >> fd->nshift;\n" + "> @@ -79,7 +79,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,\n" + "> n = parent_rate / div;\n" + "> \n" "> if (fd->lock)\n" "> - spin_lock_irqsave(fd->lock, flags);\n" "> + clk_spin_lock_irqsave(fd->lock, flags);\n" - "> =\n" - "\n" - "> val =3D clk_readl(fd->reg);\n" - "> val &=3D ~(fd->mmask | fd->nmask);\n" - "> @@ -87,7 +87,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned =\n" - "long rate,\n" + "> \n" + "> val = clk_readl(fd->reg);\n" + "> val &= ~(fd->mmask | fd->nmask);\n" + "> @@ -87,7 +87,7 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,\n" "> clk_writel(val, fd->reg);\n" - "> =\n" - "\n" + "> \n" "> if (fd->lock)\n" "> - spin_unlock_irqrestore(fd->lock, flags);\n" "> + clk_spin_unlock_irqrestore(fd->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> return 0;\n" "> }\n" "> @@ -102,7 +102,7 @@ EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);\n" "> struct clk *clk_register_fractional_divider(struct device *dev,\n" - "> const char *name, const char *parent_name, unsigned long =\n" - "flags,\n" - "> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nw=\n" - "idth,\n" + "> const char *name, const char *parent_name, unsigned long flags,\n" + "> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,\n" "> - u8 clk_divider_flags, spinlock_t *lock)\n" "> + u8 clk_divider_flags, clk_spinlock_t *lock)\n" "> {\n" @@ -306,29 +250,23 @@ "> index 3f0e420..a77cce6 100644\n" "> --- a/drivers/clk/clk-gate.c\n" "> +++ b/drivers/clk/clk-gate.c\n" - "> @@ -51,7 +51,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int e=\n" - "nable)\n" - "> set ^=3D enable;\n" - "> =\n" - "\n" + "> @@ -51,7 +51,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)\n" + "> set ^= enable;\n" + "> \n" "> if (gate->lock)\n" "> - spin_lock_irqsave(gate->lock, flags);\n" "> + clk_spin_lock_irqsave(gate->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> if (gate->flags & CLK_GATE_HIWORD_MASK) {\n" - "> reg =3D BIT(gate->bit_idx + 16);\n" - "> @@ -69,7 +69,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int e=\n" - "nable)\n" + "> reg = BIT(gate->bit_idx + 16);\n" + "> @@ -69,7 +69,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)\n" "> clk_writel(reg, gate->reg);\n" - "> =\n" - "\n" + "> \n" "> if (gate->lock)\n" "> - spin_unlock_irqrestore(gate->lock, flags);\n" "> + clk_spin_unlock_irqrestore(gate->lock, flags);\n" "> }\n" - "> =\n" - "\n" + "> \n" "> static int clk_gate_enable(struct clk_hw *hw)\n" "> @@ -121,7 +121,7 @@ EXPORT_SYMBOL_GPL(clk_gate_ops);\n" "> struct clk *clk_register_gate(struct device *dev, const char *name,\n" @@ -343,34 +281,27 @@ "> index 69a094c..c4acb55 100644\n" "> --- a/drivers/clk/clk-mux.c\n" "> +++ b/drivers/clk/clk-mux.c\n" - "> @@ -84,7 +84,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 ind=\n" - "ex)\n" + "> @@ -84,7 +84,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)\n" "> }\n" - "> =\n" - "\n" + "> \n" "> if (mux->lock)\n" "> - spin_lock_irqsave(mux->lock, flags);\n" "> + clk_spin_lock_irqsave(mux->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> if (mux->flags & CLK_MUX_HIWORD_MASK) {\n" - "> val =3D mux->mask << (mux->shift + 16);\n" - "> @@ -96,7 +96,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 ind=\n" - "ex)\n" + "> val = mux->mask << (mux->shift + 16);\n" + "> @@ -96,7 +96,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)\n" "> clk_writel(val, mux->reg);\n" - "> =\n" - "\n" + "> \n" "> if (mux->lock)\n" "> - spin_unlock_irqrestore(mux->lock, flags);\n" "> + clk_spin_unlock_irqrestore(mux->lock, flags);\n" - "> =\n" - "\n" + "> \n" "> return 0;\n" "> }\n" "> @@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(clk_mux_ro_ops);\n" "> struct clk *clk_register_mux_table(struct device *dev, const char *name,\n" - "> const char **parent_names, u8 num_parents, unsigned long =\n" - "flags,\n" + "> const char **parent_names, u8 num_parents, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u32 mask,\n" "> - u8 clk_mux_flags, u32 *table, spinlock_t *lock)\n" "> + u8 clk_mux_flags, u32 *table, clk_spinlock_t *lock)\n" @@ -379,25 +310,21 @@ "> struct clk *clk;\n" "> @@ -168,7 +168,7 @@ EXPORT_SYMBOL_GPL(clk_register_mux_table);\n" "> struct clk *clk_register_mux(struct device *dev, const char *name,\n" - "> const char **parent_names, u8 num_parents, unsigned long =\n" - "flags,\n" + "> const char **parent_names, u8 num_parents, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> - u8 clk_mux_flags, spinlock_t *lock)\n" "> + u8 clk_mux_flags, clk_spinlock_t *lock)\n" "> {\n" - "> u32 mask =3D BIT(width) - 1;\n" - "> =\n" - "\n" + "> u32 mask = BIT(width) - 1;\n" + "> \n" "> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c\n" "> index 9f9cadd..6eb7f8a 100644\n" "> --- a/drivers/clk/clk.c\n" "> +++ b/drivers/clk/clk.c\n" "> @@ -24,7 +24,12 @@\n" - "> =\n" - "\n" + "> \n" "> #include \"clk.h\"\n" - "> =\n" - "\n" + "> \n" "> +#if defined(CONFIG_COMMON_CLK_USE_RAW_LOCKS)\n" "> +static DEFINE_RAW_SPINLOCK(enable_lock);\n" "> +#else /* PREEMPT_RT_FULL */\n" @@ -405,17 +332,15 @@ "> +#endif\n" "> +\n" "> static DEFINE_MUTEX(prepare_lock);\n" - "> =\n" - "\n" + "> \n" "> static struct task_struct *prepare_owner;\n" "> @@ -120,13 +125,14 @@ static unsigned long clk_enable_lock(void)\n" "> {\n" "> unsigned long flags;\n" - "> =\n" - "\n" + "> \n" "> - if (!spin_trylock_irqsave(&enable_lock, flags)) {\n" "> + if (!clk_spin_trylock_irqsave(&enable_lock, flags)) {\n" - "> if (enable_owner =3D=3D current) {\n" + "> if (enable_owner == current) {\n" "> enable_refcnt++;\n" "> return flags;\n" "> }\n" @@ -423,30 +348,26 @@ "> + clk_spin_lock_irqsave(&enable_lock, flags);\n" "> }\n" "> +\n" - "> WARN_ON_ONCE(enable_owner !=3D NULL);\n" - "> WARN_ON_ONCE(enable_refcnt !=3D 0);\n" - "> enable_owner =3D current;\n" + "> WARN_ON_ONCE(enable_owner != NULL);\n" + "> WARN_ON_ONCE(enable_refcnt != 0);\n" + "> enable_owner = current;\n" "> @@ -142,7 +148,7 @@ static void clk_enable_unlock(unsigned long flags)\n" "> if (--enable_refcnt)\n" "> return;\n" - "> enable_owner =3D NULL;\n" + "> enable_owner = NULL;\n" "> - spin_unlock_irqrestore(&enable_lock, flags);\n" "> + clk_spin_unlock_irqrestore(&enable_lock, flags);\n" "> }\n" - "> =\n" - "\n" + "> \n" "> /*** debugfs support ***/\n" "> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h\n" "> index df69531..a0f5d74 100644\n" "> --- a/include/linux/clk-provider.h\n" "> +++ b/include/linux/clk-provider.h\n" - "> @@ -266,6 +266,24 @@ struct clk *clk_register_fixed_rate_with_accuracy(st=\n" - "ruct device *dev,\n" - "> =\n" - "\n" + "> @@ -266,6 +266,24 @@ struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,\n" + "> \n" "> void of_fixed_clk_setup(struct device_node *np);\n" - "> =\n" - "\n" + "> \n" "> +#if defined(CONFIG_COMMON_CLK_USE_RAW_LOCKS)\n" "> +typedef raw_spinlock_t clk_spinlock_t;\n" "> +#define clk_spin_lock_irqsave(lock, flags) \\\n" @@ -475,8 +396,7 @@ "> - spinlock_t *lock;\n" "> + clk_spinlock_t *lock;\n" "> };\n" - "> =\n" - "\n" + "> \n" "> #define CLK_GATE_SET_TO_DISABLE BIT(0)\n" "> @@ -301,7 +319,7 @@ extern const struct clk_ops clk_gate_ops;\n" "> struct clk *clk_register_gate(struct device *dev, const char *name,\n" @@ -485,8 +405,7 @@ "> - u8 clk_gate_flags, spinlock_t *lock);\n" "> + u8 clk_gate_flags, clk_spinlock_t *lock);\n" "> void clk_unregister_gate(struct clk *clk);\n" - "> =\n" - "\n" + "> \n" "> struct clk_div_table {\n" "> @@ -350,7 +368,7 @@ struct clk_divider {\n" "> u8 width;\n" @@ -495,26 +414,22 @@ "> - spinlock_t *lock;\n" "> + clk_spinlock_t *lock;\n" "> };\n" - "> =\n" - "\n" + "> \n" "> #define CLK_DIVIDER_ONE_BASED BIT(0)\n" - "> @@ -375,12 +393,12 @@ int divider_get_val(unsigned long rate, unsigned lo=\n" - "ng parent_rate,\n" + "> @@ -375,12 +393,12 @@ int divider_get_val(unsigned long rate, unsigned long parent_rate,\n" "> struct clk *clk_register_divider(struct device *dev, const char *name,\n" "> const char *parent_name, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> - u8 clk_divider_flags, spinlock_t *lock);\n" "> + u8 clk_divider_flags, clk_spinlock_t *lock);\n" - "> struct clk *clk_register_divider_table(struct device *dev, const char *n=\n" - "ame,\n" + "> struct clk *clk_register_divider_table(struct device *dev, const char *name,\n" "> const char *parent_name, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> u8 clk_divider_flags, const struct clk_div_table *table,\n" "> - spinlock_t *lock);\n" "> + clk_spinlock_t *lock);\n" "> void clk_unregister_divider(struct clk *clk);\n" - "> =\n" - "\n" + "> \n" "> /**\n" "> @@ -413,7 +431,7 @@ struct clk_mux {\n" "> u32 mask;\n" @@ -523,29 +438,23 @@ "> - spinlock_t *lock;\n" "> + clk_spinlock_t *lock;\n" "> };\n" - "> =\n" - "\n" + "> \n" "> #define CLK_MUX_INDEX_ONE BIT(0)\n" "> @@ -428,12 +446,12 @@ extern const struct clk_ops clk_mux_ro_ops;\n" "> struct clk *clk_register_mux(struct device *dev, const char *name,\n" - "> const char **parent_names, u8 num_parents, unsigned long =\n" - "flags,\n" + "> const char **parent_names, u8 num_parents, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u8 width,\n" "> - u8 clk_mux_flags, spinlock_t *lock);\n" "> + u8 clk_mux_flags, clk_spinlock_t *lock);\n" - "> =\n" - "\n" + "> \n" "> struct clk *clk_register_mux_table(struct device *dev, const char *name,\n" - "> const char **parent_names, u8 num_parents, unsigned long =\n" - "flags,\n" + "> const char **parent_names, u8 num_parents, unsigned long flags,\n" "> void __iomem *reg, u8 shift, u32 mask,\n" "> - u8 clk_mux_flags, u32 *table, spinlock_t *lock);\n" "> + u8 clk_mux_flags, u32 *table, clk_spinlock_t *lock);\n" - "> =\n" - "\n" + "> \n" "> void clk_unregister_mux(struct clk *clk);\n" - "> =\n" - "\n" + "> \n" "> @@ -484,14 +502,14 @@ struct clk_fractional_divider {\n" "> u8 nshift;\n" "> u32 nmask;\n" @@ -553,23 +462,18 @@ "> - spinlock_t *lock;\n" "> + clk_spinlock_t *lock;\n" "> };\n" - "> =\n" - "\n" + "> \n" "> extern const struct clk_ops clk_fractional_divider_ops;\n" "> struct clk *clk_register_fractional_divider(struct device *dev,\n" - "> const char *name, const char *parent_name, unsigned long =\n" - "flags,\n" - "> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nw=\n" - "idth,\n" + "> const char *name, const char *parent_name, unsigned long flags,\n" + "> void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,\n" "> - u8 clk_divider_flags, spinlock_t *lock);\n" "> + u8 clk_divider_flags, clk_spinlock_t *lock);\n" - "> =\n" - "\n" + "> \n" "> /***\n" "> * struct clk_composite - aggregate clock of mux, divider and gate clocks\n" - "> -- =\n" - "\n" + "> -- \n" "> 2.5.1\n" - >=20 + > -12f18f9d5c63a9817968d09622f2a97346743ab4bb85c7dbc68a285bcf134068 +9c19ec53677b2b9b86424746299081157c9b0f3baf0d173c6434a96d0e83c12f
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