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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 20/23] spi: mxs_spi: Use GENMASK
Date: Sun, 25 Oct 2015 00:12:12 +0200	[thread overview]
Message-ID: <201510250012.12234.marex@denx.de> (raw)
In-Reply-To: <20151024214943.GK23893@bill-the-cat>

On Saturday, October 24, 2015 at 11:49:43 PM, Tom Rini wrote:
> On Sat, Oct 24, 2015 at 03:48:14PM +0200, Marek Vasut wrote:
> > On Saturday, October 24, 2015 at 03:42:43 PM, Jagan Teki wrote:
> > > On 24 October 2015 at 18:10, Marek Vasut <marex@denx.de> wrote:
> > > > On Saturday, October 24, 2015 at 05:39:07 AM, Jagan Teki wrote:
> > > >> Replace numeric mask hexcodes with GENMASK macro
> > > >> in mxs_spi
> > > >> 
> > > >> Cc: Marek Vasut <marex@denx.de>
> > > >> Signed-off-by: Jagan Teki <jteki@openedev.com>
> > > >> ---
> > > >> 
> > > >>  drivers/spi/mxs_spi.c | 2 +-
> > > >>  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >> 
> > > >> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
> > > >> index 627644b..459c603 100644
> > > >> --- a/drivers/spi/mxs_spi.c
> > > >> +++ b/drivers/spi/mxs_spi.c
> > > >> @@ -23,7 +23,7 @@
> > > >> 
> > > >>  #define      MXS_SPI_MAX_TIMEOUT     1000000
> > > >>  #define      MXS_SPI_PORT_OFFSET     0x2000
> > > >> 
> > > >> -#define MXS_SSP_CHIPSELECT_MASK              0x00300000
> > > >> +#define MXS_SSP_CHIPSELECT_MASK              GENMASK(21, 20)
> > > >> 
> > > >>  #define MXS_SSP_CHIPSELECT_SHIFT     20
> > > > 
> > > > This is just making things unreadable, please keep it as is. NAK.
> > > 
> > > What's wrong with the GENMASK here is that something that you against
> > > with it? It don't look like unreadable.
> > 
> > If I open the datasheet, I can easily locate mask 0x0030_0000 and figure
> > out which bits I need to work with. With genmask ... not so much. It only
> > obfuscates the code.
> 
> Really?  I don't have the "mxs" datasheet handy but I have the mx6
> solo/duallite one handy and the SPI chapter talks about bits and has
> them broken down that way, not the hex numbers for masking whatever
> field.  This matched my expectation on how I recall the TI parts being
> as well, bit field descriptions and binary values, not hex.

MXS is sigmatel design, so the datasheets are different. And I am much more
fond of a bitmask being a bitmask (or a hex number) than some ad-hoc macro.

Best regards,
Marek Vasut

  reply	other threads:[~2015-10-24 22:12 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-24  3:38 [U-Boot] [PATCH v5 00/23] spi: Use BIT and GENMASK Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 01/23] spi: zynq_[q]spi: Use BIT macro Jagan Teki
2015-10-26  4:45   ` Siva Durga Prasad Paladugu
2015-10-24  3:38 ` [U-Boot] [PATCH v5 02/23] spi: zynq_[q]spi: Use GENMASK macro Jagan Teki
2015-10-26  4:45   ` Siva Durga Prasad Paladugu
2015-10-24  3:38 ` [U-Boot] [PATCH v5 03/23] spi: altera_spi: Use BIT macro Jagan Teki
2015-10-27  2:45   ` Thomas Chou
2015-10-24  3:38 ` [U-Boot] [PATCH v5 04/23] spi: atmel_spi: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 05/23] spi: bfin_spi6xx: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 06/23] spi: cadence_qspi_apb: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 07/23] spi: designware_spi: " Jagan Teki
2015-10-24 23:24   ` Tom Rini
2015-10-24  3:38 ` [U-Boot] [PATCH v5 08/23] spi: fsl: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 09/23] spi: ich: " Jagan Teki
2015-10-26 14:08   ` Simon Glass
2015-10-24  3:38 ` [U-Boot] [PATCH v5 10/23] spi: mpc8xxx_spi: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 11/23] spi: omap3_spi: " Jagan Teki
2015-10-24  3:38 ` [U-Boot] [PATCH v5 12/23] spi: sh_qspi: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 13/23] spi: tegra: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 14/23] spi: ti_qspi: " Jagan Teki
2015-10-26 10:59   ` Vignesh R
2015-10-24  3:39 ` [U-Boot] [PATCH v5 15/23] spi: xilinx_spi: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 16/23] spi: atmel_spi: Use GENMASK Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 17/23] spi: cadence_qspi_apb: " Jagan Teki
2015-10-24 12:41   ` Marek Vasut
2015-10-24 21:51     ` Tom Rini
2015-10-24 22:13       ` Marek Vasut
2015-10-24 22:25         ` Tom Rini
2015-10-24 23:02           ` Marek Vasut
2015-10-26  5:54           ` Stefan Roese
2015-10-26  7:21             ` Jagan Teki
2015-10-26  7:29               ` Stefan Roese
2015-10-26  7:39                 ` Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 18/23] spi: designware_spi: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 19/23] spi: fsl_qspi: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 20/23] spi: mxs_spi: " Jagan Teki
2015-10-24 12:40   ` Marek Vasut
2015-10-24 13:42     ` Jagan Teki
2015-10-24 13:48       ` Marek Vasut
2015-10-24 21:49         ` Tom Rini
2015-10-24 22:12           ` Marek Vasut [this message]
2015-10-24 22:26             ` Tom Rini
2015-10-24  3:39 ` [U-Boot] [PATCH v5 21/23] spi: omap3_spi: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 22/23] spi: tegra: " Jagan Teki
2015-10-24  3:39 ` [U-Boot] [PATCH v5 23/23] spi: xilinx_spi: " Jagan Teki
2015-10-25  6:59 ` [U-Boot] [PATCH v5 00/23] spi: Use BIT and GENMASK Jagan Teki

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