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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/8] drm/i915: Add a modeset power domain
Date: Wed, 4 Nov 2015 19:29:41 +0200	[thread overview]
Message-ID: <20151104172941.GX4437@intel.com> (raw)
In-Reply-To: <1446553874-22986-5-git-send-email-patrik.jakobsson@linux.intel.com>

On Tue, Nov 03, 2015 at 01:31:10PM +0100, Patrik Jakobsson wrote:
> We need DC5/DC6 to be disabled around modesets to prevent confusing the
> DMC. Also, we've run out of bits in the 32 bit power domain mask so now
> it's a 64 bit mask.

We could get back 4 bits by squashing each 2 and 4 lane DDI power doamin
into just one power domain. I don't think we use the 2 vs. 4 lane
distinciton anywhere. It was basically added for VLV but turns it it
can't be used there, so I think we could just get rid of it.

> 
> Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c     | 2 ++
>  drivers/gpu/drm/i915/i915_drv.h         | 3 ++-
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>  3 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index f7b85fe..ae9a2ed 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2746,6 +2746,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
>  		return "AUX_D";
>  	case POWER_DOMAIN_GMBUS:
>  		return "GMBUS";
> +	case POWER_DOMAIN_MODESET:
> +		return "MODESET";
>  	case POWER_DOMAIN_INIT:
>  		return "INIT";
>  	default:
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c3d3b2a..efb6a00 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -200,6 +200,7 @@ enum intel_display_power_domain {
>  	POWER_DOMAIN_AUX_C,
>  	POWER_DOMAIN_AUX_D,
>  	POWER_DOMAIN_GMBUS,
> +	POWER_DOMAIN_MODESET,
>  	POWER_DOMAIN_INIT,
>  
>  	POWER_DOMAIN_NUM,
> @@ -1226,7 +1227,7 @@ struct i915_power_well {
>  	int count;
>  	/* cached hw enabled state */
>  	bool hw_enabled;
> -	unsigned long domains;
> +	unsigned long long domains;
>  	unsigned long data;
>  	const struct i915_power_well_ops *ops;
>  };
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index b6ce77f..d0ed38b 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1815,7 +1815,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
>  {
>  	struct i915_power_domains *power_domains = &dev_priv->power_domains;
>  
> -	BUILD_BUG_ON(POWER_DOMAIN_NUM > 31);
> +	BUILD_BUG_ON(POWER_DOMAIN_NUM > 63);
>  
>  	mutex_init(&power_domains->lock);
>  
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-11-04 17:30 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-03 12:31 [PATCH 0/8] Skylake DMC/DC-state fixes and redesign Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 1/8] drm/i915: Clean up AUX power domain handling Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 2/8] drm/i915: Introduce a gmbus power domain Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 3/8] drm/i915: Remove DDI power domain exclusion SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 4/8] drm/i915: Add a modeset power domain Patrik Jakobsson
2015-11-04 17:29   ` Ville Syrjälä [this message]
2015-11-04 19:56     ` Patrik Jakobsson
2015-11-05 15:02   ` Daniel Stone
2015-11-05 16:55     ` [PATCH] drm/i915: Use extended power domain bitmask Daniel Stone
2015-11-05 17:12     ` [PATCH 4/8] drm/i915: Add a modeset power domain Patrik Jakobsson
2015-11-06 13:53       ` Daniel Stone
2015-11-06 14:17         ` Imre Deak
2015-11-06 14:21           ` Daniel Stone
2015-11-06 19:46         ` Daniel Stone
2015-11-06 22:29   ` Dave Airlie
2015-11-18  9:02     ` Daniel Vetter
2015-11-18  9:35       ` Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 5/8] drm/i915: Do not warn on PG2 enabled in gen9_disable_dc5() Patrik Jakobsson
2015-11-04 17:33   ` Ville Syrjälä
2015-11-03 12:31 ` [PATCH 6/8] drm/i915/skl: Turn DC handling into a power well Patrik Jakobsson
2015-11-04 17:53   ` Ville Syrjälä
2015-11-04 19:29     ` Patrik Jakobsson
2015-11-04 19:15   ` Imre Deak
2015-11-05 15:01   ` Daniel Stone
2015-11-03 12:31 ` [PATCH 7/8] drm/i915/skl: Add boot parameter for disabling DC6 Patrik Jakobsson
2015-11-03 13:08   ` Jani Nikula
2015-11-03 14:01     ` Patrik Jakobsson
2015-11-03 14:19       ` Jani Nikula
2015-11-03 14:53         ` Patrik Jakobsson
2015-11-03 12:31 ` [PATCH 8/8] drm/i915: Force loading of csr program at boot Patrik Jakobsson
2015-11-04 17:17 ` [PATCH 0/8] Skylake DMC/DC-state fixes and redesign Daniel Stone
2015-11-04 20:52   ` Patrik Jakobsson

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