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[52.8.89.49]) by smtp.gmail.com with ESMTPSA id bs3sm357167pbd.89.2015.11.06.06.13.19 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 06 Nov 2015 06:13:20 -0800 (PST) Date: Fri, 6 Nov 2015 15:13:17 +0100 From: "Edgar E. Iglesias" To: Peter Maydell Cc: QEMU Developers , Patch Tracking , Alex =?iso-8859-1?Q?Benn=E9e?= , Paolo Bonzini , Andreas =?iso-8859-1?Q?F=E4rber?= , qemu-arm@nongnu.org Subject: Re: [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry Message-ID: <20151106141317.GK13308@toto> References: <1446747358-18214-1-git-send-email-peter.maydell@linaro.org> <1446747358-18214-5-git-send-email-peter.maydell@linaro.org> <20151106133448.GD13308@toto> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-TUID: sagFDw+uuQlH On Fri, Nov 06, 2015 at 01:45:29PM +0000, Peter Maydell wrote: > On 6 November 2015 at 13:34, Edgar E. Iglesias wrote: > > On Thu, Nov 05, 2015 at 06:15:46PM +0000, Peter Maydell wrote: > >> Add the address space index to CPUIOTLBEntry, and use this to pass it > >> to iotlb_to_region(), so that we use the correct AddressSpace when > >> doing IO path lookups. > > > > Hi Peter, > > > > I think this works but eventually when we add support for CPUs behind > > IOMMUs I think things will be easier if we store a pointer to the > > AS instead of an index in the IOTLB. address_space_translate_for_iotlb() > > with IOMMU support may be implemented so that it returns a different > > address space as it walks tha memory hierarchy and translate things. > > > > Do you see any issues with storing pointers to the AS instead of an > > index? > > Yeah, we can't deal with arbitrary AddressSpaces here. We need a > CPUAddressSpace, because we use the cached RCU-protected memory_dispatch > pointer. Once you know that you have to be dealing with one of the fixed > CPUAddressSpaces, then you might as well just keep the index rather than > an arbitrary pointer. OK, I think we'll have to have another look once we do the IOMMU stuff. My view has probably been to simplistic. Best regards, Edgar From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zuhlf-0006J6-GM for qemu-devel@nongnu.org; Fri, 06 Nov 2015 09:13:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zuhla-0000aI-Fx for qemu-devel@nongnu.org; Fri, 06 Nov 2015 09:13:27 -0500 Date: Fri, 6 Nov 2015 15:13:17 +0100 From: "Edgar E. Iglesias" Message-ID: <20151106141317.GK13308@toto> References: <1446747358-18214-1-git-send-email-peter.maydell@linaro.org> <1446747358-18214-5-git-send-email-peter.maydell@linaro.org> <20151106133448.GD13308@toto> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Patch Tracking , QEMU Developers , qemu-arm@nongnu.org, Paolo Bonzini , Alex =?iso-8859-1?Q?Benn=E9e?= , Andreas =?iso-8859-1?Q?F=E4rber?= On Fri, Nov 06, 2015 at 01:45:29PM +0000, Peter Maydell wrote: > On 6 November 2015 at 13:34, Edgar E. Iglesias wrote: > > On Thu, Nov 05, 2015 at 06:15:46PM +0000, Peter Maydell wrote: > >> Add the address space index to CPUIOTLBEntry, and use this to pass it > >> to iotlb_to_region(), so that we use the correct AddressSpace when > >> doing IO path lookups. > > > > Hi Peter, > > > > I think this works but eventually when we add support for CPUs behind > > IOMMUs I think things will be easier if we store a pointer to the > > AS instead of an index in the IOTLB. address_space_translate_for_iotlb() > > with IOMMU support may be implemented so that it returns a different > > address space as it walks tha memory hierarchy and translate things. > > > > Do you see any issues with storing pointers to the AS instead of an > > index? > > Yeah, we can't deal with arbitrary AddressSpaces here. We need a > CPUAddressSpace, because we use the cached RCU-protected memory_dispatch > pointer. Once you know that you have to be dealing with one of the fixed > CPUAddressSpaces, then you might as well just keep the index rather than > an arbitrary pointer. OK, I think we'll have to have another look once we do the IOMMU stuff. My view has probably been to simplistic. Best regards, Edgar