Re: [patch added to the 3.12 stable tree] drm/i915: Restore lost DPLL register write on gen2-4

[Luis Henriques <luis.henriques@canonical.com>]

On Mon, Nov 09, 2015 at 12:56:24PM +0100, Jiri Slaby wrote:
> From: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> 
> This patch has been added to the 3.12 stable tree. If you have any
> objections, please let us know.
> 
> ===============
> 
> commit 8e7a65aa70bcc1235a44e40ae0da5056525fe081 upstream.
> 
> We accidentally lost the initial DPLL register write in
> 1c4e02746147 drm/i915: Fix DVO 2x clock enable on 830M
> 
> The "three times for luck" hack probably saved us from a total
> disaster. But anyway, bring the initial write back so that the
> code actually makes some sense.
> 
> Reported-and-tested-by: Nick Bowler <nbowler@draconx.ca>
> References: http://mid.gmane.org/CAN_QmVyMaArxYgEcVVsGvsMo7-6ohZr8HmF5VhkkL4i9KOmrhw@mail.gmail.com
> Cc: Nick Bowler <nbowler@draconx.ca>
> Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 37a9d3c89feb..8af80f5fe210 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1379,6 +1379,8 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
>  
>  	I915_WRITE(reg, dpll);
>  
> +	I915_WRITE(reg, dpll);
> +

I don't think 3.12 actually needs this patch as it does not contain
commit 1c4e02746147, which deleted the I915_WRITE().

Cheers,
--
Lu�s


>  	/* Wait for the clocks to stabilize. */
>  	POSTING_READ(reg);
>  	udelay(150);
> -- 
> 2.6.3
> 
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