* i915 Skylake: "Invalid ROM contents" @ 2015-11-17 19:43 Andy Lutomirski 2015-11-18 10:59 ` Ville Syrjälä 0 siblings, 1 reply; 9+ messages in thread From: Andy Lutomirski @ 2015-11-17 19:43 UTC (permalink / raw) To: Intel Graphics Development, DRI Typing: # cat /sys/devices/pci0000:00/0000:00:02.0/rom Provokes: i915 0000:00:02.0: Invalid ROM contents This is on a Dell XPS 13 9350 (Skylake). This is 4.3.0 plus some wireless-next bits. --Andy -- Andy Lutomirski AMA Capital Management, LLC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: i915 Skylake: "Invalid ROM contents" 2015-11-17 19:43 i915 Skylake: "Invalid ROM contents" Andy Lutomirski @ 2015-11-18 10:59 ` Ville Syrjälä 2015-11-18 13:39 ` Alex Deucher 2015-11-18 15:59 ` [Intel-gfx] " Andy Lutomirski 0 siblings, 2 replies; 9+ messages in thread From: Ville Syrjälä @ 2015-11-18 10:59 UTC (permalink / raw) To: Andy Lutomirski; +Cc: Intel Graphics Development, DRI On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: > Typing: > > # cat /sys/devices/pci0000:00/0000:00:02.0/rom > > Provokes: > > i915 0000:00:02.0: Invalid ROM contents Hmm. So there's no PCI option ROM there. I wonder what is there. I get the same on my Braswell BTW. I tried to look through the UEFI spec a bit, and it seems to say that even for non-legacy option ROMs the 0x55aa signature should be there. But this being the GPU means we may be using the shadow ROM stuff, which IIRC assumes that the shadow is at 0xc000. I'm not sure that holds anymore with UEFI, and maybe we should be using some UEFI trick instead to find out where it actually lives? BTW what does 'lspci -vv -s 00:02.0' say on your machine? > > This is on a Dell XPS 13 9350 (Skylake). This is 4.3.0 plus some > wireless-next bits. > > --Andy > > -- > Andy Lutomirski > AMA Capital Management, LLC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: i915 Skylake: "Invalid ROM contents" 2015-11-18 10:59 ` Ville Syrjälä @ 2015-11-18 13:39 ` Alex Deucher 2015-11-18 15:59 ` [Intel-gfx] " Andy Lutomirski 1 sibling, 0 replies; 9+ messages in thread From: Alex Deucher @ 2015-11-18 13:39 UTC (permalink / raw) To: Ville Syrjälä; +Cc: Intel Graphics Development, DRI, Andy Lutomirski On Wed, Nov 18, 2015 at 5:59 AM, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >> Typing: >> >> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >> >> Provokes: >> >> i915 0000:00:02.0: Invalid ROM contents > > Hmm. So there's no PCI option ROM there. I wonder what is there. I > get the same on my Braswell BTW. I tried to look through the UEFI > spec a bit, and it seems to say that even for non-legacy option ROMs > the 0x55aa signature should be there. > > But this being the GPU means we may be using the shadow ROM stuff, > which IIRC assumes that the shadow is at 0xc000. I'm not sure that > holds anymore with UEFI, and maybe we should be using some UEFI > trick instead to find out where it actually lives? We started getting the same message on radeon even though we are eventually able to find the rom. It was due to some core pci change in the handling of roms, but I don't remember the details. Alex > > BTW what does 'lspci -vv -s 00:02.0' say on your machine? > >> >> This is on a Dell XPS 13 9350 (Skylake). This is 4.3.0 plus some >> wireless-next bits. >> >> --Andy >> >> -- >> Andy Lutomirski >> AMA Capital Management, LLC >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents" 2015-11-18 10:59 ` Ville Syrjälä 2015-11-18 13:39 ` Alex Deucher @ 2015-11-18 15:59 ` Andy Lutomirski 2015-11-18 16:12 ` Daniel Stone 1 sibling, 1 reply; 9+ messages in thread From: Andy Lutomirski @ 2015-11-18 15:59 UTC (permalink / raw) To: Ville Syrjälä Cc: Intel Graphics Development, DRI, linux-pci@vger.kernel.org [adding linux-pci] On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >> Typing: >> >> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >> >> Provokes: >> >> i915 0000:00:02.0: Invalid ROM contents > > Hmm. So there's no PCI option ROM there. I wonder what is there. I > get the same on my Braswell BTW. I tried to look through the UEFI > spec a bit, and it seems to say that even for non-legacy option ROMs > the 0x55aa signature should be there. > > But this being the GPU means we may be using the shadow ROM stuff, > which IIRC assumes that the shadow is at 0xc000. I'm not sure that > holds anymore with UEFI, and maybe we should be using some UEFI > trick instead to find out where it actually lives? > > BTW what does 'lspci -vv -s 00:02.0' say on your machine? > 00:02.0 VGA compatible controller: Intel Corporation Sky Lake Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) DeviceName: Onboard IGD Subsystem: Dell Device 0704 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 128 Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] Region 4: I/O ports at f000 [size=64] Expansion ROM at <unassigned> [disabled] Capabilities: [40] Vendor Specific Information: Len=0c <?> Capabilities: [70] Express (v2) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee00018 Data: 0000 Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] #1b Capabilities: [200 v1] Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: 00 ATSCtl: Enable-, Smallest Translation Unit: 00 Capabilities: [300 v1] #13 Kernel driver in use: i915 Kernel modules: i915 --Andy >> >> This is on a Dell XPS 13 9350 (Skylake). This is 4.3.0 plus some >> wireless-next bits. >> >> --Andy >> >> -- >> Andy Lutomirski >> AMA Capital Management, LLC >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC -- Andy Lutomirski AMA Capital Management, LLC ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents" 2015-11-18 15:59 ` [Intel-gfx] " Andy Lutomirski @ 2015-11-18 16:12 ` Daniel Stone 2016-01-10 18:41 ` Andy Lutomirski 0 siblings, 1 reply; 9+ messages in thread From: Daniel Stone @ 2015-11-18 16:12 UTC (permalink / raw) To: Andy Lutomirski Cc: Ville Syrjälä, linux-pci@vger.kernel.org, Intel Graphics Development, DRI Hi, On 18 November 2015 at 15:59, Andy Lutomirski <luto@amacapital.net> wrote: > On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä > <ville.syrjala@linux.intel.com> wrote: >> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>> Typing: >>> >>> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >>> >>> Provokes: >>> >>> i915 0000:00:02.0: Invalid ROM contents >> >> Hmm. So there's no PCI option ROM there. I wonder what is there. I >> get the same on my Braswell BTW. I tried to look through the UEFI >> spec a bit, and it seems to say that even for non-legacy option ROMs >> the 0x55aa signature should be there. >> >> But this being the GPU means we may be using the shadow ROM stuff, >> which IIRC assumes that the shadow is at 0xc000. I'm not sure that >> holds anymore with UEFI, and maybe we should be using some UEFI >> trick instead to find out where it actually lives? >> >> BTW what does 'lspci -vv -s 00:02.0' say on your machine? >> > > 00:02.0 VGA compatible controller: Intel Corporation Sky Lake > Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) > DeviceName: Onboard IGD > Subsystem: Dell Device 0704 > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0 > Interrupt: pin A routed to IRQ 128 > Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] > Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] > Region 4: I/O ports at f000 [size=64] > Expansion ROM at <unassigned> [disabled] UEFI has an option to enable option ROMs, which is disabled by default; I wonder if having it disabled prevents all access to the ROM. Mind you, it doesn't seem to be fatal; I've not had any issues with the same machine that I can pin down to lack of ROM. Cheers, Daniel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents" 2015-11-18 16:12 ` Daniel Stone @ 2016-01-10 18:41 ` Andy Lutomirski 2016-01-10 19:12 ` Andy Lutomirski 0 siblings, 1 reply; 9+ messages in thread From: Andy Lutomirski @ 2016-01-10 18:41 UTC (permalink / raw) To: Daniel Stone Cc: Ville Syrjälä, linux-pci@vger.kernel.org, Intel Graphics Development, DRI On Wed, Nov 18, 2015 at 8:12 AM, Daniel Stone <daniel@fooishbar.org> wrote: > Hi, > > On 18 November 2015 at 15:59, Andy Lutomirski <luto@amacapital.net> wrote: >> On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä >> <ville.syrjala@linux.intel.com> wrote: >>> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>>> Typing: >>>> >>>> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >>>> >>>> Provokes: >>>> >>>> i915 0000:00:02.0: Invalid ROM contents >>> >>> Hmm. So there's no PCI option ROM there. I wonder what is there. I >>> get the same on my Braswell BTW. I tried to look through the UEFI >>> spec a bit, and it seems to say that even for non-legacy option ROMs >>> the 0x55aa signature should be there. >>> >>> But this being the GPU means we may be using the shadow ROM stuff, >>> which IIRC assumes that the shadow is at 0xc000. I'm not sure that >>> holds anymore with UEFI, and maybe we should be using some UEFI >>> trick instead to find out where it actually lives? >>> >>> BTW what does 'lspci -vv -s 00:02.0' say on your machine? >>> >> >> 00:02.0 VGA compatible controller: Intel Corporation Sky Lake >> Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) >> DeviceName: Onboard IGD >> Subsystem: Dell Device 0704 >> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- >> ParErr- Stepping- SERR- FastB2B- DisINTx+ >> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- >> <TAbort- <MAbort- >SERR- <PERR- INTx- >> Latency: 0 >> Interrupt: pin A routed to IRQ 128 >> Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] >> Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] >> Region 4: I/O ports at f000 [size=64] >> Expansion ROM at <unassigned> [disabled] > > UEFI has an option to enable option ROMs, which is disabled by > default; I wonder if having it disabled prevents all access to the > ROM. > > Mind you, it doesn't seem to be fatal; I've not had any issues with > the same machine that I can pin down to lack of ROM. > FWIW, my logs also get spammed with: [ 127.101881] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment I suspect that the PCI core is just failing to recognize that the ROM is disabled. --Andy ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents" 2016-01-10 18:41 ` Andy Lutomirski @ 2016-01-10 19:12 ` Andy Lutomirski 2016-02-29 16:31 ` Andy Lutomirski 0 siblings, 1 reply; 9+ messages in thread From: Andy Lutomirski @ 2016-01-10 19:12 UTC (permalink / raw) To: Daniel Stone Cc: Ville Syrjälä, linux-pci@vger.kernel.org, Intel Graphics Development, DRI, Bruno Prémont, Bjorn Helgaas On Sun, Jan 10, 2016 at 10:41 AM, Andy Lutomirski <luto@amacapital.net> wrote: > On Wed, Nov 18, 2015 at 8:12 AM, Daniel Stone <daniel@fooishbar.org> wrote: >> Hi, >> >> On 18 November 2015 at 15:59, Andy Lutomirski <luto@amacapital.net> wrote: >>> On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä >>> <ville.syrjala@linux.intel.com> wrote: >>>> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>>>> Typing: >>>>> >>>>> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >>>>> >>>>> Provokes: >>>>> >>>>> i915 0000:00:02.0: Invalid ROM contents >>>> >>>> Hmm. So there's no PCI option ROM there. I wonder what is there. I >>>> get the same on my Braswell BTW. I tried to look through the UEFI >>>> spec a bit, and it seems to say that even for non-legacy option ROMs >>>> the 0x55aa signature should be there. >>>> >>>> But this being the GPU means we may be using the shadow ROM stuff, >>>> which IIRC assumes that the shadow is at 0xc000. I'm not sure that >>>> holds anymore with UEFI, and maybe we should be using some UEFI >>>> trick instead to find out where it actually lives? >>>> >>>> BTW what does 'lspci -vv -s 00:02.0' say on your machine? >>>> >>> >>> 00:02.0 VGA compatible controller: Intel Corporation Sky Lake >>> Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) >>> DeviceName: Onboard IGD >>> Subsystem: Dell Device 0704 >>> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- >>> ParErr- Stepping- SERR- FastB2B- DisINTx+ >>> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- >>> <TAbort- <MAbort- >SERR- <PERR- INTx- >>> Latency: 0 >>> Interrupt: pin A routed to IRQ 128 >>> Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] >>> Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] >>> Region 4: I/O ports at f000 [size=64] >>> Expansion ROM at <unassigned> [disabled] >> >> UEFI has an option to enable option ROMs, which is disabled by >> default; I wonder if having it disabled prevents all access to the >> ROM. >> >> Mind you, it doesn't seem to be fatal; I've not had any issues with >> the same machine that I can pin down to lack of ROM. >> > > FWIW, my logs also get spammed with: > > [ 127.101881] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] > has bogus alignment > > I suspect that the PCI core is just failing to recognize that the ROM > is disabled. > A bit more info: I think I only get this error when suspending for the second time after boot. No clue why. I instrumented the code a bit. At the time of that error, res->flags == 0x2. It's probably not a coincidence that: #define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ Should pci_fixup_video check that the resource exists in the first place before setting flags on it? --Andy ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents" 2016-01-10 19:12 ` Andy Lutomirski @ 2016-02-29 16:31 ` Andy Lutomirski 0 siblings, 0 replies; 9+ messages in thread From: Andy Lutomirski @ 2016-02-29 16:31 UTC (permalink / raw) To: Daniel Stone Cc: Ville Syrjälä, linux-pci@vger.kernel.org, Intel Graphics Development, DRI, Bruno Prémont, Bjorn Helgaas On Sun, Jan 10, 2016 at 11:12 AM, Andy Lutomirski <luto@amacapital.net> wrote: > On Sun, Jan 10, 2016 at 10:41 AM, Andy Lutomirski <luto@amacapital.net> wrote: >> On Wed, Nov 18, 2015 at 8:12 AM, Daniel Stone <daniel@fooishbar.org> wrote: >>> Hi, >>> >>> On 18 November 2015 at 15:59, Andy Lutomirski <luto@amacapital.net> wrote: >>>> On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä >>>> <ville.syrjala@linux.intel.com> wrote: >>>>> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>>>>> Typing: >>>>>> >>>>>> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >>>>>> >>>>>> Provokes: >>>>>> >>>>>> i915 0000:00:02.0: Invalid ROM contents >>>>> >>>>> Hmm. So there's no PCI option ROM there. I wonder what is there. I >>>>> get the same on my Braswell BTW. I tried to look through the UEFI >>>>> spec a bit, and it seems to say that even for non-legacy option ROMs >>>>> the 0x55aa signature should be there. >>>>> >>>>> But this being the GPU means we may be using the shadow ROM stuff, >>>>> which IIRC assumes that the shadow is at 0xc000. I'm not sure that >>>>> holds anymore with UEFI, and maybe we should be using some UEFI >>>>> trick instead to find out where it actually lives? >>>>> >>>>> BTW what does 'lspci -vv -s 00:02.0' say on your machine? >>>>> >>>> >>>> 00:02.0 VGA compatible controller: Intel Corporation Sky Lake >>>> Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) >>>> DeviceName: Onboard IGD >>>> Subsystem: Dell Device 0704 >>>> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- >>>> ParErr- Stepping- SERR- FastB2B- DisINTx+ >>>> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- >>>> <TAbort- <MAbort- >SERR- <PERR- INTx- >>>> Latency: 0 >>>> Interrupt: pin A routed to IRQ 128 >>>> Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] >>>> Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] >>>> Region 4: I/O ports at f000 [size=64] >>>> Expansion ROM at <unassigned> [disabled] >>> >>> UEFI has an option to enable option ROMs, which is disabled by >>> default; I wonder if having it disabled prevents all access to the >>> ROM. >>> >>> Mind you, it doesn't seem to be fatal; I've not had any issues with >>> the same machine that I can pin down to lack of ROM. >>> >> >> FWIW, my logs also get spammed with: >> >> [ 127.101881] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] >> has bogus alignment >> >> I suspect that the PCI core is just failing to recognize that the ROM >> is disabled. >> > > A bit more info: > > I think I only get this error when suspending for the second time > after boot. No clue why. > > I instrumented the code a bit. At the time of that error, res->flags > == 0x2. It's probably not a coincidence that: > > #define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ > > Should pci_fixup_video check that the resource exists in the first > place before setting flags on it? *ping* Hi, PCI people. --Andy ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: i915 Skylake: "Invalid ROM contents" @ 2016-02-29 16:31 ` Andy Lutomirski 0 siblings, 0 replies; 9+ messages in thread From: Andy Lutomirski @ 2016-02-29 16:31 UTC (permalink / raw) To: Daniel Stone Cc: linux-pci@vger.kernel.org, Intel Graphics Development, DRI, Bruno Prémont, Bjorn Helgaas On Sun, Jan 10, 2016 at 11:12 AM, Andy Lutomirski <luto@amacapital.net> wrote: > On Sun, Jan 10, 2016 at 10:41 AM, Andy Lutomirski <luto@amacapital.net> wrote: >> On Wed, Nov 18, 2015 at 8:12 AM, Daniel Stone <daniel@fooishbar.org> wrote: >>> Hi, >>> >>> On 18 November 2015 at 15:59, Andy Lutomirski <luto@amacapital.net> wrote: >>>> On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä >>>> <ville.syrjala@linux.intel.com> wrote: >>>>> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>>>>> Typing: >>>>>> >>>>>> # cat /sys/devices/pci0000:00/0000:00:02.0/rom >>>>>> >>>>>> Provokes: >>>>>> >>>>>> i915 0000:00:02.0: Invalid ROM contents >>>>> >>>>> Hmm. So there's no PCI option ROM there. I wonder what is there. I >>>>> get the same on my Braswell BTW. I tried to look through the UEFI >>>>> spec a bit, and it seems to say that even for non-legacy option ROMs >>>>> the 0x55aa signature should be there. >>>>> >>>>> But this being the GPU means we may be using the shadow ROM stuff, >>>>> which IIRC assumes that the shadow is at 0xc000. I'm not sure that >>>>> holds anymore with UEFI, and maybe we should be using some UEFI >>>>> trick instead to find out where it actually lives? >>>>> >>>>> BTW what does 'lspci -vv -s 00:02.0' say on your machine? >>>>> >>>> >>>> 00:02.0 VGA compatible controller: Intel Corporation Sky Lake >>>> Integrated Graphics (rev 07) (prog-if 00 [VGA controller]) >>>> DeviceName: Onboard IGD >>>> Subsystem: Dell Device 0704 >>>> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- >>>> ParErr- Stepping- SERR- FastB2B- DisINTx+ >>>> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- >>>> <TAbort- <MAbort- >SERR- <PERR- INTx- >>>> Latency: 0 >>>> Interrupt: pin A routed to IRQ 128 >>>> Region 0: Memory at db000000 (64-bit, non-prefetchable) [size=16M] >>>> Region 2: Memory at 90000000 (64-bit, prefetchable) [size=256M] >>>> Region 4: I/O ports at f000 [size=64] >>>> Expansion ROM at <unassigned> [disabled] >>> >>> UEFI has an option to enable option ROMs, which is disabled by >>> default; I wonder if having it disabled prevents all access to the >>> ROM. >>> >>> Mind you, it doesn't seem to be fatal; I've not had any issues with >>> the same machine that I can pin down to lack of ROM. >>> >> >> FWIW, my logs also get spammed with: >> >> [ 127.101881] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] >> has bogus alignment >> >> I suspect that the PCI core is just failing to recognize that the ROM >> is disabled. >> > > A bit more info: > > I think I only get this error when suspending for the second time > after boot. No clue why. > > I instrumented the code a bit. At the time of that error, res->flags > == 0x2. It's probably not a coincidence that: > > #define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ > > Should pci_fixup_video check that the resource exists in the first > place before setting flags on it? *ping* Hi, PCI people. --Andy _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2016-02-29 16:32 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-11-17 19:43 i915 Skylake: "Invalid ROM contents" Andy Lutomirski 2015-11-18 10:59 ` Ville Syrjälä 2015-11-18 13:39 ` Alex Deucher 2015-11-18 15:59 ` [Intel-gfx] " Andy Lutomirski 2015-11-18 16:12 ` Daniel Stone 2016-01-10 18:41 ` Andy Lutomirski 2016-01-10 19:12 ` Andy Lutomirski 2016-02-29 16:31 ` Andy Lutomirski 2016-02-29 16:31 ` Andy Lutomirski
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