diff for duplicates of <20151124182709.7671f12f@xhacker> diff --git a/a/1.txt b/N1/1.txt index d74b22d..29b67bd 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -21,7 +21,7 @@ Chen-Yu Tsai wrote: > "usb_phy2", "usb_hsic_12M"; > }; > -> + pll3: clk@06000008 { +> + pll3: clk at 06000008 { > + /* placeholder until implemented */ > + #clock-cells = <0>; > + compatible = "fixed-clock"; @@ -29,7 +29,7 @@ Chen-Yu Tsai wrote: > + clock-output-names = "pll3"; > + }; > + -> pll4: clk@0600000c { +> pll4: clk at 0600000c { > #clock-cells = <0>; > compatible = "allwinner,sun9i-a80-pll4-clk"; > @@ -350,6 +358,68 @@ @@ -37,7 +37,7 @@ Chen-Yu Tsai wrote: > "apb1_uart4", "apb1_uart5"; > }; > + -> + cpus_clk: clk@08001410 { +> + cpus_clk: clk at 08001410 { > + compatible = "allwinner,sun9i-a80-cpus-clk"; > + reg = <0x08001410 0x4>; > + #clock-cells = <0>; @@ -78,7 +78,7 @@ Jisheng > + -> + apbs: clk@0800141c { +> + apbs: clk at 0800141c { > + compatible = "allwinner,sun8i-a23-apb0-clk"; > + reg = <0x0800141c 0x4>; > + #clock-cells = <0>; @@ -86,7 +86,7 @@ Jisheng > + clock-output-names = "apbs"; > + }; > + -> + apbs_gates: clk@08001428 { +> + apbs_gates: clk at 08001428 { > + compatible = "allwinner,sun9i-a80-apbs-gates-clk"; > + reg = <0x08001428 0x4>; > + #clock-cells = <1>; @@ -111,7 +111,7 @@ This is for gate clocks, so we have a node for gateclks. gateclks are merged into one node. > + -> + r_1wire_clk: clk@08001450 { +> + r_1wire_clk: clk at 08001450 { > + reg = <0x08001450 0x4>; > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; @@ -119,7 +119,7 @@ into one node. > + clock-output-names = "r_1wire"; > + }; > + -> + r_ir_clk: clk@08001454 { +> + r_ir_clk: clk at 08001454 { > + reg = <0x08001454 0x4>; > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; @@ -133,13 +133,13 @@ into one node. > interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > }; > -> + apbs_rst: reset@080014b0 { +> + apbs_rst: reset at 080014b0 { > + reg = <0x080014b0 0x4>; > + compatible = "allwinner,sun6i-a31-clock-reset"; > + #reset-cells = <1>; > + }; > + -> r_uart: serial@08002800 { +> r_uart: serial at 08002800 { > compatible = "snps,dw-apb-uart"; > reg = <0x08002800 0x400>; > interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N1/content_digest index a613da7..dbbd4c1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,22 +1,9 @@ "ref\01448357536-26613-1-git-send-email-wens@csie.org\0" "ref\01448357536-26613-5-git-send-email-wens@csie.org\0" - "From\0Jisheng Zhang <jszhang@marvell.com>\0" - "Subject\0Re: [PATCH v3 4/5] ARM: dts: sun9i: Add A80 PRCM clocks and reset control nodes\0" + "From\0jszhang@marvell.com (Jisheng Zhang)\0" + "Subject\0[PATCH v3 4/5] ARM: dts: sun9i: Add A80 PRCM clocks and reset control nodes\0" "Date\0Tue, 24 Nov 2015 18:27:09 +0800\0" - "To\0Chen-Yu Tsai <wens@csie.org>" - " Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" - "Cc\0Maxime Ripard <maxime.ripard@free-electrons.com>" - Michael Turquette <mturquette@baylibre.com> - Stephen Boyd <sboyd@codeaurora.org> - Rob Herring <robh+dt@kernel.org> - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - <linux-sunxi@googlegroups.com> - <linux-clk@vger.kernel.org> - <linux-arm-kernel@lists.infradead.org> - " <linux-kernel@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "+ Sebastian\n" @@ -42,7 +29,7 @@ "> \t\t\t\t\t \"usb_phy2\", \"usb_hsic_12M\";\n" "> \t\t};\n" "> \n" - "> +\t\tpll3: clk@06000008 {\n" + "> +\t\tpll3: clk at 06000008 {\n" "> +\t\t\t/* placeholder until implemented */\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"fixed-clock\";\n" @@ -50,7 +37,7 @@ "> +\t\t\tclock-output-names = \"pll3\";\n" "> +\t\t};\n" "> +\n" - "> \t\tpll4: clk@0600000c {\n" + "> \t\tpll4: clk at 0600000c {\n" "> \t\t\t#clock-cells = <0>;\n" "> \t\t\tcompatible = \"allwinner,sun9i-a80-pll4-clk\";\n" "> @@ -350,6 +358,68 @@\n" @@ -58,7 +45,7 @@ "> \t\t\t\t\t\"apb1_uart4\", \"apb1_uart5\";\n" "> \t\t};\n" "> +\n" - "> +\t\tcpus_clk: clk@08001410 {\n" + "> +\t\tcpus_clk: clk at 08001410 {\n" "> +\t\t\tcompatible = \"allwinner,sun9i-a80-cpus-clk\";\n" "> +\t\t\treg = <0x08001410 0x4>;\n" "> +\t\t\t#clock-cells = <0>;\n" @@ -99,7 +86,7 @@ "\n" "\n" "> +\n" - "> +\t\tapbs: clk@0800141c {\n" + "> +\t\tapbs: clk at 0800141c {\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-apb0-clk\";\n" "> +\t\t\treg = <0x0800141c 0x4>;\n" "> +\t\t\t#clock-cells = <0>;\n" @@ -107,7 +94,7 @@ "> +\t\t\tclock-output-names = \"apbs\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapbs_gates: clk@08001428 {\n" + "> +\t\tapbs_gates: clk at 08001428 {\n" "> +\t\t\tcompatible = \"allwinner,sun9i-a80-apbs-gates-clk\";\n" "> +\t\t\treg = <0x08001428 0x4>;\n" "> +\t\t\t#clock-cells = <1>;\n" @@ -132,7 +119,7 @@ "into one node.\n" "\n" "> +\n" - "> +\t\tr_1wire_clk: clk@08001450 {\n" + "> +\t\tr_1wire_clk: clk at 08001450 {\n" "> +\t\t\treg = <0x08001450 0x4>;\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" @@ -140,7 +127,7 @@ "> +\t\t\tclock-output-names = \"r_1wire\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tr_ir_clk: clk@08001454 {\n" + "> +\t\tr_ir_clk: clk at 08001454 {\n" "> +\t\t\treg = <0x08001454 0x4>;\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" @@ -154,13 +141,13 @@ "> \t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" "> \t\t};\n" "> \n" - "> +\t\tapbs_rst: reset@080014b0 {\n" + "> +\t\tapbs_rst: reset at 080014b0 {\n" "> +\t\t\treg = <0x080014b0 0x4>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-clock-reset\";\n" "> +\t\t\t#reset-cells = <1>;\n" "> +\t\t};\n" "> +\n" - "> \t\tr_uart: serial@08002800 {\n" + "> \t\tr_uart: serial at 08002800 {\n" "> \t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> \t\t\treg = <0x08002800 0x400>;\n" "> \t\t\tinterrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -173,4 +160,4 @@ "> \t\t};\n" "> \t};" -b944a11cedb94a198e8005a978572b32e41a359e8c2f7690fc669a6243efd1fd +06a7faba003ba7567e1e966879f8c0677b900956fce71657083bbda26429664a
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.