From mboxrd@z Thu Jan 1 00:00:00 1970 From: jszhang@marvell.com (Jisheng Zhang) Date: Tue, 15 Dec 2015 22:47:09 +0800 Subject: [PATCH] arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes In-Reply-To: <8261316.NuheDtlQ6N@wuerfel> References: <1450190172-1161-1-git-send-email-jszhang@marvell.com> <8261316.NuheDtlQ6N@wuerfel> Message-ID: <20151215224709.2d71d2ba@xhacker> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Dear Arnd, On Tue, 15 Dec 2015 15:43:53 +0100 Arnd Bergmann wrote: > On Tuesday 15 December 2015 22:36:12 Jisheng Zhang wrote: > > - compatible = "arm,armv8-pmuv3"; > > + compatible = "arm,cortex-a53-pmu"; > > > > Should this list both? IMHO, we don't need to list both. The pmu binding document also says: "compatible : should be one of ...." Dear Mark, Could you please give suggestions? Thanks, Jisheng From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jisheng Zhang Subject: Re: [PATCH] arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes Date: Tue, 15 Dec 2015 22:47:09 +0800 Message-ID: <20151215224709.2d71d2ba@xhacker> References: <1450190172-1161-1-git-send-email-jszhang@marvell.com> <8261316.NuheDtlQ6N@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <8261316.NuheDtlQ6N@wuerfel> Sender: linux-kernel-owner@vger.kernel.org To: Arnd Bergmann , sebastian.hesselbarth@gmail.com, mark.rutland@arm.com Cc: robh+dt@kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Dear Arnd, On Tue, 15 Dec 2015 15:43:53 +0100 Arnd Bergmann wrote: > On Tuesday 15 December 2015 22:36:12 Jisheng Zhang wrote: > > - compatible = "arm,armv8-pmuv3"; > > + compatible = "arm,cortex-a53-pmu"; > > > > Should this list both? IMHO, we don't need to list both. The pmu binding document also says: "compatible : should be one of ...." Dear Mark, Could you please give suggestions? Thanks, Jisheng From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933582AbbLOOv2 (ORCPT ); Tue, 15 Dec 2015 09:51:28 -0500 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:21675 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933545AbbLOOv0 (ORCPT ); Tue, 15 Dec 2015 09:51:26 -0500 Date: Tue, 15 Dec 2015 22:47:09 +0800 From: Jisheng Zhang To: Arnd Bergmann , , CC: , , , , , , , , Subject: Re: [PATCH] arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes Message-ID: <20151215224709.2d71d2ba@xhacker> In-Reply-To: <8261316.NuheDtlQ6N@wuerfel> References: <1450190172-1161-1-git-send-email-jszhang@marvell.com> <8261316.NuheDtlQ6N@wuerfel> X-Mailer: Claws Mail 3.13.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2015-12-15_07:,, signatures=0 X-Proofpoint-Spam-Details: rule=inbound_notspam policy=inbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310007 definitions=main-1512150250 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dear Arnd, On Tue, 15 Dec 2015 15:43:53 +0100 Arnd Bergmann wrote: > On Tuesday 15 December 2015 22:36:12 Jisheng Zhang wrote: > > - compatible = "arm,armv8-pmuv3"; > > + compatible = "arm,cortex-a53-pmu"; > > > > Should this list both? IMHO, we don't need to list both. The pmu binding document also says: "compatible : should be one of ...." Dear Mark, Could you please give suggestions? Thanks, Jisheng