[U-Boot] [PATCH v3 3/4] mips: ath79: add spi driver

[Marek Vasut <marex@denx.de>]

On Thursday, December 24, 2015 at 12:22:02 PM, Wills Wang wrote:
> Signed-off-by: Wills Wang <wills.wang@live.com>
> ---
[...]

> diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
> new file mode 100644
> index 0000000..ddfc807
> --- /dev/null
> +++ b/drivers/spi/ath79_spi.c
> @@ -0,0 +1,211 @@
> +/*
> + * (C) Copyright 2015
> + * Wills Wang, <wills.wang@live.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <spi.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <asm/io.h>
> +#include <asm/addrspace.h>
> +#include <asm/types.h>
> +#include <asm/arch/ar71xx_regs.h>
> +
> +/* CLOCK_DIVIDER = 3 (SPI clock = 200 / 8 ~ 25 MHz) */
> +#define SPI_CLK_DIV(x)     ((x >> 1) - 1)

The x needs parenthesis ... (((x) >> 1) - 1)

> +
> +struct ath79_spi_platdata {
> +	void __iomem *regs;
> +};
> +
> +struct ath79_spi_priv {
> +	void __iomem *regs;
> +};
> +
> +static inline u32 ath79_spi_read(struct udevice *bus, u32 offset)
> +{
> +	struct ath79_spi_priv *priv = dev_get_priv(bus);
> +	const void __iomem *base = (void __iomem *)KSEG1ADDR(priv->regs);
> +	return readl(base + offset);

Just make this readl(KSEG1ADDR(...)) ?

> +}
> +
> +static inline void ath79_spi_write(struct udevice *bus, u32 val,
> +									u32 
offset)
> +{
> +	struct ath79_spi_priv *priv = dev_get_priv(bus);
> +	const void __iomem *base = (void __iomem *)KSEG1ADDR(priv->regs);
> +	writel(val, base + offset);

DTTO here.

[...]