From: marex@denx.de (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] doc: PCI: altera: Fix the 'ranges' property in example
Date: Tue, 5 Jan 2016 14:49:49 +0100 [thread overview]
Message-ID: <201601051449.49757.marex@denx.de> (raw)
In-Reply-To: <E7E66AD1AD65064486AD57C361DF091C062AE3A4@PG-ITEXCH02.altera.priv.altera.com>
On Tuesday, January 05, 2016 at 02:18:18 AM, Ley Foon Tan wrote:
> On Tue, 2016-01-05 at 01:47 +0100, Marek Vasut wrote:
> > On Tuesday, January 05, 2016 at 01:45:45 AM, Ley Foon Tan wrote:
> > > On Mon, 2016-01-04 at 02:12 +0100, Marek Vasut wrote:
> > > > On Monday, January 04, 2016 at 01:53:22 AM, Ley Foon Tan wrote:
> > > > > On Mon, 2016-01-04 at 01:37 +0100, Marek Vasut wrote:
> > > > > > On Monday, January 04, 2016 at 01:10:13 AM, Ley Foon Tan wrote:
> > > > > >
> > > > > > Hi!
> > > > > >
> > > > > > > > > > Well, do you have a good explanation why the system works
> > > > > > > > > > with this change and doesn't work without it on my design
> > > > > > > > > > ? I'd really love to understand this.
> > > > > > > > >
> > > > > > > > > Do you modify the driver to setup the translation table?
> > > > > > > >
> > > > > > > > No, I didn't change the driver. What do you refer to please ?
> > > > > > >
> > > > > > > There is Address Translation Table at address offset 0x1000 in
> > > > > > > the IP.
> > > > > >
> > > > > > Oh, I didn't configure that in any way. Should I or does the
> > > > > > driver configure it in some way?
> > > > > >
> > > > > > > Do you use the hardware design from the rocketboards.org or
> > > > > > > your own design?
> > > > > >
> > > > > > I use the one from rocketboards, I just ported it over to the
> > > > > > MCVEVK (custom cyclone v soc board)
> > > > >
> > > > > You may check again the base addresses use in the MCVEVK board.
> > > >
> > > > The address map is attached ; I don't see anything which would differ
> > > > from the reference design.
> > >
> > > Address map looks fine.
> >
> > Well do you have any other idea then ? I guess I should pull out the
> > SOCDK, huh?
>
> Can't think of any other thing that impact this, I expect the bus width
> used in the pipeline/bridge are same with the example design.
> Do you have our CV, AV or A10 SoC devkit?
I tested CV SoCDK just now and you're right, the provided quartus project
works without this change on the CV SoCDK. Do you have any suggestion for
me where I should try looking then please ?
[...]
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-01-05 13:49 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-24 9:45 [PATCH] doc: PCI: altera: Fix the 'ranges' property in example Marek Vasut
2015-12-28 6:56 ` Ley Foon Tan
2015-12-28 7:34 ` Marek Vasut
2015-12-28 7:42 ` Ley Foon Tan
2015-12-28 8:26 ` Marek Vasut
2015-12-29 7:48 ` Ley Foon Tan
2015-12-29 13:33 ` Marek Vasut
2015-12-31 3:09 ` Ley Foon Tan
2015-12-31 9:04 ` Marek Vasut
2016-01-03 23:29 ` Ley Foon Tan
2016-01-03 23:36 ` Marek Vasut
2016-01-04 0:10 ` Ley Foon Tan
2016-01-04 0:37 ` Marek Vasut
2016-01-04 0:53 ` Ley Foon Tan
2016-01-04 1:12 ` Marek Vasut
2016-01-05 0:45 ` Ley Foon Tan
2016-01-05 0:47 ` Marek Vasut
2016-01-05 1:18 ` Ley Foon Tan
2016-01-05 1:53 ` Marek Vasut
2016-01-05 13:49 ` Marek Vasut [this message]
2016-01-07 8:56 ` Ley Foon Tan
2016-01-07 16:05 ` Marek Vasut
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