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Date: Fri, 8 Jan 2016 09:58:26 -0700
From: Ross Zwisler <ross.zwisler@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
        Toshi Kani <toshi.kani@hpe.com>, Borislav Petkov <bp@suse.de>,
        "Luis R. Rodriguez" <mcgrof@suse.com>,
        Stephen Rothwell <sfr@canb.auug.org.au>,
        Ross Zwisler <ross.zwisler@linux.intel.com>,
        Sai Praneeth <sai.praneeth.prakhya@intel.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86: Micro-optimise clflush_cache_range()
Message-ID: <20160108165826.GA5000@linux.intel.com>
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On Fri, Jan 08, 2016 at 09:55:33AM +0000, Chris Wilson wrote:
> Whilst inspecting the asm for clflush_cache_range() and some perf profiles
> that required extensive flushing of single cachelines (from part of the
> intel-gpu-tools GPU benchmarks), we noticed that gcc was reloading
> boot_cpu_data.x86_clflush_size on every iteration of the loop. We can
> manually hoist that read which perf regarded as taking ~25% of the
> function time for a single cacheline flush.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Toshi Kani <toshi.kani@hpe.com>
> Cc: Borislav Petkov <bp@suse.de>
> Cc: "Luis R. Rodriguez" <mcgrof@suse.com>
> Cc: Stephen Rothwell <sfr@canb.auug.org.au>
> Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
> Cc: Sai Praneeth <sai.praneeth.prakhya@intel.com>
> Cc: linux-kernel@vger.kernel.org
> Acked-by: "H. Peter Anvin" <hpa@zytor.com>

Looks good to me.

Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com>

> ---
>  arch/x86/mm/pageattr.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
> index a3137a4feed1..6000ad7f560c 100644
> --- a/arch/x86/mm/pageattr.c
> +++ b/arch/x86/mm/pageattr.c
> @@ -129,14 +129,16 @@ within(unsigned long addr, unsigned long start, unsigned long end)
>   */
>  void clflush_cache_range(void *vaddr, unsigned int size)
>  {
> -	unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
> +	const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
> +	void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
>  	void *vend = vaddr + size;
> -	void *p;
> +
> +	if (p >= vend)
> +		return;
>  
>  	mb();
>  
> -	for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
> -	     p < vend; p += boot_cpu_data.x86_clflush_size)
> +	for (; p < vend; p += clflush_size)
>  		clflushopt(p);
>  
>  	mb();
> -- 
> 2.7.0.rc3
>