diff for duplicates of <20160111094236.GO14104@x1> diff --git a/a/1.txt b/N1/1.txt index 9679cc7..65c5572 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,33 +6,32 @@ On Wed, 30 Dec 2015, Krzysztof Kozlowski wrote: > exceptions are not obvious, for example except the change in the logic > sometimes the fields are swapped (WUDR and AUDR between S2MPS14 and > S2MPS15). This leads to quite complicated code. ->=20 +> > Try to make it more obvious by: > 1. Documenting the UDR masks for devices and operations. > 2. Adding fields in register configuration structure for each operation > (read time, write time and alarm). > 3. Splitting the configuration per S2MPS13, S2MPS14 and S2MPS15 thus > removing exceptions for them. ->=20 +> > Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> ->=20 +> > --- ->=20 +> > Tested on S2MPS11 (Odroid XU4) and S2MPS13. Testing on S2MPS15 would be > appreciated! ->=20 +> > Changes since v1: > 1. Fix value used in S2MPS15_RTC_AUDR_MASK, pointed by Yadwinder Singh > Brar. > --- -> drivers/rtc/rtc-s5m.c | 110 +++++++++++++++++++++++++++-------= ------- +> drivers/rtc/rtc-s5m.c | 110 +++++++++++++++++++++++++++------------- > include/linux/mfd/samsung/rtc.h | 2 + Acked-by: Lee Jones <lee.jones@linaro.org> > 2 files changed, 77 insertions(+), 35 deletions(-) ->=20 +> > diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c > index 559db8f72117..7407d7394bb4 100644 > --- a/drivers/rtc/rtc-s5m.c @@ -40,22 +39,19 @@ Acked-by: Lee Jones <lee.jones@linaro.org> > @@ -38,7 +38,22 @@ > */ > #define UDR_READ_RETRY_CNT 5 -> =20 +> > -/* Registers used by the driver which are different between chipsets. */ > +/* > + * Registers used by the driver which are different between chipsets. > + * > + * Operations like read time and write alarm/time require updating -> + * specific fields in UDR register. These fields usually are auto-cleare= -d +> + * specific fields in UDR register. These fields usually are auto-cleared > + * (with some exceptions). > + * > + * Table of operations per device: > + * > + * Device | Write time | Read time | Write alarm -> + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= -=3D +> + * ================================================= > + * S5M8767 | UDR + TIME | | UDR > + * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR > + * S2MPS13 | WUDR | RUDR | WUDR + AUDR @@ -78,106 +74,101 @@ d > + unsigned int write_time_udr_mask; > + unsigned int write_alarm_udr_mask; > }; -> =20 +> > /* Register map for S5M8763 and S5M8767 */ -> @@ -71,14 +91,44 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs = -=3D { -> .alarm1 =3D S5M_ALARM1_SEC, -> .udr_update =3D S5M_RTC_UDR_CON, -> .autoclear_udr_mask =3D S5M_RTC_UDR_MASK, -> - .udr_mask =3D S5M_RTC_UDR_MASK, -> + .read_time_udr_mask =3D 0, /* Not needed */ -> + .write_time_udr_mask =3D S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK, -> + .write_alarm_udr_mask =3D S5M_RTC_UDR_MASK, +> @@ -71,14 +91,44 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs = { +> .alarm1 = S5M_ALARM1_SEC, +> .udr_update = S5M_RTC_UDR_CON, +> .autoclear_udr_mask = S5M_RTC_UDR_MASK, +> - .udr_mask = S5M_RTC_UDR_MASK, +> + .read_time_udr_mask = 0, /* Not needed */ +> + .write_time_udr_mask = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK, +> + .write_alarm_udr_mask = S5M_RTC_UDR_MASK, > +}; > + > +/* Register map for S2MPS13 */ -> +static const struct s5m_rtc_reg_config s2mps13_rtc_regs =3D { -> + .regs_count =3D 7, -> + .time =3D S2MPS_RTC_SEC, -> + .ctrl =3D S2MPS_RTC_CTRL, -> + .alarm0 =3D S2MPS_ALARM0_SEC, -> + .alarm1 =3D S2MPS_ALARM1_SEC, -> + .udr_update =3D S2MPS_RTC_UDR_CON, -> + .autoclear_udr_mask =3D S2MPS_RTC_WUDR_MASK, -> + .read_time_udr_mask =3D S2MPS_RTC_RUDR_MASK, -> + .write_time_udr_mask =3D S2MPS_RTC_WUDR_MASK, -> + .write_alarm_udr_mask =3D S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK, +> +static const struct s5m_rtc_reg_config s2mps13_rtc_regs = { +> + .regs_count = 7, +> + .time = S2MPS_RTC_SEC, +> + .ctrl = S2MPS_RTC_CTRL, +> + .alarm0 = S2MPS_ALARM0_SEC, +> + .alarm1 = S2MPS_ALARM1_SEC, +> + .udr_update = S2MPS_RTC_UDR_CON, +> + .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, +> + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, +> + .write_time_udr_mask = S2MPS_RTC_WUDR_MASK, +> + .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK, > +}; > + > +/* Register map for S2MPS11/14 */ -> +static const struct s5m_rtc_reg_config s2mps14_rtc_regs =3D { -> + .regs_count =3D 7, -> + .time =3D S2MPS_RTC_SEC, -> + .ctrl =3D S2MPS_RTC_CTRL, -> + .alarm0 =3D S2MPS_ALARM0_SEC, -> + .alarm1 =3D S2MPS_ALARM1_SEC, -> + .udr_update =3D S2MPS_RTC_UDR_CON, -> + .autoclear_udr_mask =3D S2MPS_RTC_WUDR_MASK, -> + .read_time_udr_mask =3D S2MPS_RTC_RUDR_MASK, -> + .write_time_udr_mask =3D S2MPS_RTC_WUDR_MASK, -> + .write_alarm_udr_mask =3D S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK, +> +static const struct s5m_rtc_reg_config s2mps14_rtc_regs = { +> + .regs_count = 7, +> + .time = S2MPS_RTC_SEC, +> + .ctrl = S2MPS_RTC_CTRL, +> + .alarm0 = S2MPS_ALARM0_SEC, +> + .alarm1 = S2MPS_ALARM1_SEC, +> + .udr_update = S2MPS_RTC_UDR_CON, +> + .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, +> + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, +> + .write_time_udr_mask = S2MPS_RTC_WUDR_MASK, +> + .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK, > }; -> =20 +> > /* > - * Register map for S2MPS14. > - * It may be also suitable for S2MPS11 but this was not tested. -> + * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR= - bits +> + * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits > + * are swapped. > */ -> -static const struct s5m_rtc_reg_config s2mps_rtc_regs =3D { -> +static const struct s5m_rtc_reg_config s2mps15_rtc_regs =3D { -> .regs_count =3D 7, -> .time =3D S2MPS_RTC_SEC, -> .ctrl =3D S2MPS_RTC_CTRL, -> @@ -86,7 +136,9 @@ static const struct s5m_rtc_reg_config s2mps_rtc_regs = -=3D { -> .alarm1 =3D S2MPS_ALARM1_SEC, -> .udr_update =3D S2MPS_RTC_UDR_CON, -> .autoclear_udr_mask =3D S2MPS_RTC_WUDR_MASK, -> - .udr_mask =3D S2MPS_RTC_WUDR_MASK, -> + .read_time_udr_mask =3D S2MPS_RTC_RUDR_MASK, -> + .write_time_udr_mask =3D S2MPS15_RTC_WUDR_MASK, -> + .write_alarm_udr_mask =3D S2MPS15_RTC_AUDR_MASK, +> -static const struct s5m_rtc_reg_config s2mps_rtc_regs = { +> +static const struct s5m_rtc_reg_config s2mps15_rtc_regs = { +> .regs_count = 7, +> .time = S2MPS_RTC_SEC, +> .ctrl = S2MPS_RTC_CTRL, +> @@ -86,7 +136,9 @@ static const struct s5m_rtc_reg_config s2mps_rtc_regs = { +> .alarm1 = S2MPS_ALARM1_SEC, +> .udr_update = S2MPS_RTC_UDR_CON, +> .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, +> - .udr_mask = S2MPS_RTC_WUDR_MASK, +> + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, +> + .write_time_udr_mask = S2MPS15_RTC_WUDR_MASK, +> + .write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK, > }; -> =20 +> > struct s5m_rtc_info { -> @@ -223,21 +275,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5= -m_rtc_info *info) +> @@ -223,21 +275,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) > return ret; > } -> =20 +> > - switch (info->device_type) { > - case S5M8763X: > - case S5M8767X: -> - data |=3D info->regs->udr_mask | S5M_RTC_TIME_EN_MASK; +> - data |= info->regs->udr_mask | S5M_RTC_TIME_EN_MASK; > - case S2MPS15X: > - /* As per UM, for write time register, set WUDR bit to high */ -> - data |=3D S2MPS15_RTC_WUDR_MASK; +> - data |= S2MPS15_RTC_WUDR_MASK; > - break; > - case S2MPS14X: > - case S2MPS13X: -> - data |=3D info->regs->udr_mask; +> - data |= info->regs->udr_mask; > - break; > - default: > - return -EINVAL; > - } -> + data |=3D info->regs->write_time_udr_mask; -> =20 -> ret =3D regmap_write(info->regmap, info->regs->udr_update, data); +> + data |= info->regs->write_time_udr_mask; +> +> ret = regmap_write(info->regmap, info->regs->udr_update, data); > if (ret < 0) { -> @@ -262,22 +300,16 @@ static inline int s5m8767_rtc_set_alarm_reg(struct = -s5m_rtc_info *info) +> @@ -262,22 +300,16 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) > return ret; > } -> =20 -> - data |=3D info->regs->udr_mask; -> + data |=3D info->regs->write_alarm_udr_mask; +> +> - data |= info->regs->udr_mask; +> + data |= info->regs->write_alarm_udr_mask; > switch (info->device_type) { > case S5M8763X: > case S5M8767X: -> data &=3D ~S5M_RTC_TIME_EN_MASK; +> data &= ~S5M_RTC_TIME_EN_MASK; > break; > case S2MPS15X: > - /* As per UM, for write alarm, set A_UDR(bit[4]) to high @@ -185,24 +176,22 @@ s5m_rtc_info *info) > - */ > - break; > case S2MPS14X: -> - data |=3D S2MPS_RTC_RUDR_MASK; +> - data |= S2MPS_RTC_RUDR_MASK; > - break; > case S2MPS13X: -> - data |=3D S2MPS13_RTC_AUDR_MASK; +> - data |= S2MPS13_RTC_AUDR_MASK; > + /* No exceptions needed */ > break; > default: > return -EINVAL; -> @@ -338,11 +370,11 @@ static int s5m_rtc_read_time(struct device *dev, st= -ruct rtc_time *tm) +> @@ -338,11 +370,11 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) > u8 data[info->regs->regs_count]; > int ret; -> =20 -> - if (info->device_type =3D=3D S2MPS15X || info->device_type =3D=3D S2MPS= -14X || -> - info->device_type =3D=3D S2MPS13X) { +> +> - if (info->device_type == S2MPS15X || info->device_type == S2MPS14X || +> - info->device_type == S2MPS13X) { > + if (info->regs->read_time_udr_mask) { -> ret =3D regmap_update_bits(info->regmap, +> ret = regmap_update_bits(info->regmap, > info->regs->udr_update, > - S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK); > + info->regs->read_time_udr_mask, @@ -210,29 +199,27 @@ ruct rtc_time *tm) > if (ret) { > dev_err(dev, > "Failed to prepare registers for time reading: %d\n", -> @@ -709,10 +741,18 @@ static int s5m_rtc_probe(struct platform_device *pd= -ev) -> =20 +> @@ -709,10 +741,18 @@ static int s5m_rtc_probe(struct platform_device *pdev) +> > switch (platform_get_device_id(pdev)->driver_data) { > case S2MPS15X: -> + regmap_cfg =3D &s2mps14_rtc_regmap_config; -> + info->regs =3D &s2mps15_rtc_regs; -> + alarm_irq =3D S2MPS14_IRQ_RTCA0; +> + regmap_cfg = &s2mps14_rtc_regmap_config; +> + info->regs = &s2mps15_rtc_regs; +> + alarm_irq = S2MPS14_IRQ_RTCA0; > + break; > case S2MPS14X: -> + regmap_cfg =3D &s2mps14_rtc_regmap_config; -> + info->regs =3D &s2mps14_rtc_regs; -> + alarm_irq =3D S2MPS14_IRQ_RTCA0; +> + regmap_cfg = &s2mps14_rtc_regmap_config; +> + info->regs = &s2mps14_rtc_regs; +> + alarm_irq = S2MPS14_IRQ_RTCA0; > + break; > case S2MPS13X: -> regmap_cfg =3D &s2mps14_rtc_regmap_config; -> - info->regs =3D &s2mps_rtc_regs; -> + info->regs =3D &s2mps13_rtc_regs; -> alarm_irq =3D S2MPS14_IRQ_RTCA0; +> regmap_cfg = &s2mps14_rtc_regmap_config; +> - info->regs = &s2mps_rtc_regs; +> + info->regs = &s2mps13_rtc_regs; +> alarm_irq = S2MPS14_IRQ_RTCA0; > break; > case S5M8763X: -> diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/= -rtc.h +> diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h > index a65e4655d470..48c3c5be7eb1 100644 > --- a/include/linux/mfd/samsung/rtc.h > +++ b/include/linux/mfd/samsung/rtc.h @@ -246,21 +233,8 @@ rtc.h > #define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT) > #define S2MPS15_RTC_WUDR_SHIFT 1 ---=20 +-- Lee Jones Linaro STMicroelectronics Landing Team Lead -Linaro.org =E2=94=82 Open source software for ARM SoCs +Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog - ---=20 ---=20 -You received this message because you are subscribed to "rtc-linux". -Membership options at http://groups.google.com/group/rtc-linux . -Please read http://groups.google.com/group/rtc-linux/web/checklist -before submitting a driver. ----=20 -You received this message because you are subscribed to the Google Groups "= -rtc-linux" group. -To unsubscribe from this group and stop receiving emails from it, send an e= -mail to rtc-linux+unsubscribe@googlegroups.com. -For more options, visit https://groups.google.com/d/optout. diff --git a/a/content_digest b/N1/content_digest index b0f5c8a..fb7f0a7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,7 @@ "ref\01451450847-928-1-git-send-email-k.kozlowski@samsung.com\0" "ref\01451450847-928-3-git-send-email-k.kozlowski@samsung.com\0" "From\0Lee Jones <lee.jones@linaro.org>\0" - "Subject\0[rtc-linux] Re: [PATCH v2 3/3] rtc: s5m: Make register configuration per S2MPS device to remove exceptions\0" + "Subject\0Re: [PATCH v2 3/3] rtc: s5m: Make register configuration per S2MPS device to remove exceptions\0" "Date\0Mon, 11 Jan 2016 09:42:36 +0000\0" "To\0Krzysztof Kozlowski <k.kozlowski@samsung.com>\0" "Cc\0Sangbeom Kim <sbkim73@samsung.com>" @@ -22,33 +22,32 @@ "> exceptions are not obvious, for example except the change in the logic\n" "> sometimes the fields are swapped (WUDR and AUDR between S2MPS14 and\n" "> S2MPS15). This leads to quite complicated code.\n" - ">=20\n" + "> \n" "> Try to make it more obvious by:\n" "> 1. Documenting the UDR masks for devices and operations.\n" "> 2. Adding fields in register configuration structure for each operation\n" "> (read time, write time and alarm).\n" "> 3. Splitting the configuration per S2MPS13, S2MPS14 and S2MPS15 thus\n" "> removing exceptions for them.\n" - ">=20\n" + "> \n" "> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>\n" - ">=20\n" + "> \n" "> ---\n" - ">=20\n" + "> \n" "> Tested on S2MPS11 (Odroid XU4) and S2MPS13. Testing on S2MPS15 would be\n" "> appreciated!\n" - ">=20\n" + "> \n" "> Changes since v1:\n" "> 1. Fix value used in S2MPS15_RTC_AUDR_MASK, pointed by Yadwinder Singh\n" "> Brar.\n" "> ---\n" - "> drivers/rtc/rtc-s5m.c | 110 +++++++++++++++++++++++++++-------=\n" - "------\n" + "> drivers/rtc/rtc-s5m.c | 110 +++++++++++++++++++++++++++-------------\n" "> include/linux/mfd/samsung/rtc.h | 2 +\n" "\n" "Acked-by: Lee Jones <lee.jones@linaro.org>\n" "\n" "> 2 files changed, 77 insertions(+), 35 deletions(-)\n" - ">=20\n" + "> \n" "> diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c\n" "> index 559db8f72117..7407d7394bb4 100644\n" "> --- a/drivers/rtc/rtc-s5m.c\n" @@ -56,22 +55,19 @@ "> @@ -38,7 +38,22 @@\n" "> */\n" "> #define UDR_READ_RETRY_CNT\t5\n" - "> =20\n" + "> \n" "> -/* Registers used by the driver which are different between chipsets. */\n" "> +/*\n" "> + * Registers used by the driver which are different between chipsets.\n" "> + *\n" "> + * Operations like read time and write alarm/time require updating\n" - "> + * specific fields in UDR register. These fields usually are auto-cleare=\n" - "d\n" + "> + * specific fields in UDR register. These fields usually are auto-cleared\n" "> + * (with some exceptions).\n" "> + *\n" "> + * Table of operations per device:\n" "> + *\n" "> + * Device | Write time | Read time | Write alarm\n" - "> + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=\n" - "=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=\n" - "=3D\n" + "> + * =================================================\n" "> + * S5M8767 | UDR + TIME | | UDR\n" "> + * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR\n" "> + * S2MPS13 | WUDR | RUDR | WUDR + AUDR\n" @@ -94,106 +90,101 @@ "> +\tunsigned int write_time_udr_mask;\n" "> +\tunsigned int write_alarm_udr_mask;\n" "> };\n" - "> =20\n" + "> \n" "> /* Register map for S5M8763 and S5M8767 */\n" - "> @@ -71,14 +91,44 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs =\n" - "=3D {\n" - "> \t.alarm1\t\t\t=3D S5M_ALARM1_SEC,\n" - "> \t.udr_update\t\t=3D S5M_RTC_UDR_CON,\n" - "> \t.autoclear_udr_mask\t=3D S5M_RTC_UDR_MASK,\n" - "> -\t.udr_mask\t\t=3D S5M_RTC_UDR_MASK,\n" - "> +\t.read_time_udr_mask\t=3D 0, /* Not needed */\n" - "> +\t.write_time_udr_mask\t=3D S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,\n" - "> +\t.write_alarm_udr_mask\t=3D S5M_RTC_UDR_MASK,\n" + "> @@ -71,14 +91,44 @@ static const struct s5m_rtc_reg_config s5m_rtc_regs = {\n" + "> \t.alarm1\t\t\t= S5M_ALARM1_SEC,\n" + "> \t.udr_update\t\t= S5M_RTC_UDR_CON,\n" + "> \t.autoclear_udr_mask\t= S5M_RTC_UDR_MASK,\n" + "> -\t.udr_mask\t\t= S5M_RTC_UDR_MASK,\n" + "> +\t.read_time_udr_mask\t= 0, /* Not needed */\n" + "> +\t.write_time_udr_mask\t= S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,\n" + "> +\t.write_alarm_udr_mask\t= S5M_RTC_UDR_MASK,\n" "> +};\n" "> +\n" "> +/* Register map for S2MPS13 */\n" - "> +static const struct s5m_rtc_reg_config s2mps13_rtc_regs =3D {\n" - "> +\t.regs_count\t\t=3D 7,\n" - "> +\t.time\t\t\t=3D S2MPS_RTC_SEC,\n" - "> +\t.ctrl\t\t\t=3D S2MPS_RTC_CTRL,\n" - "> +\t.alarm0\t\t\t=3D S2MPS_ALARM0_SEC,\n" - "> +\t.alarm1\t\t\t=3D S2MPS_ALARM1_SEC,\n" - "> +\t.udr_update\t\t=3D S2MPS_RTC_UDR_CON,\n" - "> +\t.autoclear_udr_mask\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> +\t.read_time_udr_mask\t=3D S2MPS_RTC_RUDR_MASK,\n" - "> +\t.write_time_udr_mask\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> +\t.write_alarm_udr_mask\t=3D S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,\n" + "> +static const struct s5m_rtc_reg_config s2mps13_rtc_regs = {\n" + "> +\t.regs_count\t\t= 7,\n" + "> +\t.time\t\t\t= S2MPS_RTC_SEC,\n" + "> +\t.ctrl\t\t\t= S2MPS_RTC_CTRL,\n" + "> +\t.alarm0\t\t\t= S2MPS_ALARM0_SEC,\n" + "> +\t.alarm1\t\t\t= S2MPS_ALARM1_SEC,\n" + "> +\t.udr_update\t\t= S2MPS_RTC_UDR_CON,\n" + "> +\t.autoclear_udr_mask\t= S2MPS_RTC_WUDR_MASK,\n" + "> +\t.read_time_udr_mask\t= S2MPS_RTC_RUDR_MASK,\n" + "> +\t.write_time_udr_mask\t= S2MPS_RTC_WUDR_MASK,\n" + "> +\t.write_alarm_udr_mask\t= S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,\n" "> +};\n" "> +\n" "> +/* Register map for S2MPS11/14 */\n" - "> +static const struct s5m_rtc_reg_config s2mps14_rtc_regs =3D {\n" - "> +\t.regs_count\t\t=3D 7,\n" - "> +\t.time\t\t\t=3D S2MPS_RTC_SEC,\n" - "> +\t.ctrl\t\t\t=3D S2MPS_RTC_CTRL,\n" - "> +\t.alarm0\t\t\t=3D S2MPS_ALARM0_SEC,\n" - "> +\t.alarm1\t\t\t=3D S2MPS_ALARM1_SEC,\n" - "> +\t.udr_update\t\t=3D S2MPS_RTC_UDR_CON,\n" - "> +\t.autoclear_udr_mask\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> +\t.read_time_udr_mask\t=3D S2MPS_RTC_RUDR_MASK,\n" - "> +\t.write_time_udr_mask\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> +\t.write_alarm_udr_mask\t=3D S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,\n" + "> +static const struct s5m_rtc_reg_config s2mps14_rtc_regs = {\n" + "> +\t.regs_count\t\t= 7,\n" + "> +\t.time\t\t\t= S2MPS_RTC_SEC,\n" + "> +\t.ctrl\t\t\t= S2MPS_RTC_CTRL,\n" + "> +\t.alarm0\t\t\t= S2MPS_ALARM0_SEC,\n" + "> +\t.alarm1\t\t\t= S2MPS_ALARM1_SEC,\n" + "> +\t.udr_update\t\t= S2MPS_RTC_UDR_CON,\n" + "> +\t.autoclear_udr_mask\t= S2MPS_RTC_WUDR_MASK,\n" + "> +\t.read_time_udr_mask\t= S2MPS_RTC_RUDR_MASK,\n" + "> +\t.write_time_udr_mask\t= S2MPS_RTC_WUDR_MASK,\n" + "> +\t.write_alarm_udr_mask\t= S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,\n" "> };\n" - "> =20\n" + "> \n" "> /*\n" "> - * Register map for S2MPS14.\n" "> - * It may be also suitable for S2MPS11 but this was not tested.\n" - "> + * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR=\n" - " bits\n" + "> + * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits\n" "> + * are swapped.\n" "> */\n" - "> -static const struct s5m_rtc_reg_config s2mps_rtc_regs =3D {\n" - "> +static const struct s5m_rtc_reg_config s2mps15_rtc_regs =3D {\n" - "> \t.regs_count\t\t=3D 7,\n" - "> \t.time\t\t\t=3D S2MPS_RTC_SEC,\n" - "> \t.ctrl\t\t\t=3D S2MPS_RTC_CTRL,\n" - "> @@ -86,7 +136,9 @@ static const struct s5m_rtc_reg_config s2mps_rtc_regs =\n" - "=3D {\n" - "> \t.alarm1\t\t\t=3D S2MPS_ALARM1_SEC,\n" - "> \t.udr_update\t\t=3D S2MPS_RTC_UDR_CON,\n" - "> \t.autoclear_udr_mask\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> -\t.udr_mask\t\t=3D S2MPS_RTC_WUDR_MASK,\n" - "> +\t.read_time_udr_mask\t=3D S2MPS_RTC_RUDR_MASK,\n" - "> +\t.write_time_udr_mask\t=3D S2MPS15_RTC_WUDR_MASK,\n" - "> +\t.write_alarm_udr_mask\t=3D S2MPS15_RTC_AUDR_MASK,\n" + "> -static const struct s5m_rtc_reg_config s2mps_rtc_regs = {\n" + "> +static const struct s5m_rtc_reg_config s2mps15_rtc_regs = {\n" + "> \t.regs_count\t\t= 7,\n" + "> \t.time\t\t\t= S2MPS_RTC_SEC,\n" + "> \t.ctrl\t\t\t= S2MPS_RTC_CTRL,\n" + "> @@ -86,7 +136,9 @@ static const struct s5m_rtc_reg_config s2mps_rtc_regs = {\n" + "> \t.alarm1\t\t\t= S2MPS_ALARM1_SEC,\n" + "> \t.udr_update\t\t= S2MPS_RTC_UDR_CON,\n" + "> \t.autoclear_udr_mask\t= S2MPS_RTC_WUDR_MASK,\n" + "> -\t.udr_mask\t\t= S2MPS_RTC_WUDR_MASK,\n" + "> +\t.read_time_udr_mask\t= S2MPS_RTC_RUDR_MASK,\n" + "> +\t.write_time_udr_mask\t= S2MPS15_RTC_WUDR_MASK,\n" + "> +\t.write_alarm_udr_mask\t= S2MPS15_RTC_AUDR_MASK,\n" "> };\n" - "> =20\n" + "> \n" "> struct s5m_rtc_info {\n" - "> @@ -223,21 +275,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5=\n" - "m_rtc_info *info)\n" + "> @@ -223,21 +275,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)\n" "> \t\treturn ret;\n" "> \t}\n" - "> =20\n" + "> \n" "> -\tswitch (info->device_type) {\n" "> -\tcase S5M8763X:\n" "> -\tcase S5M8767X:\n" - "> -\t\tdata |=3D info->regs->udr_mask | S5M_RTC_TIME_EN_MASK;\n" + "> -\t\tdata |= info->regs->udr_mask | S5M_RTC_TIME_EN_MASK;\n" "> -\tcase S2MPS15X:\n" "> -\t\t/* As per UM, for write time register, set WUDR bit to high */\n" - "> -\t\tdata |=3D S2MPS15_RTC_WUDR_MASK;\n" + "> -\t\tdata |= S2MPS15_RTC_WUDR_MASK;\n" "> -\t\tbreak;\n" "> -\tcase S2MPS14X:\n" "> -\tcase S2MPS13X:\n" - "> -\t\tdata |=3D info->regs->udr_mask;\n" + "> -\t\tdata |= info->regs->udr_mask;\n" "> -\t\tbreak;\n" "> -\tdefault:\n" "> -\t\treturn -EINVAL;\n" "> -\t}\n" - "> +\tdata |=3D info->regs->write_time_udr_mask;\n" - "> =20\n" - "> \tret =3D regmap_write(info->regmap, info->regs->udr_update, data);\n" + "> +\tdata |= info->regs->write_time_udr_mask;\n" + "> \n" + "> \tret = regmap_write(info->regmap, info->regs->udr_update, data);\n" "> \tif (ret < 0) {\n" - "> @@ -262,22 +300,16 @@ static inline int s5m8767_rtc_set_alarm_reg(struct =\n" - "s5m_rtc_info *info)\n" + "> @@ -262,22 +300,16 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)\n" "> \t\treturn ret;\n" "> \t}\n" - "> =20\n" - "> -\tdata |=3D info->regs->udr_mask;\n" - "> +\tdata |=3D info->regs->write_alarm_udr_mask;\n" + "> \n" + "> -\tdata |= info->regs->udr_mask;\n" + "> +\tdata |= info->regs->write_alarm_udr_mask;\n" "> \tswitch (info->device_type) {\n" "> \tcase S5M8763X:\n" "> \tcase S5M8767X:\n" - "> \t\tdata &=3D ~S5M_RTC_TIME_EN_MASK;\n" + "> \t\tdata &= ~S5M_RTC_TIME_EN_MASK;\n" "> \t\tbreak;\n" "> \tcase S2MPS15X:\n" "> -\t\t/* As per UM, for write alarm, set A_UDR(bit[4]) to high\n" @@ -201,24 +192,22 @@ "> -\t\t */\n" "> -\t\tbreak;\n" "> \tcase S2MPS14X:\n" - "> -\t\tdata |=3D S2MPS_RTC_RUDR_MASK;\n" + "> -\t\tdata |= S2MPS_RTC_RUDR_MASK;\n" "> -\t\tbreak;\n" "> \tcase S2MPS13X:\n" - "> -\t\tdata |=3D S2MPS13_RTC_AUDR_MASK;\n" + "> -\t\tdata |= S2MPS13_RTC_AUDR_MASK;\n" "> +\t\t/* No exceptions needed */\n" "> \t\tbreak;\n" "> \tdefault:\n" "> \t\treturn -EINVAL;\n" - "> @@ -338,11 +370,11 @@ static int s5m_rtc_read_time(struct device *dev, st=\n" - "ruct rtc_time *tm)\n" + "> @@ -338,11 +370,11 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)\n" "> \tu8 data[info->regs->regs_count];\n" "> \tint ret;\n" - "> =20\n" - "> -\tif (info->device_type =3D=3D S2MPS15X || info->device_type =3D=3D S2MPS=\n" - "14X ||\n" - "> -\t\t\tinfo->device_type =3D=3D S2MPS13X) {\n" + "> \n" + "> -\tif (info->device_type == S2MPS15X || info->device_type == S2MPS14X ||\n" + "> -\t\t\tinfo->device_type == S2MPS13X) {\n" "> +\tif (info->regs->read_time_udr_mask) {\n" - "> \t\tret =3D regmap_update_bits(info->regmap,\n" + "> \t\tret = regmap_update_bits(info->regmap,\n" "> \t\t\t\tinfo->regs->udr_update,\n" "> -\t\t\t\tS2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);\n" "> +\t\t\t\tinfo->regs->read_time_udr_mask,\n" @@ -226,29 +215,27 @@ "> \t\tif (ret) {\n" "> \t\t\tdev_err(dev,\n" "> \t\t\t\t\"Failed to prepare registers for time reading: %d\\n\",\n" - "> @@ -709,10 +741,18 @@ static int s5m_rtc_probe(struct platform_device *pd=\n" - "ev)\n" - "> =20\n" + "> @@ -709,10 +741,18 @@ static int s5m_rtc_probe(struct platform_device *pdev)\n" + "> \n" "> \tswitch (platform_get_device_id(pdev)->driver_data) {\n" "> \tcase S2MPS15X:\n" - "> +\t\tregmap_cfg =3D &s2mps14_rtc_regmap_config;\n" - "> +\t\tinfo->regs =3D &s2mps15_rtc_regs;\n" - "> +\t\talarm_irq =3D S2MPS14_IRQ_RTCA0;\n" + "> +\t\tregmap_cfg = &s2mps14_rtc_regmap_config;\n" + "> +\t\tinfo->regs = &s2mps15_rtc_regs;\n" + "> +\t\talarm_irq = S2MPS14_IRQ_RTCA0;\n" "> +\t\tbreak;\n" "> \tcase S2MPS14X:\n" - "> +\t\tregmap_cfg =3D &s2mps14_rtc_regmap_config;\n" - "> +\t\tinfo->regs =3D &s2mps14_rtc_regs;\n" - "> +\t\talarm_irq =3D S2MPS14_IRQ_RTCA0;\n" + "> +\t\tregmap_cfg = &s2mps14_rtc_regmap_config;\n" + "> +\t\tinfo->regs = &s2mps14_rtc_regs;\n" + "> +\t\talarm_irq = S2MPS14_IRQ_RTCA0;\n" "> +\t\tbreak;\n" "> \tcase S2MPS13X:\n" - "> \t\tregmap_cfg =3D &s2mps14_rtc_regmap_config;\n" - "> -\t\tinfo->regs =3D &s2mps_rtc_regs;\n" - "> +\t\tinfo->regs =3D &s2mps13_rtc_regs;\n" - "> \t\talarm_irq =3D S2MPS14_IRQ_RTCA0;\n" + "> \t\tregmap_cfg = &s2mps14_rtc_regmap_config;\n" + "> -\t\tinfo->regs = &s2mps_rtc_regs;\n" + "> +\t\tinfo->regs = &s2mps13_rtc_regs;\n" + "> \t\talarm_irq = S2MPS14_IRQ_RTCA0;\n" "> \t\tbreak;\n" "> \tcase S5M8763X:\n" - "> diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/=\n" - "rtc.h\n" + "> diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h\n" "> index a65e4655d470..48c3c5be7eb1 100644\n" "> --- a/include/linux/mfd/samsung/rtc.h\n" "> +++ b/include/linux/mfd/samsung/rtc.h\n" @@ -262,23 +249,10 @@ "> #define S2MPS13_RTC_AUDR_MASK\t(1 << S2MPS13_RTC_AUDR_SHIFT)\n" "> #define S2MPS15_RTC_WUDR_SHIFT\t1\n" "\n" - "--=20\n" + "-- \n" "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" - "Linaro.org =E2=94=82 Open source software for ARM SoCs\n" - "Follow Linaro: Facebook | Twitter | Blog\n" - "\n" - "--=20\n" - "--=20\n" - "You received this message because you are subscribed to \"rtc-linux\".\n" - "Membership options at http://groups.google.com/group/rtc-linux .\n" - "Please read http://groups.google.com/group/rtc-linux/web/checklist\n" - "before submitting a driver.\n" - "---=20\n" - "You received this message because you are subscribed to the Google Groups \"=\n" - "rtc-linux\" group.\n" - "To unsubscribe from this group and stop receiving emails from it, send an e=\n" - "mail to rtc-linux+unsubscribe@googlegroups.com.\n" - For more options, visit https://groups.google.com/d/optout. + "Linaro.org \342\224\202 Open source software for ARM SoCs\n" + Follow Linaro: Facebook | Twitter | Blog -4d6410828c6700ab5a3d6f329740644195c009d23bc6d275a724927673201800 +ee1cdd03f1fcb945538a484bd625f1529ce94f2fa637efe4560cbc646e9d9698
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