From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: disable non-sequential pfits on ivb/hsw Date: Wed, 13 Jan 2016 18:43:37 +0200 Message-ID: <20160113164337.GK23290@intel.com> References: <20160113143347.GA4866@localhost> <20160113161331.GX19130@phenom.ffwll.local> <20160113161415.GY19130@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C0356E967 for ; Wed, 13 Jan 2016 08:43:41 -0800 (PST) Content-Disposition: inline In-Reply-To: <20160113161415.GY19130@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Bainbridge , daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCBKYW4gMTMsIDIwMTYgYXQgMDU6MTQ6MTVQTSArMDEwMCwgRGFuaWVsIFZldHRlciB3 cm90ZToKPiBPbiBXZWQsIEphbiAxMywgMjAxNiBhdCAwNToxMzozMVBNICswMTAwLCBEYW5pZWwg VmV0dGVyIHdyb3RlOgo+ID4gT24gV2VkLCBKYW4gMTMsIDIwMTYgYXQgMDI6MzM6NDdQTSArMDAw MCwgQ2hyaXMgQmFpbmJyaWRnZSB3cm90ZToKPiA+ID4gVGhlIGV4aXN0aW5nIGNvZGUgYXNzdW1l cyBhIHNlcXVlbnRpYWwgbWFwcGluZyBvZiBwYW5lbCBmaXR0ZXJzIHRvIHBpcGVzCj4gPiA+IChw Zml0MC1waXBlQSwgcGZpdDEtcGlwZUIsIHBmaXQyLXBpcGVDKSwgYnV0IGJvb3QgZmlybXdhcmUg Y2FuCj4gPiA+IGFyYml0cmFyaWx5IGFzc2lnbiBhbnkgcGlwZSB0byBhIHBmaXQgb24gSVZCIGhh cmR3YXJlIGUuZy4gTWFjYm9vayBVRUZJCj4gPiA+IHVzZXMgcGZpdCAwIGFuZCBwaXBlIEMgZm9y IGVEUDEgd2hlbiB0aGUgZmlybXdhcmUgYm9vdHMgaW4gYSBub24tMTY6MTAKPiA+ID4gcmVzb2x1 dGlvbiAodGhlIGxhc3QtdXNlZCByZXNvbHV0aW9uIGlzIHN0b3JlZCBpbiBOVlJBTSBieSBPUyBY IHNvIHRoZQo+ID4gPiBmaXJtd2FyZSBjYW4gaW1tZWRpYXRlbHkgcmVzdG9yZSBpdCBhdCBib290 KS4gV2hlbiB0aGlzIGhhcHBlbnMsIHRoZQo+ID4gPiBkaXNwbGF5IHdpbGwgYXBwZWFyIGxldHRl cmJveGVkIGR1ZSB0byBpbmNvcnJlY3QgYXNwZWN0IHJhdGlvIGFuZAo+ID4gPiBhdHRlbXB0aW5n IHRvIHN3aXRjaCB0byBhbHRlcm5hdGl2ZSByZXNvbHV0aW9ucyB3aWxsIGZhaWwuIEZpeCB0aGlz IGJ5Cj4gPiA+IGRpc2FibGluZyBhbnkgcGFuZWwgZml0dGVycyB3aGljaCBoYXZlIGJlZW4gbm9u LXNlcXVlbnRpYWxseSBhc3NpZ25lZCBhdAo+ID4gPiBib290IHRpbWUuCj4gPiA+IAo+ID4gPiBM aW5rOiBodHRwczovL2J1Z3MuZnJlZWRlc2t0b3Aub3JnL3Nob3dfYnVnLmNnaT9pZD05MzUyMwo+ ID4gPiBTaWduZWQtb2ZmLWJ5OiBDaHJpcyBCYWluYnJpZGdlIDxjaHJpcy5iYWluYnJpZGdlQGdt YWlsLmNvbT4KPiA+ID4gLS0tCj4gPiA+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kaXNw bGF5LmMgfCAyNiArKysrKysrKysrKysrKysrKystLS0tLS0tLQo+ID4gPiAgMSBmaWxlIGNoYW5n ZWQsIDE4IGluc2VydGlvbnMoKyksIDggZGVsZXRpb25zKC0pCj4gPiA+IAo+ID4gPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZGlzcGxheS5jIGIvZHJpdmVycy9ncHUv ZHJtL2k5MTUvaW50ZWxfZGlzcGxheS5jCj4gPiA+IGluZGV4IDMyY2Y5NzM0Njk3OC4uOWU1ODgx MzlhMmRkIDEwMDY0NAo+ID4gPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kaXNw bGF5LmMKPiA+ID4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZGlzcGxheS5jCj4g PiA+IEBAIC05MTcwLDYgKzkxNzAsMjQgQEAgc3RhdGljIHZvaWQgaXJvbmxha2VfZ2V0X3BmaXRf Y29uZmlnKHN0cnVjdCBpbnRlbF9jcnRjICpjcnRjLAo+ID4gCj4gPiBnZXRfY29uZmlnIHNob3Vs ZCBuZXZlciB0b3VjaCBodyBzdGF0ZSwgb25seSByZWFkIGl0IG91dC4gVGhlIHJpZ2h0IHBsYWNl Cj4gPiB0byBwdXQgZml4dXAgY29kZSBpcyBpbiBzYW5pdGl6ZV9jcnRjLiBXaGF0IHdlIG5lZWQg aW4gZ2V0X2NvbmZpZyB3b3VsZCBiZQo+ID4gYSBjaGVjayB0byBtYWtlIHN1cmUgcGZpdCBpcyBh c3NpZ25lZCB0byBvdXIgcGlwZSAoYW5kIG5vdCB0YWtlIG92ZXIgdGhlCj4gPiBzdGF0ZSBpZiBz bykuCj4gCj4gbWF5YmUgZXZlbiB0aHJvdyBhIG5ldyBzYW5pdGl6ZV9wZml0IGZ1bmN0aW9uIGlu IGZvciBjbGFyaXR5LCBzaW5jZSB0aGUKPiBwcm9ibGVtIGlzIHRoYXQgcGZpdCBpcyBfbm90XyBh c3NvY2lhdGVkIHdpdGggdGhlIGNydGMgYXQgYSBodyBsZXZlbC4KCklkZWFsbHkgd2UnZCBtYWtl IHRoZSBjcnRjPC0+cGZpdCBtYXBwaW5nIGZsZXhpYmxlIGluIHRoZSBkcml2ZXIgc2luY2UKSUlS QyB0aGUgZmlyc3QgcGZpdCBjb3VsZCBoYXZlIHNwZWNpYWwgcG93ZXJzLiBCdXQgSSBndWVzcyBp dCBjb3VsZCBiZQphIGJpdCB0b28gbXVjaCB3b3JrIGZvciBsaXR0bGUgZ2Fpbi4gQWx0aG91Z2gg aXQgc2hvdWxkbid0IGJlIHRvbwpkaWZmZXJlbnQgZnJvbSB0aGUgU0tMIHNjYWxlciBhc3NpZ25t ZW50IHN0dWZmLCBzbyBtYXliZSBub3QgdGhhdCBtdWNoCndvcmsuLi4KCi0tIApWaWxsZSBTeXJq w6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9w Lm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwt Z2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754730AbcAMQny (ORCPT ); Wed, 13 Jan 2016 11:43:54 -0500 Received: from mga01.intel.com ([192.55.52.88]:22831 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754508AbcAMQnl (ORCPT ); Wed, 13 Jan 2016 11:43:41 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,290,1449561600"; d="scan'208";a="889775555" Date: Wed, 13 Jan 2016 18:43:37 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Chris Bainbridge , daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: disable non-sequential pfits on ivb/hsw Message-ID: <20160113164337.GK23290@intel.com> References: <20160113143347.GA4866@localhost> <20160113161331.GX19130@phenom.ffwll.local> <20160113161415.GY19130@phenom.ffwll.local> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20160113161415.GY19130@phenom.ffwll.local> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 13, 2016 at 05:14:15PM +0100, Daniel Vetter wrote: > On Wed, Jan 13, 2016 at 05:13:31PM +0100, Daniel Vetter wrote: > > On Wed, Jan 13, 2016 at 02:33:47PM +0000, Chris Bainbridge wrote: > > > The existing code assumes a sequential mapping of panel fitters to pipes > > > (pfit0-pipeA, pfit1-pipeB, pfit2-pipeC), but boot firmware can > > > arbitrarily assign any pipe to a pfit on IVB hardware e.g. Macbook UEFI > > > uses pfit 0 and pipe C for eDP1 when the firmware boots in a non-16:10 > > > resolution (the last-used resolution is stored in NVRAM by OS X so the > > > firmware can immediately restore it at boot). When this happens, the > > > display will appear letterboxed due to incorrect aspect ratio and > > > attempting to switch to alternative resolutions will fail. Fix this by > > > disabling any panel fitters which have been non-sequentially assigned at > > > boot time. > > > > > > Link: https://bugs.freedesktop.org/show_bug.cgi?id=93523 > > > Signed-off-by: Chris Bainbridge > > > --- > > > drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++++-------- > > > 1 file changed, 18 insertions(+), 8 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > > index 32cf97346978..9e588139a2dd 100644 > > > --- a/drivers/gpu/drm/i915/intel_display.c > > > +++ b/drivers/gpu/drm/i915/intel_display.c > > > @@ -9170,6 +9170,24 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc, > > > > get_config should never touch hw state, only read it out. The right place > > to put fixup code is in sanitize_crtc. What we need in get_config would be > > a check to make sure pfit is assigned to our pipe (and not take over the > > state if so). > > maybe even throw a new sanitize_pfit function in for clarity, since the > problem is that pfit is _not_ associated with the crtc at a hw level. Ideally we'd make the crtc<->pfit mapping flexible in the driver since IIRC the first pfit could have special powers. But I guess it could be a bit too much work for little gain. Although it shouldn't be too different from the SKL scaler assignment stuff, so maybe not that much work... -- Ville Syrjälä Intel OTC